DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC1876 US MTS DECODER DESCRIPTION The µPC1876 is an integrated circuit for US MTS (Multi Channel Television Sound) system. All functions for US MTS system are provided on one chip. The µPC1876 has built-in SAP (Sub Audio Program) discrimination error protection circuit. FEATURES • BTSC (USA) standard demodulator (Stereo demodulation and TV-dbx noise reduction) • Only four adjustments (2 separation, 1 stereo VCO, 1 filter) • Supply voltage: 8 V to 10 V • Circuit current: 27 mA TYP. (Supply voltage: 9 V) • Input and output level (L+R, 100% modulation) Input level: 0.42 Vp-p Output level: 1.41 Vp-p APPLICATION • TV sets and VCRs for North America ORDERING INFORMATION Part Number µPC1876GT Package 42-pin plastic SSOP (9.53 mm (375)) The µPC1876 is available only to licensees of THAT Corporation. Please contact: (03) 5790-5391 (Japan) (508) 229-2500 (USA) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Document No. S11666EJ4V0DS00 (4th edition) Date Published June 2000 N CP(K) Printed in Japan The mark shows major revised points. © 1996 µPC1876 SYSTEM BLOCK DIAGRAM (TV) PIF & SIF Tuner Color, intensity and deflecting signal processor Color output Vertical output DTS interface µ PC1876 Dual attenuator/ Matrix surround processor Degital tuning controller Remote control reception amplifier PIN photo-diode 2 Data Sheet S11666EJ4V0DS00 Sound output CRT µPC1876 BLOCK DIAGRAM VCC VCC 1 kΩ STL SAP1/2 ST/SAP MUTE FMONO Note 1 IC LED Driver 22 21 WideBand VCA 23 24 25 VOA GND MOA1 0.1 µ F MOA2 22 µ F VRE + 1.5 V 33 kΩ∗ SAPVA 10 kΩ 33 kΩ∗ 20 kΩ FLTA STVA 0.1 µ F PD2 1 kΩ 4.7 µ F + φ D1 + 1 µF φ D2 20 18 17 16 Spectral RMS Filter fH Trap Matrix 15 Spectral RMS 14 LPF 30 31 ST/SAP SW Variable Emphasis 408 Hz LPF 2.19 kHz LPF 1/2 VCC 9 SAP VCO 8 1/2 36 37 38 1/4 L+R LPF 7 Noise Detector Loop Filter Noise BPF Pilot Canceller Pilot Discrimination Phase Comparator 40 42 L-R AM Demodulator Stereo VCO 39 41 SAP LPF Note 2 Phase Detector SAP Detector 6 5 4 3 SAP BPF Stereo Phase Comparator Stereo LPF 10 µ F∗∗ + STI 3.3 µ F∗∗ + SPA 51 kΩ 100 kΩ WBA 51 kΩ 50 kΩ ITI 56 kΩ∗ 56 kΩ∗ SRB 3 kΩ + 10 Deemphasis WTI 12 33 35 20 kΩ LGND WRB 5.1 kΩ + 11 34 DCO 13 32 47 kΩ∗ PD1 WideBand RMS 27 10 µ F ROT 28 + 1 µF + WideBand RMS Filter Offset Absorption 26 10 µ F LOT 29 + VCC 19 Mode Selector 1 kΩ SAPL 2 + – 1 VCC 1 µF VCC 1 µ F WBVI VEO 0.1 µF fHSW SI 0.1 µ F SOT 68 kΩ NDT + 0.47 µ F SDT 0.047 µ F SDI 0.01 µ F SBO COM + 2.2 µF Notes 1. Do not leave the Internally Connected (IC) pin open because it is a base-open pin. Connect this pin to VCC or GND. 2. Am: Amplitude modulation (Carrier frequency is 31.5 kHz (2fH)) Remark Use the following for external parts. Resistor (∗) : Metal film resistor (±1%). Unless otherwise specified; ±5% Capacitors (∗∗) : Tantalum capacitor (±10%). Unless otherwise specified; ±20% Variable resistors: ±10% Data Sheet S11666EJ4V0DS00 3 µPC1876 PIN CONFIGURATION (Top View) 42-pin plastic SSOP (9.53 mm (375)) COMPOSITE SIGNAL INPUT 1 COM φ D2 42 PHASE COMPARATOR FILTER 2 SAP BPF OUTPUT 2 SBO φ D1 41 PHASE COMPARATOR FILTER 1 SAP DISCRIMINATION FILTER INPUT 3 SDI PD2 40 PILOT DISCRIMINATION FILTER 2 SAP DISCRIMINATION FILTER 4 SDT PD1 39 PILOT DISCRIMINATION FILTER 1 NOISE DETECTION FILTER 5 NDT STVA 38 STEREO VCO SETTING SAP SINGLE OUTPUT 6 SOT FLTA 37 FILTER ADJUSTMENT SAP SINGLE INPUT 7 SI SAPVA 36 SAP VCO SETTING STEREO VCO FREE-RUN MONITOR SWITCH 8 fHSW 1.5 V 35 BIAS (1.5 V) VARIABLE EMPHASIS OUTPUT 9 VEO VRE 34 1/2 VCC FILTER WIDE-BAND VCA INPUT 10 WBVI MOA2 33 MONAURAL OFFSET ABSORPTION 2 POWER SUPPLY (9 V) 11 VCC MOA1 32 MONAURAL OFFSET ABSORPTION 1 SPECTRAL RMS OFFSET ABSORPTION 12 SRB GND 31 SIGNAL GND WIDE-BAND RMS OFFSET ABSORPTION 13 WRB VOA 30 VCA OFFSET ABSORPTION TIMING CURRENT SETTING 14 ITI LOT 29 L CHANNEL OUTPUT WIDE-BAND RMS SETTING 15 WBA ROT 28 R CHANNEL OUTPUT SPECTRAL RMS SETTING 16 SPA IC 27 INTERNAL CONNECTION SPECTRAL RMS TIMING 17 STI FMONO 26 F-MONAURAL SELECTION WIDE-BAND RMS TIMING 18 WTI MUTE 25 MATRIX MUTE LED GND 19 LGND ST/SAP 24 STEREO/SAP SWITCH DC OUTPUT 20 DCO SAP1/2 23 SAP 1/2 SWITCH SAP LED DRIVER 21 SAPL STL 22 STEREO LED DRIVER/ STEREO VCO FREE-RUN MONITOR 4 Data Sheet S11666EJ4V0DS00 µPC1876 CONTENTS 1. INTERNAL EQUIVALENT CIRCUITS ............................................................................................ 6 2. FUNCTION OF EACH BLOCK ..................................................................................................... 2.1 Stereo Demodulation Block ................................................................................................... 2.2 SAP Demodulation Block ....................................................................................................... 2.3 dbx Noise Reduction Block ................................................................................................... 2.4 Matrix Block ............................................................................................................................ 13 14 15 15 17 3. EXPLANATION OF EACH FUNCTION ........................................................................................ 3.1 Mode Matrix Table ................................................................................................................... 3.2 MATRIX MUTE Pin .................................................................................................................. 3.3 F-MONAURAL SELECTION Pin ............................................................................................. 3.4 STEREO/SAP SWITCH Pin ..................................................................................................... 3.5 SAP 1/2 SWITCH Pin ............................................................................................................... 18 18 18 19 19 19 4. PRECAUTIONS ............................................................................................................................... 4.1 Impedance of Input Pins and Output Pins ........................................................................... 4.2 Output Load Impedance ........................................................................................................ 4.3 Cautions on External Components ....................................................................................... 4.4 Change of Electrical Characteristics Depending on External Components ..................... 4.5 BIAS (1.5 V) Pin ....................................................................................................................... 20 20 20 21 21 21 5. ADJUSTMENT PROCEDURE ........................................................................................................ 5.1 Stereo VCO Adjustment ......................................................................................................... 5.2 Filter Adjustment .................................................................................................................... 5.3 Separation Adjustment .......................................................................................................... 5.4 SAP VCO Adjustment ............................................................................................................. 5.5 List of Pin Settings in Adjustment ........................................................................................ 22 22 22 22 23 23 6. ELECTRICAL SPECIFICATIONS ................................................................................................... 24 7. MEASURING CIRCUIT ................................................................................................................... 35 8. DIFFERENCES BETWEEN THE µPC1876GT AND µPC1872GT ............................................. 36 9. PACKAGE DRAWING ..................................................................................................................... 37 10. RECOMMENDED SOLDERING CONDITIONS ............................................................................. 38 Data Sheet S11666EJ4V0DS00 5 µPC1876 1. INTERNAL EQUIVALENT CIRCUITS (1/7) Pin Number Pin Name 1 COMPOSITE SIGNAL INPUT Symbol Internal Equivalent Circuit COM 1 2 VCC VCC 80 kΩ 10 kΩ 10 kΩ 1 5 kΩ 5 pF 5 kΩ 5 kΩ GND 2 SAP BPF OUTPUT SBO VCC 2 kΩ 10 kΩ 2 5 kΩ 2 kΩ GND 3 SAP DISCRIMINATION FILTER INPUT SDI 1 2 VCC VCC 10 kΩ 10 kΩ 40 kΩ 5 kΩ 10 pF 3 10 kΩ GND 6 Data Sheet S11666EJ4V0DS00 µPC1876 (2/7) Pin Number 4 Pin Name SAP DISCRIMINATION FILTER Symbol SDT Internal Equivalent Circuit VCC 10 kΩ 10 kΩ 20 kΩ 4 10 kΩ 3 pF 5 kΩ 39 kΩ 20 kΩ 20 kΩ 10 kΩ 13 kΩ 10 kΩ 10 kΩ 5 kΩ 10 kΩ GND 5 NOISE DETECTION FILTER NDT VCC 20 kΩ 20 kΩ 20 kΩ 5 20 kΩ 20 kΩ 20 kΩ 20 kΩ GND 6 SAP SINGLE OUTPUT SOT Same as SBO pin 7 SAP SINGLE INPUT SI Same as COM pin 8 STEREO VCO FREE-RUN MONITOR SWITCH fHSW 1 2 VCC VCC 5 kΩ 20 kΩ 20 kΩ 60 kΩ 10 kΩ 8 GND 9 VARIABLE EMPHASIS OUTPUT VEO Same as SBO pin 10 WIDE-BAND VCA INPUT WBVI Same as COM pin 11 POWER SUPPLY (9 V) VCC Data Sheet S11666EJ4V0DS00 7 µPC1876 (3/7) Pin Number Pin Name Symbol 12 SPECTRAL RMS OFFSET ABSORPTION SRB 13 WIDE-BAND RMS OFFSET ABSORPTION WRB Internal Equivalent Circuit Pin 13 is the same as pin 12. 5 kΩ VCC 5 kΩ 5 kΩ 5 kΩ 12 5 kΩ GND 14 TIMING CURRENT SETTING ITI 15 WIDE-BAND RMS SETTING WBA 16 SPECTRAL RMS SETTING SPA Pin 16 is the same as pin 15. VCC 10 kΩ 10 kΩ 5 kΩ 5 kΩ 10 kΩ 10 kΩ 10 10 kΩ kΩ 10 kΩ 10 kΩ 14 15 30 kΩ GND 17 SPECTRAL RMS TIMING STI VCC 5 kΩ 600Ω 5 kΩ 5 kΩ 5 kΩ 17 5 kΩ GND 18 8 WIDE-BAND RMS TIMING WTI Same as STI pin Data Sheet S11666EJ4V0DS00 µPC1876 (4/7) Pin Number Pin Name Symbol 19 LED GND LGND 20 DC OUTPUT DCO 21 SAP LED DRIVER SAPL 22 STEREO LED DRIVER/ STEREO VCO FREE-RUN MONITOR STL Internal Equivalent Circuit VCC 30 kΩ 5 kΩ 5 kΩ 20 1 kΩ 10 kΩ 22 1 kΩ 21 10 kΩ 5 kΩ 5 kΩ LGND 23 SAP1/2 SWITCH SAP1/2 VCC 20 kΩ 23 10 kΩ LGND 24 STEREO/SAP SWITCH ST/SAP 25 MATRIX MUTE MUTE Same as SAP1/2 pin VCC 20 kΩ 20 kΩ 25 10 kΩ GND 26 F-MONAURAL SELECTION FMONO Same as MUTE pin 27 INTERNAL CONNECTION IC Same as MUTE pinNote Note Do not leave the Internally Connected (IC) pin open because it is a base-open pin. Connect this pin to VCC or GND. Data Sheet S11666EJ4V0DS00 9 µPC1876 (5/7) Pin Number 28 Pin Name R CHANNEL OUTPUT Symbol Internal Equivalent Circuit ROT VCC 1 kΩ 10 kΩ 200Ω 28 200Ω 5 kΩ 1 kΩ 5 kΩ 5 kΩ GND 29 L CHANNEL OUTPUT LOT 30 VCA OFFSET ABSORPTION VOA Same as ROT pin VCC 1 2 VCC 10 kΩ 10 kΩ 10 kΩ VCC 40 kΩ 30 40 kΩ 5 pF 10 kΩ 5 kΩ 10 kΩ GND 31 SIGNAL GND GND 32 MONAURAL OFFSET ABSORPTION 1 MOA1 Same as COM pin 33 MONAURAL OFFSET ABSORPTION 2 MOA2 Same as SBO pin 34 1/2 VCC FILTER VRE VCC 10 kΩ 10 kΩ 5 kΩ 20 kΩ 34 20 kΩ 20 kΩ 10 kΩ 10 kΩ 20 kΩ GND 10 Data Sheet S11666EJ4V0DS00 µPC1876 (6/7) Pin Number 35 Pin Name BIAS (1.5 V) Symbol Internal Equivalent Circuit 1.5 V VCC 20 kΩ 20 kΩ 5 kΩ 35 5 pF 2.5 kΩ 5 kΩ 12.5 kΩ 25 kΩ GND 36 SAP VCO SETTING SAPVA 37 FILTER ADJUSTMENT FLTA VCC 20 kΩ 20 kΩ 20 kΩ 20 kΩ 36 37 5 kΩ 1 kΩ 1 kΩ GND 38 STEREO VCO SETTING STVA VCC 10 kΩ 10 kΩ 20 pF 10 kΩ 10 kΩ 1 kΩ 38 30 kΩ GND Data Sheet S11666EJ4V0DS00 11 µPC1876 (7/7) Pin Number Pin Name Symbol 39 PILOT DISCRIMINATION FILTER 1 PD1 40 PILOT DISCRIMINATION FILTER 2 PD2 Internal Equivalent Circuit VCC 39 15 kΩ 15 kΩ 5 kΩ 1 2 VCC VCC 15 kΩ 15 kΩ 5 kΩ 40 41 PHASE COMPARATOR FILTER 1 φ D1 42 PHASE COMPARATOR FILTER 2 φ D2 VCC 41 15 kΩ 5 kΩ 5 kΩ 1 2 VCC 15 kΩ 42 12 Data Sheet S11666EJ4V0DS00 5 kΩ 5 kΩ VCC µPC1876 2. FUNCTION OF EACH BLOCK In the US, TV audio signals are broadcast in FM modulation. The stereo (L–R), Sub Audio Program (SAP) and telemetry signals are multiplexed in a higher frequency band than the monaural (L+R) signal (50 Hz to 15 kHz). The US MTS system base-band spectrum is described before: Figure 2-1. US MTS System Base-Band Spectrum Stereo signal (L–R) Audio carrier deviation (kHz) 50 Stereo pilot signal Monaural signal (L+R) 25 Sub Audio Program (SAP) signal 15 Telemetry signal 5 3 0 fH (15.734 kHz) 3 fH 2 fH 4 fH 5 fH 6 fH 6.5 fH Modulation frequency (Hz) Table 2-1. US MTS System Base-Band Spectrum Signal frequency band Monaural signal (L+R) Stereo pilot signal Signal processing system 50 Hz to 15 kHz 15.734 kHz Maximum audio carrier deviation (kHz) 25 Only stereo broadcasting 5 Stereo signal (L–R) 50 Hz to 15 kHz AM modulation (carrier frequency 2 fH), dbx noise reduction processing 50 Sub Audio Program (SAP) signal 50 Hz to 10 kHz FM modulation (carrier frequency 5 fH, maximum frequency deviation 10 kHz) dbx noise reduction processing 15 FM modulation (carrier frequency 6.5 fH, maximum frequency deviation 3 kHz) 3 Telemetry signal Audio 0 to 3.4 kHz Data 0 to 1.5 kHz Data Sheet S11666EJ4V0DS00 13 µPC1876 2.1 Stereo Demodulation Block (1) Stereo LPF Filter eliminates the Sub Audio Program (SAP) signal (5 fH) and telemetry signal (6.5 fH) residing anywhere around 5 to 6 fH. The internal L–R demodulator, which uses the double-balanced circuit, demodulates L–R signal by multiplication of L–R signal with the signal at L–R carrier frequency (2 fH). The L–R signal tends to be interfered by the 6 fH signal because a square waveform is used as the switching carrier in this method. To eliminate the interference, the µPC1876 incorporates 5 fH and 6 fH traps. Adjust the current value output from the FLTA pin for the filter response. (2) Stereo phase comparator The 8 fH signal generated at the stereo VCO is divided by 8 (4 × 2) and then multiplies it with the pilot signal passed through the stereo LPF. The two signals differ from each other by 90 degrees in terms of phase. The resistor and capacitor connected to the φ D1 and φ D2 pins form a filter which smoothes the phase error signal output from the phase comparator, converting the error signal to the DC voltage. When the voltage difference between the φ D1 and φ D2 pins becomes 0 V (strictly speaking, not 0 V by the internal offset voltage), the stereo VCO runs at 8 fH. The lag/lead filter externally connected to the φ D1, φ D2 pins determines the capture range. (3) Stereo VCO Runs at 8 fH with the internal capacitor. Adjust the current value output from the STVA pin for the frequency. (4) Divider (Flip-flop) Produces the inphase fH signal and the fH signal which is different 90 degrees from the input pilot signal by dividing the 8 fH frequency by 4 × 2 from the stereo VCO. (5) Pilot discrimination phase comparator (Level detector) Multiplies the pilot signal from the COM pin with the inphase fH signal from the divider. The produced signal is applied to the external filter connected to the PD1, PD2 pins. The signal is smoothed out to make DC voltage for judging whether to turn on or off the stereo LED. (6) Pilot canceller The fH signal from the divider is added in the stereo signal at the resistor matrix depending on the level of the input pilot signal to cancel the pilot signal. (7) L+R LPF This LPF, having traps at fH and 24 kHz each, allows only the monaural signal to pass through. The filter response is adjusted by the current value output from the FLTA pin. (8) De-emphasis 75 µs de-emphasis filter for the monaural signal. The filter response is adjusted by the current value output from the FLTA pin. (9) L–R AM demodulator Demodulates the L–R AM-DSB modulated signal by multiplying with the 2fH signal which is synchronized to the pilot signal. The 2 fH square wave is used as the switching carrier. 14 Data Sheet S11666EJ4V0DS00 µPC1876 2.2 SAP Demodulation Block (1) SAP BPF Picks up the SAP signal by the 50 kHz and 102 kHz traps, and response peak at 5 fH. Adjust the current value output from the FLTA pin for the filter response. (2) Noise BPF The µPC1876 monitors signals picked up by noise BPF (fO ≅ 180 kHz), and distinguish noises from signals. By this method, the µPC1876 prevents misoperating on SAP detection in a weak electric field. Adjust the current value output from the FLTA pin for the filter response. (3) Noise detector Performs full-wave rectification of noise which has passed through noise BPF to change it to the DC voltage and input it to comparator. When the noise level exceeds the reference level, the stereo LED and SAP LED are turned off, and the stereo and SAP demodulation are stopped. Adjust the value of the resistor and capacitor connected to the NDT pin for the sensitivity and time constant of the noise detection circuit. (4) SAP detector Performs synchronized detection of the SAP signal which has passed through the SAP BPF, and smoothes it with the SDT pin and input it to the comparator. When receiving the SAP signal, the SAP LED is turned on. (5) SAP demodulator The SAP demodulator consists of the phase detector, loop filter, and SAP VCO (PLL detection circuit). The SAP VCO oscillates at 10 fH, and performs phase comparison between the signal divided by 2 of the SAP VCO frequency and the SAP signal to make the PLL loop. Adjust the current value output from the SAPVA pin for the frequency of the SAP VCO. (6) SAP LPF Eliminates the SAP carrier and higher frequency buzz. The filter consists of a secondary LPF and fH trap filter. Adjust the current value output from the FLTA pin for the filter response. 2.3 dbx Noise Reduction Block All the filters required for the TV-dbx noise reduction are incorporated. Adjust the current value output from the FLTA pin for these filter responses. (1) LPF The LPF has traps at fH and 24 kHz each. The fH trap filter minimizes interference to the dbx noise reduction by the fH signal which is not synchronized with the pilot signal (e.g. leakage of the synchronous idle and buzz from the video signal). Data Sheet S11666EJ4V0DS00 15 µPC1876 (2) 408 Hz LPF A de-emphasis filter. The transfer function is as follows: T(f) = f 5.23 k f 1+ j 408 1+ j (3) Variable emphasis Also called spectral VCA and controlled by the spectral RMS. The transfer function is as follows: S −1 (f, b) = 1 + 51 b f ⋅ 20.1 k b +1 1 + 51 f 1+ j ⋅ 20.1 k b + 1 1+ j b: Variable transferred from the spectral RMS for controlling (4) Wide band VCA A VCA whose operating frequency range is mainly low to mid frequencies and controlled by the wide band RMS. The transfer function is as follows: W–1 (a) = a a: Variable transferred from the wide-band RMS for controlling (5) 2.19 kHz LPF A de-emphasis filter. The transfer function is as follows: T(f) = f 6.25 k f 1+ j 2.19 k 1+ j (6) Spectral RMS filter A filter that limits the band width of the signal input to the RMS which controls the variable emphasis. The transfer function is as follows: f j 7.66 k T(f) = 1+ j 2 f f + j 7.66 k 7.31 k 2 ⋅ f 3.92 k f 1+ j 3.92 k j (7) Wide-band RMS filter A filter that limits the band width of the signal input to the wide-band RMS which controls the wide band VCA. The transfer function is as follows: T(f) = 16 1 1+ j f 2.09 k Data Sheet S11666EJ4V0DS00 µPC1876 (8) Spectral RMS Detects the RMS value of the signal which has passed through the spectral RMS filter and converts the signal to the DC voltage. The timing (release time) is determined by the current inside the µPC1876 (IT) and the capacitance of the external capacitor connected to the STI pin. Set IT by the current value output from ITI pin. (9) Wide band RMS Detects the RMS value of the signal which has passed through the wide band RMS filter and converts the signal to the DC voltage. The timing (release time) is determined by the current inside the µPC1876 (IT) and the capacitance of the external capacitor connected to the WTI pin. Set IT by the current value output from ITI pin for the setting of IT. 2.4 Matrix Block (1) Matrix Adds L+R signal and L–R signal to output L signal and subtracts L+R signal from L–R signal to output R signal. (2) Mode selector Selects the user selected mode among the monaural, stereo, SAP signals, and mute, and outputs it from the ROT and LOT pins. Data Sheet S11666EJ4V0DS00 17 µPC1876 3. EXPLANATION OF EACH FUNCTION Caution Apply bias voltage to the F-MONAURAL SELECTION pin, the MATRIX MUTE pin, the SAP 1/2 pin and the STEREO/SAP SWITCH pin. Don’t leave those pins unconnected because those pins are base open. Loss current is 0.1 µA or less. Mode matrix table is shown in 3.1, and functions of mode switch pins are explained in 3.2 to 3.5. 3.1 Mode Matrix Table L, R SIGNAL OUTPUT pin matrix table Control pin Broadcasting mode Monaural Stereo Output F-MONAURAL SELECTION STEREO/SAP SWITCH SAP1/2 SWITCH – – – H – – M – – L – – H – H H L Monaural + SAP M L L L OFF R L OFF L ON H OFF L ON H ON ON H OFF OFF L ON ON H ON L+R L+R SAP SAP OFF L+R H – L R H L+R SAP – SAP – – – DC OUTPUT ON – L SAP LED OFF OFF L+R – L M L+R – H Stereo + SAP L CHANNEL R CHANNEL STEREO OUTPUT OUTPUT LED L – LED ON/OFF L+R Remark When the noise detector detects noise, both the stereo and the SAP demodulation circuit stop. The noise detector of the µPC1876 detects noise near 180 kHz that is 30 mVr.m.s. (TYP.) or higher. 3.2 MATRIX MUTE Pin The MATRIX MUTE pin controls muting of each output pin at muting operation. Input signal level of the MATRIX MUTE 18 R CHANNEL OUTPUT L CHANNEL OUTPUT SAP LED STEREO LED H Mute is ON OFF L Mute is OFF ON Data Sheet S11666EJ4V0DS00 µPC1876 3.3 F-MONAURAL SELECTION Pin When the F-MONAURAL SELECTION is ON, the R CHANNEL OUTPUT and L CHANNEL OUTPUT output monaural (L+R) signal regardless of broadcasting mode. The µPC1876 varies in pin function of the F-MONAURAL SELECTION. Output pin Input signal level of the F-MONAURAL SELECTION R CHANNEL OUTPUT L CHANNEL OUTPUT H OFF M ON L 3.4 STEREO/SAP SWITCH Pin Selecton pin of the L CHANNEL OUTPUT and R CHANNEL OUTPUT (Stereo signal/SAP signal). Output pin Input signal level of the STEREO/SAP SWITCH R CHANNEL OUTPUT L CHANNEL OUTPUT H Stereo signal L SAP signal 3.5 SAP 1/2 SWITCH Pin Selection pin of the L CHANNEL OUTPUT and R CHANNEL OUTPUT (SAP 1 mode/SAP 2 mode) when the STEREO/SAP SWITCH is L level (SAP signal is selected). Input signal level of the SAP 1/2 SWITCH Mode H SAP2 L SAP1 L CHANNEL OUTPUT R CHANNEL OUTPUT L + R signal SAP signal SAP signal Data Sheet S11666EJ4V0DS00 19 µPC1876 4. PRECAUTIONS 4.1 Impedance of Input Pins and Output Pins Each impedance of input and output pins are the following. Pin name Input Output Impedance COMPOSITE SIGNAL INPUT 80 kΩ SAP DISCRIMINATION FILTER INPUT 40 kΩ SAP SINGLE INPUT 80 kΩ WIDE BAND VCA INPUT 80 kΩ MONAURAL OFFSET ABSORPTION 1 80 kΩ SAP BPF OUTPUT 360 Ω SAP SINGLE OUTPUT 360 Ω VARIABLE EMPHASIS OUTPUT 360 Ω MONAURAL OFFSET ABSORPTION 2 360 Ω R CHANNEL OUTPUT 15 Ω L CHANNEL OUTPUT 15 Ω Scattering rate of impedance is about ±30%. 4.2 Output Load Impedance If the L CHANNEL OUTPUT pin and the R CHANNEL OUTPUT pin are connected to GND through 10 kΩ resistor, they can drive 700 Ω load impedance. And, when connecting a load capacitance over 100 pF to the L/R CHANNEL OUTPUT pins, parasitic oscillation can cause. In this case, insert a resistor between the L/R CHANNEL OUTPUT pins and the load capacitance. Note that the load capacitance changes by printed-wiring pattern of set. Caution To insert the DC load resistor (RL) between the L/R CHANNEL OUTPUT pins and GND, the RL should be equal or more than 3 kΩ. Note that the DC current increments 4.5/RL [A] per one output pin when inserting the RL, because the medium potential is 4.5 V (VCC = 9 V). If the RL is less than 3 kΩ, the distortion rate may become worse extremely. 20 Data Sheet S11666EJ4V0DS00 µPC1876 4.3 Cautions on External Components For stable temperature characteristics of stereo VCO, SAP VCO and filter, use the following for external components. Pin name External parts SAP VCO SETTING Metal film resistor (±1%), FILTER ADJUSTMENT Cermet (Variable resistor) (±10%) STEREO VCO SETTING According to the license contract with THAT Corporation, use the following for external components. With regard to the use of other external components, please contact to THAT Corporation. Pin name External parts TIMING CURRENT SETTING Metal film resistor (±1%) WIDE BAND RMS TIMING Tantalum capacitor (±10%) SPECTRAL RMS TIMING 4.4 Change of Electrical Characteristics Depending on External Components • SAP sensitivity can be down by inserting a resistor between the SAP DISCRIMINATION FILTER pin and GND. • Stereo sensitivity can be down by inserting a resistor between the STEREO VCO FREE-RUN MONITOR SWITCH pin and GND. • Noise sensitivity can be changed by changing a resistor between the NOISE DETECTION FILTER pin and GND. • Capture range can be changed by changing capacitor between the PHASE COMPARATOR FILTER pins φD1 and φD2. The smaller capacitor is, the wider capture range is, and the larger capacitor is, the narrower capture range is. Please be careful because stereo distortion rate become worse if capacitor is too small. • In case noise detection circuit doesn’t operate with stereo, it is necessary that capacitor between the PILOT DISCRIMINATION FILTER pins is about 2.2 µF (Protection for miss operation in the weak electric field). The time for changing to stereo, become longer if capacitor is too large. 4.5 BIAS (1.5 V) Pin The BIAS (1.5 V) pin is the bias pin when adjusting the SAP VCO SETTING, the FILTER ADJUSTMENT, the STEREO VCO SETTING, the WIDE BAND RMS SETTING, and the SPECTRAL RMS SETTING pins with lasertrimming. Data Sheet S11666EJ4V0DS00 21 µPC1876 5. ADJUSTMENT PROCEDURE Precise alignment of the dbx decoder is absolutely critical for optimum performance. Where possible, the alignment should be performed after the µPC1876 is mounted in the chassis and with the video system active. 5.1 Stereo VCO Adjustment Perform this adjustment with no signal applied. (1) Set the STEREO VCO FREE-RUN MONITOR SWITCH pin “H” by connecting it to the VCC. (2) Measure the frequency of the STEREO LED DRIVER/STEREO VCO FREE-RUN MONITOR pin with a frequency counter, and adjust the variable resistor connected to the STEREO VCO SETTING pin for a measured frequency of 15.734 kHz ±50 Hz. (3) Set the STEREO VCO FREE-RUN MONITOR SWITCH pin unconnected. 5.2 Filter Adjustment Perform this adjustment with the MATRIX MUTE pin “L” and the STEREO VCO FREE-RUN MONITOR SWITCH pin unconnected. (1) Short the capacitor across the PILOT DISCRIMINATION FILTER (PD1 and PD2) pins by connecting these pins together directly. (2) Apply a 15.734 kHz sin wave signal to the COMPOSITE SIGNAL INPUT pin at a level greater than 30 mVr.m.s. (100 mVr.m.s. is recommended). (3) Adjust the variable resistor connected to the FILTER ADJUSTMENT pin so that the AC output level at the RMS OFFSET ABSORPTION pin is minimized. This signal is best monitored through a band-pass filter (15.734 kHz). A recommended circuit is shown in 7. MEASURING CIRCUIT. (4) Disconnect the short circuit across the PILOT DISCRIMINATION FILTER (PD1 and PD2) pins after adjustment. 5.3 Separation Adjustment Perform this adjustment with the MATRIX MUTE pin “L”, the STEREO VCO FREE-RUN MONITOR SWITCH pin unconnected, and the F-MONAURAL SELECTION pin “H”. Verify that a L+R signal (100% modulation, 300 Hz, without noise reduction, pilot signal off) results in approximately 150 mVr.m.s. at the COMPOSITE SIGNAL INPUT pin, and that a pilot-only signal results in approximately 30 mVr.m.s. at the COMPOSITE SIGNAL INPUT pin. (1) Apply a composite signal (30% modulation, 300 Hz, L-only, with noise reduction) to the COMPOSITE SIGNAL INPUT pin. (2) Adjust the variable resistor connected to the WIDE-BAND RMS SETTING pin so that the output at the R CHANNEL OUTPUT pin is minimized. (3) Apply a composite signal (30% modulation, 3 kHz, L-only, with noise reduction) to the COMPOSITE SIGNAL INPUT pin. (4) Adjust the variable resistor connected to the SPECTRAL RMS SETTING pin so that the output at the R CHANNEL OUTPUT pin is minimized. (5) Repeat steps (1) and (2). Caution Be sure to perform step (5). 22 Data Sheet S11666EJ4V0DS00 µPC1876 5.4 SAP VCO Adjustment Perform this adjustment with the filter unless otherwise recommended. Be sure to adjust SAP VCO after 5.2. Filter adjustment. Usually, the filter and SAP VCO are adjusted simultaneously. For this reason, when this adjustment is performed, the applications of the SAP VCO SETTING pin and the FILTER ADJUSTMENT pin are modified to add variable resistor. (1) Input no signal to the COMPOSITE SIGNAL INPUT pin and measure the DC voltage of the SAP SINGLE OUTPUT pin. (2) Input SAP signal (5 fH, no modulation) to the COMPOSITE SIGNAL INPUT pin. Adjust the variable resistor connected to the SAP VCO SETTING pin so that the DC voltage of the SAP SINGLE OUTPUT pin may match with the DC voltage measured in step (1). 5.5 List of Pin Settings in Adjustment Pin Name SAP1/2 ST/SAP MUTE FMONO Stereo VCO Adjustment – – – – Filter Adjustment – – L (OFF) – Separation Adjustment – – L (OFF) H (OFF) SAP VCO Adjustment – – L (OFF) – Adjustment Remark –: Don’t care. Data Sheet S11666EJ4V0DS00 23 µPC1876 6. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = +25˚C) Parameter Symbol Conditions Ratings Unit 11 V 30 mA VCC + 0.2 V Supply voltage VCC LED driver current ID Current fed into SAPL and STL pins Control pin voltage Vcont Voltage applied to fHSW, SAP1/2, ST/SAP, MUTE and FMONO pins Input signal voltage Vin Voltage applied to COM pin VCC V Power dissipation PD TA = 75˚C, in using the Universal (10 × 10 cm2) Glass Epoxy Board 500 mW Operating ambient temperature TA VCC = 9 V –20 to +75 ˚C Storage temperature Tstg –40 to +125 ˚C Caution If any of the parameters exceeds the absolute maximum ratings, even momentarily, the device reliability may be impaired. The absolute maximum ratings are values that may physically damage the product. Be sure to use the product within the ratings. Recommended Operating Conditions Parameter Symbol Conditions MIN. TYP. MAX. Unit 8.0 9.0 10.0 V 25 mA Supply voltage VCC LED driver current ID Current fed into SAPL and STL pins Output load impedance 1 RL1 A.C. load impedance which can drive output from ROT and LOT pins. (at 100% modulation) 2 kΩ Output load impedance 2 RL2 A.C. load impedance which can drive output from SOT pin. (at 100% modulation) 10 kΩ Input signal voltage Vin Signal voltage applied to COM pin Control pin voltage 1 (High) VcontH1 Control pin voltage 1 (Low) VcontL1 Control pin voltage 2 (High) VcontH2 Control pin voltage 2 (Mid.) Control pin voltage 2 (Low) 24 L + R signal (100% modulation) 0.424 Vp-p L – R signal (100% modulation) 0.848 Vp-p Pilot signal 0.0848 Vp-p SAP signal 0.254 Vp-p SAP1/2, ST/SAP and MUTE pins 3.5 VCC V 0 0.8 V 3.5 VCC V VcontM2 1.5 2.5 V VcontL2 0 0.8 V FMONO pin Data Sheet S11666EJ4V0DS00 µPC1876 Electrical Characteristics (TA = +25˚C, RH ≤ 70%, VCC = 9.0 V unless otherwise specified) (1/2) Parameter Symbol Test conditions MIN. TYP. MAX. Unit Supply current ICC No signal 19 27 38 mA Stereo detection input sensitivity STSENSE f = 15.734 kHz, sine wave 9 13 18 mVr.m.s. Stereo detection hysteresis STHY Input stereo pilot signal only 5.0 7.5 10.0 dB Stereo detection capture range CCH Vin = 30 mVr.m.s. 2.5 4.0 5.5 % CCL Input stereo pilot signal only –5.5 –4.0 –2.5 % SAP detection input sensitivity SAPSENSE f = 78.67 kHz, 0% modulation Input SAP carrier only 17 23 30 mVr.m.s. SAP detection hysteresis SAPHY f = 78.67 kHz, 0% modulation Input SAP carrier only 3.3 4.8 6.3 dB Noise detection input sensitivity NOSENSE Input sine wave Frequency: noise BPF peak point 21 30 40 mVr.m.s. Noise detection hysteresis NOHY Input sine wave Frequency: noise BPF peak point 1.0 2.0 3.0 dB Monaural total output voltage VOMO f = 300 Hz, 100% modulation 450 500 550 mVr.m.s. Stereo total output voltage VOST f = 300 Hz, 100% modulation 450 500 550 mVr.m.s. SAP total output voltage VOSAP1 f = 300 Hz, 100% modulation 400 500 600 mVr.m.s. SAP single output voltage VOSAP2 f = 300 Hz, 100% modulation Noise reduction : OFF 450 500 550 mVr.m.s. Difference between monaural VOLR f = 300 Hz, 100% modulation –0.5 0 +0.5 dB Monaural total frequency characteristics 1 VOMO1 f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) –0.5 0 +0.5 dB Monaural total frequency characteristics 2 VOMO2 f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) –0.5 0 +0.5 dB Monaural total frequency characteristics 3 VOMO3 f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) –0.8 0 +0.8 dB Monaural total frequency characteristics 4 VOMO4 f = 12 kHz, 30% modulation (f = 300 Hz : 0 dB) –3.0 –1.5 –0.5 dB Stereo total frequency VOST1 f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) –0.5 0 +0.5 dB Stereo total frequency characteristics 2 VOST2 f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) –0.5 0 +0.5 dB Stereo total frequency characteristics 3 VOST3 f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) –1.7 –0.8 +0.1 dB Stereo total frequency characteristics 4 VOST4 f = 12 kHz, 30% modulation (f = 300 Hz : 0 dB) –6.0 –4.0 –2.5 dB SAP total frequency characteristics 1 VOSAP11 f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) –1.2 +0.3 +1.2 dB SAP total frequency characteristics 2 VOSAP12 f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) –0.6 +0.5 +1.6 dB SAP total frequency characteristics 3 VOSAP13 f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) –2.5 –0.5 +1.5 dB L and R output voltage characteristics 1 Data Sheet S11666EJ4V0DS00 25 µPC1876 (2/2) Parameter Symbol Test conditions MIN. TYP. MAX. Unit SAP single frequency characteristics 1 VOSAP21 f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) Noise reduction : OFF –0.5 0 +0.5 dB SAP single frequency characteristics 2 VOSAP22 f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) Noise reduction : OFF –0.5 0 +0.5 dB SAP single frequency characteristics 3 VOSAP23 f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) Noise reduction : OFF –1.0 0 +1.0 dB Stereo channel separation 1 Sep1 f = 300 Hz, 30% modulation 27 32 – dB Stereo channel separation 2 Sep2 f = 1 kHz, 30% modulation 25 30 – dB Stereo channel separation 3 Sep3 f = 3 kHz, 30% modulation 27 35 – dB Monaural total distortion rate THDMO f = 1 kHz, 100% modulation – 0.1 0.5 % Stereo total distortion rate 1 THDST1 f = 1 kHz, 100% modulation – 0.3 1.5 % Stereo total distortion rate 2 THDST2 f = 8 kHz, 30% modulation – 0.8 1.8 % SAP total distortion rate THDSAP1 f = 1 kHz, 100% modulation – 0.5 2.0 % SAP single distortion rate THDSAP2 f = 1 kHz, 100% modulation, Noise reduction : OFF – 0.7 2.0 % Cross talk 1 SAP → stereo CT1 SAP: f = 3 kHz, 30% modulation Stereo: L-only, f = 800 Hz, 30% modulation – –60 –50 dB Cross talk 2 stereo → SAP CT2 SAP: f = 800 Hz, 30% modulation Stereo: L-only, f = 3 kHz, 30% modulation – –60 –50 dB Total muting level Mute f = 1 kHz, 100% modulation 60 70 – dB LED driver saturation voltage VOSAT ID = 10 mA – 0.1 0.3 V dbx timing current IT Current flowing into STI, WTI pins 7.1 7.5 7.9 µA Inter-mode DC offset 1 VDOF1 Mute → Monaural No signals –50 0 +50 mV Inter-mode DC offset 2 VDOF2 Mute → Stereo Input pilot signal only –50 0 +50 mV Inter-mode DC offset 3 VDOF3 Mute → SAP1 Input 5fH signal only –50 0 +50 mV Monaural total S/N S/NMO f = 300 Hz, 100% modulation Pre-emphasis : ON 65 68 – dB Stereo total S/N S/NST f = 300 Hz, 100% modulation 65 68 – dB SAP total S/N S/NSAP Noise reduction : ON 70 80 – dB Reference voltage Vref 1.5 V pin 1.35 1.50 1.65 V DC output saturation voltage VOSAT2 DCO pin, I = 1 mA – 0.1 0.3 V 26 Data Sheet S11666EJ4V0DS00 µPC1876 Electrical Characteristics Measurement List (TA = +25˚C, RH ≤ 70%, VCC = 9.0 V) (1/6) Parameter Symbol Measurement Supply current ICC Current flowing to VCC pin (no signal). Stereo detection input sensitivity STSENSE Input signal (f = 15.734 kHz) to COM pin. Raise input voltage gradually until stereo LED turns ON. Then measure input voltage of COM pin. Stereo detection hysteresis STHY Input signal (f = 15.734 kHz) to COM pin for stereo LED to be ON. Lower input voltage gradually until stereo LED turns OFF. Then assume input voltage “V”. STSENSE STHY = 20 log V Stereo detection capture range CC Input signal (f = 14.5 kHz, Vin = 0.0848 Vp-p [30 mVr.m.s.]) to COM pin. Raise input frequency gradually until stereo LED turns ON. Then assume input frequency “fin1”. 15.734 [kHz] – fin1 CC = 15.734 [kHz] Next, input signal (f = 17.0 kHz, Vin = 0.0848 Vp-p [30 mVr.m.s.]) to COM pin. Lower input frequency gradually until stereo LED turns ON. Then assume input frequency “fin2”. fin2 – 15.734 [kHz] CC = 15.734 [kHz] SAP detection input sensitivity SAPSENSE Input signal (f = 78.67 kHz, no modulation) to COM pin. Raise input voltage gradually SAP detection hysteresis SAPHY Input signal (f = 78.67 kHz, no modulation) to COM pin for SAP LED to be ON. Lower input voltage gradually until SAP LED turns OFF. Then assume input voltage “V”. SAPSENSE SAPHY = 20 log V Noise detection input sesitivity NOSENSE Apply 6.0 V to SDT pin. Input signal (f = 160 kHz, Vin = 10 mVr.m.s.) to COM pin. Raise frequency and measure the DC voltage of NDT pin. At maximum voltage, raise input voltage gradually until SAP LED turns OFF. Then measure input voltage of COM pin. Noise detection hysteresis NOHY Apply 6.0 V to SDT pin. Input signal (f = 160 kHz, Vin = 90 mVr.m.s.) to COM pin. Raise frequency and measure the DC voltage of NDT pin. At maximum voltage, lower input voltage gradually until SAP LED turns ON. Then assume input voltage of COM pin “V”. NOSENSE NOHY = 20 log V Monaural total output voltage VOMO Set MUTE and FMONO pins to “L”. Input monaural signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of ROT pin. Execute the same operation for LOT pin. Stereo total output voltage VOST Set ST/SAP and FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of LOT pin. Execute the same operation for ROT pin (R-only signal). SAP total output voltage VOSAP1 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of ROT pin. Execute the same operation for LOT pin. SAP single output voltage VOSAP2 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of SOT pin. (Noise reduction : OFF) until SAP LED turns ON. Then measure input volage of COM pin. Data Sheet S11666EJ4V0DS00 27 µPC1876 (2/6) Parameter Symbol Measurement Difference between monaural L and R output voltage VOLR Set MUTE and FMONO pin to “L”. Input monaural signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of ROT and LOT pin. Assume the output voltage of ROT pin “VROT” and the output voltage of LOT pin “VLOT”. VROT VOLR = 20 log VLOT Monaural total frequency characteristics 1 VOMO1 Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of ROT pin “V1k(MO)”. V1k(MO) VOMO1 = 20 log V300(MO) Execute the same operation for LOT pin. Monaural total frequency characteristics 2 VOMO2 Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of ROT pin “V3k(MO)”. V3k(MO) VOMO2 = 20 log V300(MO) Execute the same operation for LOT pin. Monaural total frequency characteristics 3 VOMO3 Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of ROT pin “V8k(MO)”. V8k(MO) VOMO3 = 20 log V300(MO) Execute the same operation for LOT pin. Monaural total frequency characteristics 4 VOMO4 Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 12 kHz) to COM pin. Assume output voltage of ROT pin “V12k(MO)”. V12k(MO) VOMO4 = 20 log V300(MO) Execute the same operation for LOT pin. Stereo total frequency characteristics 1 VOST1 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of LOT pin “V1k(ST)”. V1k(ST) VOST1 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). Stereo total frequency characteristics 2 VOST2 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of LOT pin “V3k(ST)”. V3k(ST) VOST2 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). 28 Data Sheet S11666EJ4V0DS00 µPC1876 (3/6) Parameter Symbol Measurement Stereo total frequency characteristics 3 VOST3 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of LOT pin “V8k(ST)”. V8k(ST) VOST3 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). Stereo total frequency characteristics 4 VOST4 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 12 kHz) to COM pin. Assume output voltage of LOT pin “V12k(ST)”. V12k(ST) VOST4 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). SAP total frequency characteristics 1 VOSAP11 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of LOT pin “V1k(SAP)”. V1k(SAP) VOSAP11 = 20 log V300(SAP) Execute the same operation for ROT pin. SAP total frequency characteristics 2 VOSAP12 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of LOT pin “V3k(SAP)”. V3k(SAP) VOSAP12 = 20 log V300(SAP) Execute the same operation for ROT pin. SAP total frequency characteristics 3 VOSAP13 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of LOT pin “V8k(SAP)”. V8k(SAP) VOSAP13 = 20 log V300(SAP) Execute the same operation for ROT pin. SAP single frequency characteristics 1 VOSAP21 Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of SOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of SOT pin “V1k(SAP)”. V1k(SAP) VOSAP21 = 20 log V300(SAP) (Noise reduction OFF) Data Sheet S11666EJ4V0DS00 29 µPC1876 (4/6) Parameter Symbol Measurement SAP single frequency characteristics 2 VOSAP22 Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of SOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of SOT pin “V3k(SAP)”. V3k(SAP) VOSAP22 = 20 log V300(SAP) (Noise reduction OFF) SAP single frequency characteristics 3 VOSAP23 Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of SOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of SOT pin “V8k(SAP)”. V8k(SAP) VOSAP23 = 20 log V300(SAP) (Noise reduction OFF) Stereo channel separation 1 Sep1 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “VROT” and output voltage of LOT pin “VLOT”. VLOT VROT Execute the same operation for R-only signal. (Sound multiplex signal generator: 465Z (manufactured by EIDEN Co. Ltd.)) Sep1 = 20 log Stereo channel separation 2 Sep2 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of ROT pin “VROT” and output voltage of LOT pin “VLOT”. VLOT Sep2 = 20 log VROT Execute the same operation for R-only signal. (Sound multiplex signal generator: 465Z (manufactured by EIDEN Co. Ltd.)) Stereo channel separation 3 Sep3 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of ROT pin “VROT” and output voltage of LOT pin “VLOT”. VLOT Sep3 = 20 log VROT Execute the same operation for R-only signal. (Sound multiplex signal generator: 465Z (manufactured by EIDEN Co. Ltd.)) Monaural total distortion rate THDMO Set MUTE and FMONO pins to “L”. Input monaural signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of ROT and LOT pin. Stereo total distortion rate 1 THDST1 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of LOT pin. Execute the same operation for R-only signal (ROT pin). Stereo total distortion rate 2 THDST2 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (100% modulation, f = 8 kHz) to COM pin. Measure output distortion rate of LOT pin. Execute the same operation for R-only signal (ROT pin). SAP total distortion rate THDSAP1 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of ROT and LOT pin. 30 Data Sheet S11666EJ4V0DS00 µPC1876 (5/6) Parameter Symbol Measurement SAP single distortion rate THDSAP2 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of SOT pin. (nosie reduction OFF) Cross talk 1 SAP → stereo CT1 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (f = 800 Hz, 30% modulation) and SAP signal (f = 3 kHz, 30% modulation) to COM pin. Assume output voltage of the LOT pin “VLOT”. Connect LOT pin to 3 kHz BPF (gain = 0 dB at f = 3 kHz, –80 dB or more at f = 800 Hz) to LOT pin. Assume output voltage of BPF “VLOTCT1”. VLOTCT1 CT1 = 20 log VLOT Cross talk 2 stereo → SAP CT2 Set SAP1/2, ST/SAP pins to “L” and FMONO pin to “H”. Input L-only signal (f = 3 kHz, 30% modulation) and SAP signal (f = 800 Hz, 30% modulation) to COM pin. Assume output voltage of the LOT pin “VLOT”. Connect LOT pin to 3 kHz BPF (gain = 0 dB at f = 3 kHz, –80 dB or more at f = 800 Hz) to LOT pin. Assume output voltage of BPF “VLOTCT2”. VLOTCT2 CT2 = 20 log VLOT Total muting level Mute Set MUTE and FMONO pins to “L”. Input monaural signal (100% modulation, f = 1 kHz) to COM pin. Assume output voltage of ROT pin “VOMO”. Set FMONO pin to “H”. Assume output voltage of ROT pin “VMUTE”. VOMO Mute = 20 log VMUTE Execute the same operation for LOT and NOT pins. LED driver saturation voltage VOSAT Apply current (10 mA) to SAPL, STL pins, and measure input voltage of the pin. dbx timing current IT Input DC voltage (6 V) to STI and WTI pins, and measure current of the pin. Inter-mode DC offset 1 mute → monaural VDOF1 Set FMONO pin to “L”. Apply DC 1 V to fHSW pin and DC 6 V to SDT pin. Set MUTE pin to “H”. Assume output voltage of ROT pin “VMU”. Next, input no signal to COM pin to change MUTE pin to “L”. Assume output voltage of ROT pin “VMO”. VDOF1 = VMO – VMU Execute the same operation for LOT pin. Inter-mode DC offset 2 mute → stereo VDOF2 Set ST/SAP, FMONO pins to “H”. Apply DC 1 V to fHSW pin and DC 6 V to SDT pin. Set MUTE pin to “H”. Assume output voltage of ROT pin “VMU”. Next, input pilot signal to COM pin to change MUTE pin to “L”. Assume output voltage of ROT pin “VST”. VDOF2 = VST – VMU Execute the same operation for LOT pin. Inter-mode DC offset 3 mute → SAP VDOF3 Set FMONO pin to “H” and SAP1/2, ST/SAP pins “L”. Apply DC 1 V to fHSW pin and DC 6 V to SDT pin. Set MUTE pin to “H”. Assume output voltage of ROT pin “VMU”. Next, input 5fH signal to COM pin to change MUTE pin to “L”. Assume output voltage of ROT pin “VSAP”. VDOF3 = VSAP – VMU Execute the same operation for LOT pin. Data Sheet S11666EJ4V0DS00 31 µPC1876 (6/6) Parameter Symbol Measurement Monaural total S/N S/NMO Set MUTE and FMONO pins to “L”. Input no signal to COM pin, and assume output voltage of ROT pin “VNMO”. Input monaural signal (100% modulation, f = 300 Hz) to COM pin, and assume output voltage of ROT pin “VSMO”. VSMO S/NMO = 20 log VNMO Execute the same operation for LOT pin. Stereo total S/N S/NST Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input pilot signal to COM pin, and assume output voltage of ROT pin “VNST”. Input stereo signal (100% modulation, f = 300 Hz) to COM pin, and assume output voltage of ROT pin “VSST”. VSST S/NST = 20 log VNST Execute the same operation for LOT pin. SAP total S/N S/NSAP Set FMONO pin to “H” and SAP1/2, ST/SAP pins to “L”. Input 5fH signal to COM pin, and assume output voltage of ROT pin “VNSAP”. Input SAP signal (100% modulation, f = 300 Hz) to COM pin, and assume output voltage of ROT pin “VSSAP”. VSSAP S/NSAP = 20 log VNSAP Execute the same operation for LOT pin. Reference voltage Vref Measure DC voltage of 1.5 V pin. DC saturation voltage VOSAT2 Apply flowing current (1 mA) to DCO pin and measure DC voltage of DCO pin. 32 Data Sheet S11666EJ4V0DS00 µPC1876 Measuring Circuit Mode Table (1/2) User ModeNote Item S1 Measuring ST Mute F-Monaural Equipment SG/MODE S2 SA Supply current – – – – DC ammeter No signal Stereo detection input sensitivity – ST OFF OFF AC voltmeter Pilot Stereo detection hysteresis – ST OFF OFF Stereo detection capture range – ST OFF OFF AC voltmeter f-counter Sin wave SG SAP detection input sensitivity – SA OFF OFF AC voltmeter SAP SAP detection hysteresis – SA OFF OFF Noise detection input sensitivity – SA OFF OFF Sin wave SG Noise detection hysteresis – SA OFF OFF AC voltmeter DC voltmeter Monaural total output voltage – – OFF – AC voltmeter Monaural Stereo total output voltage – ST OFF OFF Stereo S1 SA OFF OFF SAP SAP single output voltage – SA OFF OFF SAP (NR OFF) Difference between monaural L and R output – – OFF – Monaural total frequency characteristics 1 – – OFF – Monaural total frequency characteristics 2 – – OFF – Monaural total frequency characteristics 3 – – OFF – Monaural total frequency characteristics 4 – – OFF – Stereo total frequency characteristics 1 – ST OFF OFF Stereo total frequency characteristics 2 – ST OFF OFF Stereo total frequency characteristics 3 – ST OFF OFF Stereo total frequency characteristics 4 – ST OFF OFF SAP total frequency characteristics 1 S1 SA OFF OFF SAP total frequency characteristics 2 S1 SA OFF OFF SAP total frequency characteristics 3 S1 SA OFF OFF SAP single frequency characteristics 1 – SA OFF OFF SAP single frequency characteristics 2 – SA OFF OFF SAP single frequency characteristics 3 – SA OFF OFF Stereo channel separation 1 – ST OFF OFF Stereo channel separation 2 – ST OFF OFF Stereo channel separation 3 – ST OFF OFF Monaural total distortion rate – – OFF – Stereo total distortion rate 1 – ST OFF OFF Stereo total distortion rate 2 – ST OFF OFF S1 SA OFF OFF SAP – SA OFF OFF SAP (NR OFF) SAP total output voltage Monaural voltages SAP total distortion rate SAP single distortion rate AC voltmeter Monaural AC voltmeter L-only R-only AC voltmeter SAP AC voltmeter SAP (NR OFF) AC voltmeter L-only R-only Distortion meter Monaural Stereo Note ST: Stereo, SA: SAP, S1: SAP1, S2: SAP2, –: free Data Sheet S11666EJ4V0DS00 33 µPC1876 (2/2) User Item S1 ModeNote Measuring ST SG/MODE Mute F-Monaural Equipment AC voltmeter Stereo SAP S2 SA Cross talk 1 SAP → Stereo – ST OFF OFF Cross talk 2 Stereo → SAP S1 SA OFF OFF Total muting level – – ON OFF – AC voltmeter Monaural LED driver saturation voltage – – OFF OFF DC voltmeter Stereo SAP dbx timing current – – OFF OFF DC ammeter No signal Inter-mode DC offset 1 Mute → monaural – – ON OFF – DC voltmeter No signal Inter-mode DC offset 2 Mute → stereo – ST ON OFF OFF Pilot Inter-mode DC offset 3 Mute → SAP S1 SA ON OFF OFF 5fH signal Monaural total S/N – – OFF – Stereo total S/N – ST OFF OFF Pilot S1 SA OFF OFF SAP SAP total S/N Note ST: Stereo, SA: SAP, S1: SAP1, S2: SAP2, –: free 34 Data Sheet S11666EJ4V0DS00 AC voltmeter No signal µPC1876 7. MEASURING CIRCUIT VCC (9 V) fH GND + µ PC842C 2/2 100 µF 0.1 µ F + – 1 MΩ 10 kΩ 10 kΩ + 1 kΩ 2.2 kΩ ST SAP 22 21 23 20 24 19 25 18 26 17 27 16 10 µF 28 15 10 µF 29 6.8 kΩ Note 2 + + Lch + IC Rch 1 µF + 22 µF 1.5 V pin ∗33 kΩ 10 kΩ ∗33 kΩ ∗47 kΩ 20 kΩ 0.1 µ F + 1 kΩ + 4.7 µF 1 µF 4 3 ∗∗ 33 10 34 9 35 8 36 7 37 6 38 5 + 39 4 40 3 0.047 µF 41 2 42 1 1 2 30 kΩ ∗∗ 100 kΩ 51 kΩ + 6 Note 1 20 kΩ 10 µF 3.3 µF + 32 31 0.1 µ F 1 kΩ 50 kΩ 51 kΩ ∗56 kΩ 14 ∗56 kΩ 1 µF 5.1 kΩ 13 3 kΩ + 1 µF 12 + 11 30 10 µF 6.8 kΩ 10 µF + µ PC842C 1/2 + 0.1 µF 91 kΩ 10 µF – 3 kΩ + 47 µ F + 0.1 µF 0.1 µF 68 kΩ 0.47 µF 465Z (manufactured by EIDEN Co. Ltd.) 0.01 µ F 2.2 µ F 20 kΩ ATT + OUT SG GND Notes 1. Filter: 126XGS-7990Z, manufactured by Toko Co. Ltd. 2. Do not leave the Internally Connected (IC) pin open because it is a base-open pin. Connect this pin to VCC or GND. Remark Use the following for external parts. Resistor (∗) : Metal film resistor (±1%). Unless otherwise specified; ±5% Capacitors (∗∗) : Tantalum capacitor (±10%). Unless otherwise specified; ±20% Variable resistors: ±10% Data Sheet S11666EJ4V0DS00 35 µPC1876 8. DIFFERENCES BETWEEN THE µPC1876GT AND µPC1872GT µPC1876GT µPC1872GT Stereo VCO adjustment external 38 38 resistor 43 kΩ ±1% 47 kΩ ±1% 20 kΩ ±10% Filter adjustment input frequency Stereo VCO adjustment 20 kΩ ±10% Stereo VCO adjustment 15.734 kHz (= fH) 16.5 kHz Filter adjustment external resistor 36 33 kΩ ±1% 10 kΩ ±10% Stereo total frequency chatacteristics 3 37 36 33 kΩ ±1% 33 kΩ ±1% Filter adjustment 37 30 kΩ ±1% 10 kΩ ±10% Filter adjustment MIN. TYP. MAX. Unit MIN. TYP. MAX. Unit –1.7 –0.8 +0.1 dB –0.9 0.0 +0.9 dB –6.0 –4.0 –2.5 dB –5.0 –2.5 –1.0 dB –0.6 +0.5 +1.6 dB –0.3 +0.8 +1.9 dB –2.5 –0.5 +1.5 dB –1.0 +1.0 +3.0 dB At f = 8 kHz Stereo total frequency chatacteristics 4 At f = 12 kHz SAP total frequency chatacteristics 2 At f = 3 kHz SAP total frequency chatacteristics 3 At f = 8 kHz 36 Data Sheet S11666EJ4V0DS00 µPC1876 9. PACKAGE DRAWING 42-PIN PLASTIC SSOP (9.53 mm (375)) 42 22 detail of lead end P 1 21 A F H G I J S N C D M S L B M K E NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition. ITEM A MILLIMETERS 18.16 MAX. B 1.13 MAX. C 0.8 (T.P.) D 0.35+0.10 −0.05 E 0.125±0.075 F 2.9 MAX. G 2.5±0.2 H I J 10.3±0.3 7.15±0.2 1.6±0.2 0.15+0.10 −0.05 K L M 0.8±0.2 0.10 N 0.10 P 3° +7° −3° S42GT-80-375B-2 Data Sheet S11666EJ4V0DS00 37 µPC1876 10. RECOMMENDED SOLDERING CONDITIONS This product should be soldered and mounted under the conditions recommended in the table below. For details of recommended soldering conditions, refer to the information document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended below, contact an NEC sales representative. Table 10-1. Surface Mounting Type Soldering Conditions µPC1876GT: 42-pin plastic SSOP (9.53 mm (375)) Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235°C, Duration: 30 sec. max. (at 210°C or above), Symbol IR35-00-3 Number of times: 3 times max. VPS Package peak temperature: 215°C, Duration: 40 sec. max. (at 200°C or above), VP15-00-3 Number of times: 3 times max. Wave soldering Solder bath temperature: 260°C max., Duration: 10 sec. max., Number of times: Once, WS60-00-1 Preliminary heat temperature: 120°C max. (package surface temperature) Partial heating Pin temperature: 300°C max., Duration: 3 sec. max. (per pin row) Caution Do not use different soldering methods together (except in the case of partial heating). 38 Data Sheet S11666EJ4V0DS00 — µPC1876 [MEMO] Data Sheet S11666EJ4V0DS00 39 µPC1876 • The information in this document is current as of May, 2000. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. 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(Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4