NEC UPC2753GR

DATA SHEET
BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT
µPB1005GS
REFERENCE FREQUENCY 16.368 MHz, 2ND IF FREQUENCY 4.092 MHz
RF/IF FREQUENCY DOWN-CONVERTER +
PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER
DESCRIPTION
The µPB1005GS is a silicon monolithic integrated circuit for GPS receiver.
This IC is designed as double
conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip.
The µPB1005GS features shrink package, fixed prescaler and supply voltage. The 30-pin plastic SSOP package
is suitable for high density surface mounting. The fixed division internal prescaler is needless to input serial counter
data. Supply voltage is 3 V. Thus, the µPB1005GS can make RF block fewer components and lower power
consumption.
This IC is manufactured using NEC’s 20 GHz fT NESATTMIII silicon bipolar process. This process uses direct
silicon nitride passivation film and gold electrodes. These materials can protect the chip surface from pollution and
prevent corrosion/migration. Thus, this IC realizes excellent performance, uniformity and reliability.
FEATURES
• Double conversion
: fREFin = 16.368 MHz, f2ndIFout = 4.092 MHz
• Integrated RF block
: RF/IF frequency down-converter + PLL frequency synthesizer
• High-density surface mountable : 30-pin plastic SSOP (9.85 × 6.1 × 2.0 mm)
• Needless to input counter data : fixed division internal prescaler
• VCO side division
: ÷ 200 (÷ 25, ÷ 8 serial prescaler)
• Reference division
: ÷2
• Supply voltage
: VCC = 2.7 to 3.3 V
• Low current consumption
: ICC = 45.0 mA TYP.@VCC = 3.0 V
• Gain adjustable externally
: Gain control voltage pin (control voltage up vs. gain down)
APPLICATION
• Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz
ORDERING INFORMATION
Part Number
µPB1005GS-E1
Remark
Package
Supplying Form
30-pin plastic SSOP
(7.62 mm (300))
Embossed tape 16 mm wide.
Pin 1 is in tape pull-out direction.
QTY 2.5 kpcs/reel.
To order evaluation samples, please contact your local NEC sales office. (Part number for sample
order: µPB1005GS)
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P13860EJ3V0DS00 (3rd edition)
Date Published April 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1998, 2000
µPB1005GS
PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM
2
IF-MIXin
1
30
VCC (IF-MIX)
GND (IF-MIX)
2
29
VGC (IF-MIX)
RF-MIXout
3
28
IF-MIXout
VCC (RF-MIX)
4
27
GND (2ndIF-AMP)
26
2ndlFin1
25
2ndlFin2
7
24
2ndlFbypass
8
23
VCC (2ndIF-AMP)
22
2ndIFout
21
REFout
RF-MIXin
5
GND (RF-MIX)
6
VCC (1stLO-OSC)
1stLO-OSC1
1stLO-OSC2
9
GND (1stLO-OSC)
10
VCC (phase detector)
11
PD-Vout3
12
PD-Vout2
÷25
÷8
20
VCC (reference block)
19
REFin
13
18
GND (divider block)
PD-Vout1
14
17
LOout
GND (phase detector)
15
16
VCC (divider block)
PD
÷2
Data Sheet P13860EJ3V0DS00
µPB1005GS
PRODUCT LINE-UP (TA = +25°°C, VCC = 3.0 V)
Type
General
Purpose
Wideband
Separate
IC
Functions
(Frequency unit: MHz)
Part Number
µPC2756T
VCC
(V)
ICC
(mA)
CG
(dB)
TA
(°C)
6
14
−40 to
+85
RF down-converter with osc. Tr 2.7 to 3.3
µPC2756TB
µPC2753GR
Available
6-pin
minimold
20-pin plastic
SSOP
2.7 to 3.3
6.5
60 to 79
Clock
µPB1003GS
Frequency
Specific
1 chip IC
RF/IF down-converter
+ PLL synthesizer
REF = 18.414
1stIF = 28.644/2ndIF = 1.023
2.7 to 3.3
37.5
72 to 92
−20 to
+85
µPB1004GS
RF/IF down-converter
+ PLL synthesizer
REF = 16.368
1stIF = 61.380/2ndIF = 4.092
2.7 to 3.3
37.5
72 to 92
−20 to
+85
2.7 to 3.3
45.0
72 to 92
−40 to
+85
Remark
Status
6-pin super
minimold
IF down-converter with gain
control amplifier
µPB1005GS
Package
Discontinued
30-pin plastic
SSOP
Available
Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
To know the associated products, please refer to their latest data sheets.
SYSTEM APPLICATION EXAMPLE
GPS receiver RF block diagram
• f0 = 1.023 MHz in the diagram.
60f0
RF-MIXout
1575.42 MHz
from
Antenna
LNA
1540f0
• µ PB1005GS is in
40f0
BPF
IF-MIXin
LPF
IF-MIXout
VGC
2ndlF-Amp
IF-MIX
RF-MIX
4.092 MHz
4f0
1540f0
example: µ PC2749TB
.
2ndlFin1
2ndlFin2
2ndlFbypass
Buff
to Demodulator
BPF
64f0
8f0
1/25
1/8
PD
16f0
1/2
1600f0
16.368 MHz
Buff
to Demodulator
REF
OSC
LOOP
8f0 AMP
1stLO-OSC1
1stLO-OSC2
16f0
LOout
VCC
TCXO
16.368 MHz
Caution
This diagram schematically shows only the µPB1005GS’s internal functions on the system.
This diagram does not present the actual application circuits.
Data Sheet P13860EJ3V0DS00
3
µPB1005GS
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Conditions
Ratings
Unit
Supply Voltage
VCC
TA = +25°C
3.6
V
Total Circuit Current
ICC
TA = +25°C
128
mA
Power Dissipation
PD
Mounted on double-sided copper clad
50 × 50 × 1.6 mm epoxy glass PWB at TA = +85°C
464
mW
Operating Ambient Temperature
TA
−40 to +85
°C
Storage Temperature
Tstg
−55 to +150
°C
RECOMMENDED OPERATING RANGE
Parameter
4
Symbol
MIN.
TYP.
MAX.
Unit
Supply Voltage
VCC
2.7
3.0
3.3
V
Operating Ambient Temperature
TA
−40
+25
+85
°C
RF Input Frequency
fRFin

1575.42

MHz
1stLO Oscillating Frequency
f1stLOin
1616.80
1636.80
1656.80
MHz
1stIF Input Frequency
f1stIFin

61.380

MHz
2ndLO Input Frequency
f2ndLOin

65.472

MHz
2ndIF Input/output Frequency
f2ndIFin
f2ndIFout

4.092

MHz
Reference Input/output Frequency
fREFin
fREFout

16.368

MHz
Data Sheet P13860EJ3V0DS00
µPB1005GS
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°°C, VCC = 3.0 V)
Parameter
Total Circuit Current
Symbol
ICCtotal
Conditions
ICC1 + ICC2 + ICC3 + ICC4
MIN.
TYP.
MAX.
Unit
32.0
45.0
60.0
mA
RF Down-converter Block (fRFin = 1575.42 MHz, f1stLOin = 1636.80 MHz, PLOin = −10 dBm, ZL = ZS = 50 Ω)
Circuit Current 1
ICC1
No Signals
6.0
10.0
14.0
mA
RF Conversion Gain
CGRF
PRFin = −40 dBm
12.5
15.5
18.5
dB
RF-SSB Noise Figure
NFRF
PRFin = −40 dBm
7
10
13
dB
PO(sat)RF
PRFin = −10 dBm
−5.5
−2.5
+0.5
dBm
Maximum IF Output Power
IF Down-converter Block (f1stIFIn = 61.38 MHz, f2ndLOIn = 65.472 MHz, ZS = 50 Ω, ZL = 2 kΩ)
Circuit Current 2
IF Voltage Conversion Gain
IF-SSB Noise Figure
Maximum 2nd IF Output
Power
ICC2
No Signals
3.4
5.3
7.2
mA
CG(GV)IF
at Maximum Gain, P1stIFin = −50 dBm
38
41
44
dB
NFIF
at Maximum Gain, P1stIFin = −50 dBm
8.5
11.5
14.5
dB
PO(sat)IF
at Maximum Gain, P1stIFin = −20 dBm
−9.5
−6.5
−3.5
dBm
Gain Control Voltage
VGC
Voltage at Maximum Gain of CGIF


1.0
V
Gain Control Range
DGC
P1stIFin = −50 dBm
20


dB
1.55
2.40
3.25
mA
2nd IF Amplifier (f2ndIF = 4.092 MHz, ZS = 50 Ω, ZL = 2 kΩ)
Circuit Current 3
ICC3
No Signals
Voltage Gain
GV
P2ndIFin = −60 dBm
37
40
43
dB
PO(sat)
P2ndIFin = −30 dBm
−14.5
−11.5
−8.5
dBm
PLL All Block Operating
18.5
28.5
38.5
mA
PLL Loop
8.0
8.184
8.4
MHz
ZL = 10 kΩ//20 pF (Impedance of
measurement equipment)
200


mVP-P
Maximum Output Power
PLL Synthesizer Block
Circuit Current 4
Phase Comparing
Frequency
ICC4
fPD
Reference Input Minimum
Level
VREFin
Loop Filter Output Level (H)
VLP(H)
2.8


V
Loop Filter Output Level (L)
VLP(L)


0.4
V
Reference Output Swing
VREFout
1.0


VP-P
ZL = 10 kΩ//2 pF (Impedance of
measurement equipment)
Data Sheet P13860EJ3V0DS00
5
µPB1005GS
STANDARD CHARACTERISTICS (Unless otherwise specified TA = +25°°C, VCC = 3.0 V)
Parameter
Symbol
Conditions
Reference
Unit
RF Down-converter Block (P1stLOin = −10 dBm, ZL = ZS = 50 Ω)
LO Leakage to IF Pin
LOif
f1stLOin = 1636.80 MHz
−30
dBm
LO Leakage to RF Pin
LOrf
f1stLOin = 1636.80 MHz
−30
dBm
fRFin1 = 1600 MHz, fRFin2 = 1605 MHz
f1stLOin = 1660 MHz
−13
dBm
Input 3rd Order Intercept
Point
IIP3RF
IF Down-converter Block (1stLO oscillating, ZS = 50 Ω, ZL = 2 kΩ)
6
LO Leakage to 2nd IF Pin
LO2ndif
f2ndLOin = 65.472 MHz
−20
dBm
LO Leakage to 1st IF Pin
LO1stif
f2ndLOin = 65.472 MHz
−40
dBm
Input 3rd Order Intercept
Point
IIP3IF
f1stIFin1 = 61.38 MHz, f1stIFIn2 = 61.48 MHz
f2ndLOin = 65.472 MHz
−34
dBm
Data Sheet P13860EJ3V0DS00
µPB1005GS
PIN EXPLANATION
Pin
No.
3
4
5
Pin Name
RX-MIXout
VCC (RF-MIX)
RF-MIXin
Applied
Voltage
(V)
Pin
Voltage
(V)

1.68
2.7 to 3.3


1.20
Function and Application
Output pin of RF mixer.
1st IF filter must be inserted
between pin 1 & 3.
Supply voltage pin of RF mixer
block. This pin must be
decoupled with capacitor
(eg. 1 000 pF).

Ground pin RF mixer.
VCC
(1stLO-OSC)
2.7 to 3.3

Supply voltage pin of differential
amplifier for 1st LO oscillator
circuit.
8
1stLO-OSC1

1.88
9
1stLO-OSC2

1.88
10
GND
(1stLO-OSC)
0

GND (RF-MIX)
7
11
VCC (phase
12
13
14
15
PD-Vout3
PD-Vout2
PD-Vout1
GND (phase
detector)
Pin 8 & 9 are each base pin of
differential amplifier for 1st LO
oscillator. These pins should be
equipped with LC and varactor
to oscillate on 1636.80 MHz as
VCO.
Ground pin of differential
amplifier for 1st LO oscillator
circuit.
2.7 to 3.3

Supply voltage pin of phase
detector and active loop filter.
Pull-up
with
resistor

Pins of active loop filter for
tuning voltage output.
The active transistors
configured with darlington pair
are built on chip. Pin 14 should
be pulled down with external
resistor. Pin 12 to 13 should be
equipped with external RC in
order to adjust dumping factor
and cutoff frequency. This
tuning voltage output must be
connected to varactor diode of
1st LO-OSC.
detector)

Pull-up
with
resistor
0
Output in
accordance
with phase
difference


4
1stLO
-OSC
3
5
Input pin of RF mixer.
1 575.42 MHz band pass filter
can be inserted between pin 5
and external LNA.
0
6
Internal Equivalent Circuit
6
7
VCC
RF-MIX or
Prescaler
input
8
9
10
11
13
PD
15
12
14
Ground pin of phase detector +
active loop filter.
Data Sheet P13860EJ3V0DS00
7
µPB1005GS
Pin
No.
16
Pin Name
VCC
(divider block)
Applied
Voltage
(V)
Pin
Voltage
(V)
2.7 to 3.3

17
LOout

2.08
18
GND
(divider block)
0


1.96
19
20
REFin
VCC
(reference
block)
2.7 to 3.3

Function and Application
Internal Equivalent Circuit
Supply voltage pin of
prescalers.
16
Monitor pin of comparison
frequency at phase detector.
1st
LO
OSC
Ground pin of prescalers +
LOout amplifier
18
Input pin of reference frequency.
This pin should be equipped
with external 16.368 MHz
oscillator (e.g. TCXO).
20
Supply voltage pin of
input/output amplifiers in
reference block.
IF
MIX
÷25
PD
÷8
PD
17
÷2
Ref.
21
19
PD
21
22
REFout
2ndIFout


1.65
1.56
Output pin of reference
frequency. The frequency from
pin 19 can be took out as 1 VP-P
swing.
Output pin of 2nd IF amplifier.
This pin output 4.092 MHz
clipped sinewave.
This pin should be equipped
with external inverter to adjust
level to next stage on user’s
system.
23
VCC
(2ndIF-AMP)
2.7 to 3.3

24
2ndIF bypass

2.30
Bypass pin of 2nd IF amplifier
input 1. This pin should be
grounded through capacitor.
25
2ndIFin2

2.35
Pin of 2nd IF amplifier input 2.
This pin should be grounded
through capacitor.
26
2ndIFin1

2.35
Pin of 2nd IF amplifier input 1.
2nd IF filter can be inserted
between pin 26 & 28.
27
GND
(2ndIF-AMP)
0

Ground pin of 2nd IF amplifier.
Supply voltage pin of 2nd IF
amplifier.
18
23
24
26
8
Data Sheet P13860EJ3V0DS00
25
27
22
µPB1005GS
Pin
No.
28
29
Pin Name
IF-MIXout
VGC (IF-MIX)
Applied
Voltage
(V)
Pin
Voltage
(V)

1.15
0 to 3.3

2.7 to 3.3

IF-MIXin

2.05
GND (IF-MIX)
0

30
VCC (IF-MIX)
1
2
Caution
Function and Application
Output pin from IF mixer.
IF mixer output signal goes
through gain control amplifier
before this emitter follower
output port.
Gain control voltage pin of IF
mixer output amplifier. This
voltage performs forward control
(VGC up → Gain down).
Supply voltage pin of IF mixer,
gain control amplifier and
emitter follower transistor.
Internal Equivalent Circuit
29
30
1
2nd
LO
28
2
Input pin of IF mixer.
Ground pin of IF mixer.
Ground pattern on the board must be formed as wide as possible to minimize ground
impedance.
Data Sheet P13860EJ3V0DS00
9
µPB1005GS
TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°°C, VCC = 3.0 V)
Total Circuit Current ICCTOTAL (mA)
−
−IC TOTAL−
TOTAL CIRCUIT CURRENT vs. SUPPLY VOLTAGE
80
No signals
70
60
TA = + 85°C
50
40
TA = + 25°C
30
TA = − 40°C
20
10
0
0
1
2
3
4
Supply Voltage VCC (V)
−
−RF DOWN-CONVERTER BLOCK−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
12
Circuit Current ICC (mA)
No signals
10
8
6
4
2
0
0
1
2
3
4
Supply Voltage VCC (V)
1st IF OUTPUT POWER vs. RF INPUT POWER
0
− 10
fRFin = 1.575420 GHz
f1stLOin = 1.63680 GHz
P1stLOin = − 10 dBm
f1stIFout = 61.38 MHz
VCC = 3.3 V
− 20
VCC = 3.0 V
− 30
− 40
VCC = 2.7 V
− 50
− 60
− 70
− 90 − 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10
1st IF OUTPUT POWER vs. RF INPUT POWER
+ 10
1st IF Output Power P1stIFout (dBm)
1st IF Output Power P1stIFout (dBm)
+ 10
0
+ 10
0
− 10
fRFin = 1.575420 GHz
f1stLOin = 1.63680 GHz
P1stLOin = − 10 dBm
f1stIFout = 61.38 MHz
− 20
− 30
TA = − 40 °C
− 40
TA = + 85 °C
− 50
− 60
− 70
− 90 − 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10
RF Input Power PRFin (dBm)
RF Input Power PRFin (dBm)
10
TA = + 25 °C
Data Sheet P13860EJ3V0DS00
0
+ 10
1st IF OUTPUT POWER vs. 1st LO INPUT POWER
− 10
fRFin = 1.57542 MHz
PRFin = − 40 dBm
− 15 f1stLOin = 1636.8 MHz
f1stIFout = 61.38 MHz
− 20
VCC = 3.3 V
VCC = 3.0 V
− 25
− 30
VCC = 2.7 V
− 35
− 40
− 50
− 40
− 30
− 20
− 10
RF Conversion Gain CGRF (dB)
1st IF Output Power P1stIFout (dBm)
µPB1005GS
15
VCC = 2.7 V
5
0.1
RF CONVERSION GAIN vs. 1st IF OUTPUT FREQUENCY
30
fRFin = 1.57542 GHz
PRFin = − 40 dBm
25 P1stLOin = − 10 dBm
fLOin = fRFin + fIFout
20 Upper Local
VCC = 3.3 V
15
VCC = 3.0 V
VCC = 2.7 V
5
0
10
30
100
0.3
1.0
2.0
RF Input Frequency fRFin (GHz)
300
1 000
1st IF Output Frequency f1stIFout (MHz)
3rd ORDER INTERMODULATON DISTORTION,
1st IF OUTPUT POWER OF EACH TONE
vs. RF INPUT POWER OF EACH TONE
3rd Order Intermodulation Distortion IM3 (dBm)
1st IF Output Power of Each Tone P1stIFout (each) (dBm)
RF Conversion Gain CGRF (dB)
1st LO Input Power P1stLOin (dBm)
10
VCC = 3.0 V
10
0
+ 10
0
RF CONVERSION GAIN vs. RF INPUT FREQUENCY
30
PRFin = − 40 dBm
P1stLOin = − 10 dBm
25 f1stIFout = 61.38 MHz
fLO = fRFin + f1stIFout
VCC = 3.3 V
20
+ 20
fRFin1 = 1 600 MHz
fRFin2 = 1 605 MHz
f1stLOin = 1 660 MHz
P1stLOin = − 10 dBm
Upper Local
+ 10
0
− 10
− 20
− 30
P1stIFout
− 40
(each)
IM3
− 50
− 60
− 70
− 80
− 90
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10
RF Input Power of Each Tone PRFin
(each)
0
+ 10
(dBm)
−
−IF DOWN-CONVERTER BLOCK−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
12
Circuit Current ICC (mA)
No signals
10
8
6
4
2
0
0
1
2
3
4
Supply Voltage VCC (V)
Data Sheet P13860EJ3V0DS00
11
2nd IF OUTPUT POWER vs. 1st IF INPUT POWER
0
VCC = 3.3 V
f1stIFin = 61.38 MHz
− 5 f2ndLOin = 65.472 MHz
− 10 P2ndLOin = − 10 dBm
f2ndFout = 4.092 MHz
− 15 VGC = GND
− 20
VCC = 3.0 V
− 25
− 30
− 35
VCC = 2.7 V
− 40
− 45
− 50
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10
2nd IF OUTPUT POWER vs. 1st IF INPUT POWER
0
2nd IF Output Power P2ndIFout (dBm)
2nd IF Output Power P2ndIFout (dBm)
µPB1005GS
f1stIFin = 61.38 MHz
f2ndLOin = 65.472 MHz
P2ndLOin = − 10 dBm
f2ndFout = 4.092 MHz
VGC = GND
−5
− 10
− 15
− 20
TA = − 40°C
− 25
− 35
− 40
− 45
− 50
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10
0
VCC = 3.0 V
40
35
VCC = 2.7 V
30
P1stIFin = − 50 dBm
P2ndLOin = − 10 dBm
f2ndIFout = 4.092 MHz
VGC = GND
30
IF CONVERSION GAIN vs. 1st IF INPUT FREQUENCY
50
IF Conversion Gain CGIF (dB)
IF Conversion Gain CGIF (dB)
VCC = 3.3 V
45
10
50
70
100
45
35
35
VCC = 2.7 V
30
5
7
30
P1stIFin = − 50 dBm
P2ndLOin = − 10 dBm
f2ndIFout = 4.092 MHz
VGC = GND
20
10
30
25
10
45
50
70
100
TA = − 40°C
TA = + 25°C
40
35
TA = + 85°C
30
f1stIFin = 61.38 MHz
P1stIFin = − 50 dBm
25 P2ndLOin = − 10 dBm
f2ndIFout = f1stIFin − f2ndLOin
VGC = GND
20
1
3
2nd IF Output Frequency f2ndIFout (MHz)
12
TA = + 25°C
IF CONVERSION GAIN vs. 2nd IF OUTPUT FREQUENCY
50
IF Conversion Gain CGIF (dB)
IF Conversion Gain CGIF (dB)
VCC = 3.3 V
40
f1stIFin = 61.38 MHz
P1stIFin = − 50 dBm
25 P2ndLOin = − 10 dBm
f2ndIFout = f1stIFin − f2ndLOin
VGC = GND
20
1
3
TA = + 85°C
1st IF Input Frequency f1stIFin (dBm)
IF CONVERSION GAIN vs. 2nd IF OUTPUT FREQUENCY
50
VCC = 3.0 V
TA = − 40°C
40
1st IF Input Frequency f1stIFin (MHz)
45
0
1st IF Input Power P1stIFin (dBm)
IF CONVERSION GAIN vs. 1st IF INPUT FREQUENCY
50
20
TA = + 25°C
− 30
1st IF Input Power P1stIFin (dBm)
25
TA = + 85°C
Data Sheet P13860EJ3V0DS00
5
7
2nd IF Output Frequency f2ndIFout (MHz)
10
IF CONVERSION GAIN vs. GAIN CONTROL VOLTAGE
50
VCC = 3.3 V
40
30
VCC = 3.0 V
20
10
VCC = 2.7 V
0
f1stIFin = 61.38 MHz
P1stIFin = − 50 dBm
f2ndLOin = 65.472 MHz
P2ndLOin = − 10 dBm
f2ndIFout = 4.092 MHz
− 10
− 20
− 30
0
0.5
1
1.5
2
2.5
3
IF CONVERSION GAIN vs. GAIN CONTROL VOLTAGE
50
TA = − 40°C
IF Conversion Gain CGIF (dB)
IF Conversion Gain CGIF (dB)
µPB1005GS
40
TA = + 85°C
30
TA = + 25°C
20
10
0
f1stIFin = 61.38 MHz
P1stIFin = − 50 dBm
f2ndLOin = 65.472 MHz
P2ndLOin = − 10 dBm
f2ndIFout = 4.092 MHz
− 10
− 20
− 30
0
0.5
1
1.5
2
2.5
3
Gain Control Voltage VGC (V)
Gain Control Voltage VGC (V)
3rd Order Intermodulation Distortion IM3 (dBm)
2nd IF Output Power of Each Tone P2ndIFout (each) (dBm)
3rd ORDER INTERMODULATION DISTORTION,
2nd IF OUTPUT POWER OF EACH TONE
vs. 2nd IF INPUT POWER OF EACH TONE
0
− 10
− 20
P2ndIFout
− 30
(each)
− 40
IM3
− 50
− 60
f1stIFin1 = 61.38 MHz
f1stIFin2 = 61.48 MHz
f2ndLOin = 65.472 MHz
P2ndLOin = − 10 dBm
VGC = GND
− 70
− 80
− 90
− 100
− 80
− 70
− 60
− 50
− 40
− 30
2nd IF Input Power of Each Tone P1stIFin
(each)
− 20
(dBm)
−
−IF AMPLIFIER BLOCK−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
4
Circuit Current ICC (mA)
No signals
3
2
1
0
0
1
2
3
4
Supply Voltage VCC (V)
Data Sheet P13860EJ3V0DS00
13
2nd IF OUTPUT POWER vs. 2nd IF INPUT POWER
+ 10
f2ndIFin = 4.092 MHz
RL = 2 kΩ
0
VCC = 3.3 V
VCC = 3.0 V
− 10
− 20
VCC = 2.7 V
− 30
− 40
− 50
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10
2nd IF Output Power P2ndIFout (dBm)
2nd IF Output Power P2ndIFout (dBm)
µPB1005GS
0
2nd IF OUTPUT POWER vs. 2nd IF INPUT POWER
+ 10
f2ndIFin = 4.092 MHz
RL = 2 kΩ
0
TA = − 40°C
− 10
TA = + 25°C
− 20
TA = + 85°C
− 30
− 40
− 50
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10
2nd IF Input Power P2ndIFin (dBm)
2nd IF Input Power P2ndIFin (dBm)
VOLTAGE GAIN vs. INPUT FREQUENCY
42
VOLTAGE GAIN vs. INPUT FREQUENCY
42
P2ndIFin = − 60 dBm
RL = 2 kΩ
P2ndIFin = − 60 dBm
RL = 2 kΩ
VCC = 3.0 V
VCC = 3.3 V
40
39
VCC = 2.7 V
38
37
TA = + 25°C
40
39
TA = + 85°C
38
37
0.1
1
10
100
36
0.1
−
−PLL SYNTHESIZER BLOCK−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
40
Circuit Current ICC (mA)
No signals
30
20
10
0
0
1
2
3
1
10
Input Frequency fin (MHz)
Input Frequency fin (MHz)
4
Supply Voltage VCC (V)
14
TA = − 40°C
41
Voltage Gain GV (dB)
Voltage Gain GV (dB)
41
36
0
Data Sheet P13860EJ3V0DS00
100
µPB1005GS
−
−REFERENCE BLOCK−
Reference Output Swing VREFout (VP-P)
2.0
PREFin = 1.0VP-P
1.5
VCC = 3.3 V
VCC = 3.0 V
1.0
VCC = 2.7 V
0.5
0
Reference Output Swing VREFout (VP-P)
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT FREQUENCY
1
10
PREFin = 1.0VP-P
1.5
1.0
TA = + 85°C
0.5
1
10
100
Reference Input Frequency fREFin (MHz)
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT POWER
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT POWER
fREFin = 16.368 MHz
1.5
VCC = 3.0 V
VCC = 3.3 V
1.0
VCC = 2.7 V
0.5
− 40
− 30
− 20
− 10
+ 10
0
2.0
fREFin = 16.368 MHz
1.5
TA = − 40°C
TA = + 25°C
1.0
TA = + 85°C
0.5
0
− 50
Reference Input Power PREFin (dBm)
Remark
TA = − 40°C
TA = + 25°C
Reference Input Frequency fREFin (MHz)
2.0
0
− 50
2.0
0
100
Reference Output Swing VREFout (VP-P)
Reference Output Swing VREFout (VP-P)
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT FREQUENCY
− 40
− 30
− 20
− 10
0
+ 10
Reference Input Power PREFin (dBm)
The graphs indicate nominal characteristics.
Data Sheet P13860EJ3V0DS00
15
µPB1005GS
TEST CIRCUIT
Signal Generator
1PIN
C1
50Ω
30
1
VCC
C23
Spectrum Analyzer
2
29
3
28
C21
C2
50Ω
To get maximum gain,
apply 1.0V MAX.
C22
Spectrum
Analyzer
R6
VCC
Signal Generator
4
27
5
26
C3
50Ω
50Ω
C20
C4
÷25
Signal Generator
25
6
C19
VCC
7
24
8
23
C5
C18
R1
V-Di C6
÷8
9
C17
VCC
C16
Spectrum
Analyzer
or
Oscilloscope
22
R5
C7
R2
VCC
C8
10
21
11
20
Spectrum
Analyzer
C15
R3
PD
12
C9
R4
÷2
VCC
C14
19
50Ω
C13
C10
13
18
14
17
15
16
Signal Generator
Spectrum
Analyzer
or
Oscilloscope
C12
C11
VCC
Spectrum Analyzer: measure frequency
Oscilloscope
: measure output voltage swing
Component List
Form
Chip capacitor
Ceramic capacitor
Chip resistor
Varactor Diode
Chip inductor
16
Symbol
Value
C1 to C5, C8, C11 to C15, C17, C18, C22
1 000 pF
C6, C7
24 pF (UJ)
C9
1 800 pF
C10
33 nF
C19
10 000 pF
C23
1 µF
C16, C20
0.1 µF
C21
0.01 µF
R1, R2
4.7 kΩ
R3
6.2 kΩ
R4
1.2 kΩ
R5, R6
1.95 kΩ
V−Di
HVU12
L
2.7 nH
Data Sheet P13860EJ3V0DS00
µPB1005GS
PACKAGE DIMENSIONS
30 PIN PLASTIC SHRINK SOP (300 mil) (UNIT: mm)
30
16
detail of lead end
3˚ +7˚
–3˚
1
15
9.85 ± 0.26
8.1 ± 0.2
6.1 ± 0.2
2.0 MAX.
1.7 ± 0.1
1.0 ± 0.2
0.5 ± 0.2
0.65
0.3 ± 0.1
0.10
0.51 MAX.
0.15 +0.10
–0.05
0.10 M
0.125 ± 0.075
NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material
condition.
Data Sheet P13860EJ3V0DS00
17
µPB1005GS
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electro-static sensitive devices.
(2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent abnormal oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) Connect a bypass capacitor (example: 1 000 pF) to the VCC pin.
(5) Frequency signal input/output pins must be each coupled with capacitor for DC cut.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions.
For soldering methods and
conditions other than those recommended below, contact your NEC sales representative.
Soldering Method
Soldering Conditions
Recommended Condition Symbol
Infrared Reflow
Package peak temperature: 235°C or below
Time: 30 seconds or less (at 210°C)
Note
Count: 3, Exposure limit: None
IR35-00-3
VPS
Package peak temperature: 215°C or below
Time: 40 seconds or less (at 200°C)
Note
Count: 3, Exposure limit: None
VP15-00-3
Wave Soldering
Soldering bath temperature: 260°C or below
Time: 10 seconds or less
Note
Count: 1, Exposure limit: None
WS60-00-1
Partial Heating
Pin temperature: 300°C
Time: 3 seconds or less (per side of device)
Note
Exposure limit: None
–
Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating).
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
18
Data Sheet P13860EJ3V0DS00
µPB1005GS
[MEMO]
Data Sheet P13860EJ3V0DS00
19
µPB1005GS
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8