QS7779PM/CM
3D Stereo Enhancement and 3D Virtual Stereo Surround
with Dolby Pro Logic and Mixed DVD (AC-3) Decoder
NIPPON PRECISION CIRCUITS INC.
OVERVIEW
The QS7779PM/CM is an audio processor IC which
implements a decoder for stereo matrix encoded
source materials such as the Dolby Surround Pro
Logic and mixed DVD (AC−3) with surround virtualization using QSound technology developed and
licensed by QSound Labs, Inc. This chip produces
enhanced stereo sound for a stereo input signal and if
the input signal contains matrix encoded surround
sound, the chip decodes it and produces 3D virtualized surround sounds with two speakers.
FEATURES
■
■
■
■
■
Capable of decoding Dolby Surround materials
such as Dolby Pro Logic or other matrix surround
encoded materials (DVD/AC−3)
Virtualized surround sound with two speakers
3D stereo sound enhancement
Two enhanced levels
Parallel and serial digital interface for mode control
■
■
• QS7779CM for I2C 2 control pins serial interface (Data, Clock)
• QS7779PM for three-wire serial interface
(Data, Clock and Strobe)
Supply voltage (analog): 5 to 13V
Supply voltage (digital): 4.5 to 5.5V
24-pin SSOP packaging
APPLICATIONS
■
■
DVD, Laser disk player
Audio systems including TV, Radio and VCR
■
Computer-based multimedia products, including
sound cards and powered loudspeakers
PINOUT(Top view)
QS7779PM
QS7779CM
QXAC3
24
24
QXAC4
QXAC3
QXAC2
VCC
QXAC2
VCC
QXAC1
QXBC1
QXAC1
QXBC1
QXBC2
RIN
QXBC2
QXBC3
LIN
QXBC4
COUT
1
LIN
COUT
CIN
VREFIN
VREFOUT
VREF
GND
SPRD(SCL)
12
ROUT
CIN
LOUT
VREFIN
MUTE(STRB)
13
VREFOUT
VDD
VREF
P/S
GND
BYP(SDA)
QS7779CM
QS7779PM
RIN
1
SPRD(SCL)
12
QXAC4
QXBC3
QXBC4
ROUT
LOUT
MUTE
VDD
P/S
13
BYP(SDA)
Using these products does not require any Dolby certifications.
ORDERING INFORMATION
D e vice
P ackag e
QS7779PM
24-pin SSOP
QS7779CM
24-pin SSOP
I2 C bus is a registered tra d e m a r k of Philips Electronics N.V.
Dolby and the double-D symbol are registered tra d e m a r ks of Dolby Laboratories Licensing Corporation.
NIPPON PRECISION CIRCUITS—1
QS7779PM/CM
PACKAGE DIMENSIONS
5.40 0.20
7.80 0.30
(Unit: mm)
+ 0.105
0.15 − 0.0
0.36 0.10
0.12 M
0.10
+0.20
1.90 −0.10
0.8
0.10 0.10
1.80
10.05 0.20
10.20 0.30
0.50 0.20
0 10
BLOCK DIAGRAM
QXAC1 QXAC2 QXAC3 QXAC4 QXBC1 QXBC2 QXBC3 QXBC4
3
RIN
LIN
VREFIN
GND
1
24
4
22
21
QXpander
20
19
Σ
18
Σ
17
ROUT
5
Surround
Decoder
VCC
2
23
Q1
Virtualization
7
LOUT
CIN
8
6
COUT
11
Multiplex/Level Shift
14
P/S
Serial I/O
15
9
10
VREFOUT VREF
12
13
16
VDD
SPRD BYP MUTE
(SCL) (SDA) (STRB)
NIPPON PRECISION CIRCUITS—2
QS7779PM/CM
PIN DESCRIPTION
Name
Number
I/O
P arallel
Description
Serial
1
QXAC3
I
Capacitor 3 fo r Q E X PA N D E R fi lter A
2
QXAC2
I
Capacitor 2 fo r Q E X PA N D E R fi lter A
3
QXAC1
I
Capacitor 1 fo r Q E X PA N D E R fi lter A
4
RIN
I
Right channel signal input
5
LIN
I
Left channel signal input
6
COUT
O
Decoded center signal output
7
CIN
I
Center signal input for summing with the right and the left signal outputs
8
VREFIN
O
Internally generated reference voltage (V C C /2)
9
VREFOUT
O
Buffered reference voltage (V C C /2)
10
VREF
I
Signal reference input
11
GND
–
Ground 0V
SPRD
–
I
Enhancement control (H: spread maximum, L: spread minimu m )
–
SCL1
I
Serial data shift clock
BYP
–
I
Bypass control (H: Bypass on, L: Qsurround on)
–
SDA2
I/O
12
13
Serial data input. ACK data output for I 2 C (Q S 7 7 7 9 C M )
14
P/S
I
Interface mode control (H: parallel I/O, L: serial I/O)
15
VDD
–
Digital pow er supply DC4.5 to 5.5V
MUTE
–
I
Output mute control (H: mute on, L: mute off)
–
STRB
I
Serial data strobe (not applicable to I2 C of Q S 7 7 7 9 C M )
16
17
LOUT
O
Left signal output
18
ROUT
O
Right signal output
19
QXBC4
I
Capacitor 4 fo r Q E X PA N D E R fi lter B
20
QXBC3
I
Capacitor 3 fo r Q E X PA N D E R fi lter B
21
QXBC2
I
Capacitor 2 fo r Q E X PA N D E R fi lter B
22
QXBC1
I
Capacitor 1 fo r Q E X PA N D E R fi lter B
23
VCC
–
Analog pow er supply DC5 to 13V
24
QXAC4
I
Capacitor 4 fo r Q E X PA N D E R fi lter A
1. Q S 7 7 7 9 C M :CMOS input. No protective diode between the terminal and V D D.
Q S 7 7 7 9 P M :CMOS input. Protective diode is in between the terminal and V D D.
2. Q S 7 7 7 9 C M :Nch open drain terminal. No protective diode between terminal and V D D.
Q S 7 7 7 9 P M :CMOS input. Protective diode is in between the terminal and V D D.
NIPPON PRECISION CIRCUITS—3
QS7779PM/CM
SPECIFICATIONS
Absolute Maximum Ratings
GND = 0V
P arameter
Symbol
Rating
Unit
Supply voltage (analog)
VCC
– 0.3 to 15
V
Supply voltage (digital)
VDD
– 0.3 to 7
V
Input voltage (analog)
V IANA
– 0.3 to V C C + 0.3
V
Input voltage (digital)
V IDIG
– 0.3 to V D D + 0.3
V
V IOPEN
10
V
Pow er dissipation
PD
250
mW
Storage temperature
T stg
– 40 to 125
°C
Soldering temperature
TSLD
255
°C
Soldering time
tS L D
10
sec
Symbol
Limits
Unit
Supply voltage (analog)
VCC
5 to 13
V
Supply voltage (digital)
VDD
4.5 to 5.5
V
Operating temperature
TO P R
– 20 to 70
°C
I2 C input voltage (SDA, SCL)
Recommended Operating Conditions
GND = 0V
P arameter
NIPPON PRECISION CIRCUITS—4
QS7779PM/CM
DC Electrical Characteristics
VCC = 9V, VDD = 5V, GND = 0V, Ta = 25 °C unless otherwise noted.
Limits
Parameter
Symbol
Condition
Unit
min
typ
max
LIN, RIN analog input impedance
Z AIN1
16
20
24
kΩ
CIN analog input impedance
Z AIN2
4
5
6
kΩ
VREFOUT
–
V C C /2
–
V
HIGH-level input voltage
V IH
0.7 × V D D
–
–
V
L O W -level input voltage
V IL
–
–
0.3 × V D D
V
IL E A K
–3
–
3
µA
–3
–
3
µA
0
–
0.4
V
Reference voltage out
Input leakage current
S D A, SCL input leakage current
(I2 C input pin)
IL O P E N
V IN = 10V
A cknowledge signal out
IO L = 3mA
S D A L OW -level output voltage
VOL
Supply voltage (analog)
VCC
5
–
13
V
Supply voltage (digital)
VDD
4.5
–
5.5
V
Current consumption (analog)
IC C
–
5
6.5
mA
Current consumption (digital)
ID D
–
0.3
0.5
mA
IC C S AV E
–
0.1
0.2
mA
Standby current (analog)
Noise/THD Characteristics
VCC = 9V, VDD = 5V, GND = 0V, Ta = 25 °C unless otherwise noted.
Limits
Parameter
Symbol
Condition
Unit
min
typ
max
Noise voltage
N BYP
BYP = HIGH (Bypass mode), A-wgt,
L O U T, RO U T
–
10
20
µV R M S
Noise voltage
NQS
B Y P = L OW (Qsurround mode),
SPRD = HIGH, A-wgt, LOUT, RO U T
–
20
40
µV R M S
LIN = RIN = 1V R M S , BYP = LOW (Qsurround mode), SPRD = HIGH, f = 1kHz
–
–
0.1
%
THD
THDQS
NIPPON PRECISION CIRCUITS—5
QS7779PM/CM
AC Electrical Characteristics
VCC = 9V, VDD = 5V, GND = 0V, Ta = 25 °C unless otherwise noted.
Limits
Parameter
Symbol
Condition
Unit
min
typ
max
M a x i m um input voltage 1
V FIN1
LIN = RIN, BYP = LOW , SPRD = HIGH,
f = 1kHz
1.4
–
–
VRMS
M a x i m um input voltage 2
V FIN2
LIN = – RIN, BYP = LOW , SPRD = HIGH,
f = 1kHz
0.5
–
–
VRMS
Bypass gain
G BYP
BYP = HIGH, f = 1kHz, LIN to LOUT,
RIN to RO U T
–2
0
2
dB
Forward gain
GF
SPRD = HIGH, BYP = LOW , f = 1kHz,
LIN to LOUT, RIN to RO U T
6.6
8.6
10.6
dB
Crosstalk gain
G XF
SPRD = HIGH, BYP = LOW , f = 1kHz,
LIN to RO U T, RIN to LOUT
0.5
2.5
4.5
dB
SCL clock pulse cycle
t0
P M version
100
–
–
ns
SCL HIGH-level clock pulse width
t1
P M version
40
–
–
ns
S C L L OW -level clock pulse width
t2
P M version
40
–
–
ns
S D A set-up time
t3
P M version
15
–
–
ns
S D A hold time
t4
P M version
30
–
–
ns
STRB set-up time
t5
P M version
50
–
–
ns
STRB clock pulse width
t6
P M version
100
–
–
ns
STRB hold time
t7
P M version
50
–
–
ns
SCL hold time (I 2 C)
tH D : S TA
C M version
4.0
–
–
µs
SCL set-up time (I 2 C)
tS U : S TO
C M version
4.0
–
–
µs
S D A hold time (I 2 C)
tH D : DAT
C M version
5.0
–
–
µs
S D A set-up time (I 2 C)
tS U : DAT
C M version
250
–
–
ns
tH I G H
C M version
4.0
–
–
µs
tL O W
C M version
4.7
–
–
µs
SCL rise time (I 2 C)
tr
C M version
–
–
1000
ns
SCL fall time (I 2 C)
tf
C M version
–
–
300
ns
SCL HIGH-level clock pulse width
(I2 C)
S C L L OW -level clock pulse width
(I2 C)
NIPPON PRECISION CIRCUITS—6
QS7779PM/CM
Serial Interface
Three-wire serial interface (for QS7779PM)
SDA
BYP
SPRD
t3
MUTE
PSAVE
t4
SCL
t1
t2
t5
t7
t0
STRB
t6
I2C serial interface (for QS7779CM)
I C address is {AD6 − AD0} = {1011011}
2
SDA
AD6
tHD:STA
AD0
BYP
SPRD
tSU:DAT
MUTE PSAVE
tHD:DAT
tr
tf
tSU:STO
SCL
tHIGH
tLOW
NIPPON PRECISION CIRCUITS—7
QS7779PM/CM
FUNCTIONAL DESCRIPTION
Operating Mode
sets to LOW). The control pins or bits configurations
are shown in the following table.
This chip can be set to a desired operating mode by
control pins for the parallel interface (P/S pin sets to
HIGH) or control bits for the serial interface (P/S pin
Operation
(Output signal)
Control Pins/Bits
Mode
No.
Description
BYP
SPRD
MUTE
P S AV
E
LOUT
ROUT
1
1
×
0
0
LIN
RIN
2
0
0
0
0
QX(LIN)
QX(RIN)
Stereo enhanced and vir tual surround mode with low er enhanced
level
3
0
1
0
0
QX+(LIN)
QX+(RIN)
Stereo enhanced and vir tual surround mode with higher enhanced
level
4
×
×
1
0
–
–
Mute mode
5
×
×
1
1
–
–
Pow er save mode. This function is available with serial interface only
Bypass mode
Note1. × : Don’t care.
Note2. MUTE = 1 when PSAVE = 1
Mode description
Mode No.
Operating description
1
Bypass mode. Outputs the stereo signal as it is input.
2
Stereo Enhanced and vir tual surround mode with low er enhanced level. The Dolby Surround Pro Logic signal (Lt, Rt) input. Available
Surround Effect with two speakers by Qsurround technology. Virtual location of each signal is;
The Front signal: Virtually outside of the speakers.
The Rear signal: Virtually behind the listeners.
3
Stereo Enhanced and vir tual surround mode with higher enhanced level. The Dolby Surround Pro Logic signal (Lt, Rt) input. Available
Surround Effect with two speakers by Qsurround technology. This mode outputs the signals much more spread sound than Mode 2.
4
Mute mode. No signal at output pins.
5
Pow er save mode. This function is available with serial interface only.
Center signal output
CIN and COUT are used to emphasize the center signal.
Pin
CIN
COUT
Description
Outputs the doubled signal to ROUT and LOUT always.
Outputs the half level of signal ((RIN+LIN)/2).
How to use CIN and COUT.
■
■
■
Connect CIN and COUT with a resistor to make
the center signal emphasized.
Input resistance for CIN is 5kΩ. For example, connecting a 5kΩ resistor between CIN and COUT
makes output of (RIN+LIN)/2 to ROUT and
LOUT.
Directly connecting CIN and COUT makes ROUT
and LOUT output (RIN+LIN).
NIPPON PRECISION CIRCUITS—8
QS7779PM/CM
TYPICAL APPLICATION CIRCUIT
QS7779PM/CM with parallel interface
3300pF
1 QXAC3 QXAC4 24
5 to 13V
2 QXAC2
Signal In
3300pF
4.7µF
4.7µF
VCC 23
3 QXAC1 QXBC1 22
4 RIN
QXBC2 21
5 LIN
QXBC3 20
6 COUT
QXBC4 19
0.01µF
0.01µF
3.9k
7 CIN
ROUT 18
8 VREFIN
LOUT 17
Signal Out
4.7µF
4.7µF
VREFOUT
MUTE 16
(STRB)
10 VREF
VDD 15
9
10µF
10µF
11 GND
P/S 14
12 SPRD
BYP 13
(SDA)
(SCL)
47k
5V
NIPPON PRECISION CIRCUITS—9
QS7779PM/CM
QS7779PM with serial interface
3300pF
1 QXAC3 QXAC4 24
5 to 13V
2 QXAC2
Signal In
3300pF
4.7µF
4.7µF
VCC 23
3 QXAC1 QXBC1 22
4 RIN
QXBC2 21
5 LIN
QXBC3 20
6 COUT
QXBC4 19
0.01µF
0.01µF
3.9k
7 CIN
ROUT 18
8 VREFIN
LOUT 17
VREFOUT
MUTE 16
(STRB)
10 VREF
VDD 15
Signal Out
4.7µF
4.7µF
9
10µF
10µF
11 GND
P/S 14
12 SPRD
BYP 13
(SDA)
(SCL)
5V
STRB
SDA
SCL
QS7779CM with serial interface
3300pF
1 QXAC3 QXAC4 24
5 to 13V
2 QXAC2
Signal In
3300pF
4.7µF
4.7µF
VCC 23
3 QXAC1 QXBC1 22
4 RIN
QXBC2 21
5 LIN
QXBC3 20
6 COUT
QXBC4 19
0.01µF
0.01µF
3.9k
7 CIN
ROUT 18
8 VREFIN
LOUT 17
9
Signal Out
4.7µF
4.7µF
VREFOUT
MUTE 16
5V
10µF
10µF
10 VREF
VDD 15
11 GND
P/S 14
12 SPRD
BYP 13
(SDA)
(SCL)
SDA
SCL
NIPPON PRECISION CIRCUITS—10
QS7779PM/CM
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: 03-3642-6661
Facsimile: 03-3642-6698
NC9817AE
1999.6
NIPPON PRECISION CIRCUITS—11