NTE NTE1722

NTE1722
Integrated Circuit
Pulse Width Modulator (PWM) Control Circuit
Description:
The NTE1722 is a high performance pulse width modulator integrated circuit in an 18–Lead DIP type
package intended for fixed frequency switching regulators and other power control applications.
Functions included in this IC are a temperature compensated voltage reference, sawtooth oscillator,
error amplifier, pulse width modulator, pulse metering and steering logic, and two high current totem
pole outputs ideally suited for driving the capacitance of power FETs at high speeds.
Additional protective features include soft start and undervoltage lockout, digital current limiting,
double pulse inhibit, adjustable dead time and a data latch for single pulse metering. All digital control
ports art TTL and B–series CMOS compatible. Active low logic design allows easy wired–OR connections for maximum flexibility. The versatility of this device enables implementation in single–ended
or push–pull switching regulators that are transformerless or transformer coupled.
Features:
D 8.0 to 35 Volt Operation
D 5.0 Volt ±1% Trimmed Reference
D 1.0Hz to 400kHz Oscillator Range
D Dual Source/Sink Current Outputs: ±100mA
D Digital Current Limiting
D Programmable Dead Time
D Wide Current Limit Common Mode Range
D Guaranteed 6 Unit Synchronization
Absolute Maximum Ratings: (Values beyond which damage may occur)
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Collector Supply Voltage, VC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +5.5V
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to VCC V
Output Current (Source or Sink), IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200mA
Reference Load Current (VCC = 40V, Note 1), Iref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Logic Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA
Power Dissipation (TA = +25°C), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000mW
Derate Above 50°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mW/°C
Power Dissipation (TC = +25°C), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3000mW
Derate Above 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24mW/°C
Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 150°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C
Thermal Resistance, Junction–to–Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Lead Temperature (During Soldering, 10sec), TL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±300°C
Note 1. Maximum junction temperature must be observed.
Recommended Operating Conditions:
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Voltage
VCC
+8.0
–
+35
V
Collector Supply Voltage
VC
+4.5
–
+35
V
Output Sink/Source Current (Each Output)
IO
0
–
±100
mA
Reference Load Current
Iref
0
–
20
mA
Oscillator Frequency Range
Iref
0
–
20
mA
Oscillator Timing Resistor
RT
2.0
–
150
kΩ
Oscillator Timing Capacitor
CT
0.001
–
20
µF
Available Deadtime Range (40kHz)
–
3.0
–
50
%
Operating Junction Temperature Range
TJ
0
–
+125
°C
Electrical Characteristics: (VCC = 15V, TJ = 0° to +125°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
4.90
5.00
5.10
V
Referencd Section (IL = 0mA unless otherwise specified)
Reference Output Voltage
Vref
TJ = +25°C
Line Regulation
Regline
+8.0V ≤ VCC ≤ +35V
–
10
30
mV
Load Regulation
Regload
0mA ≤IL ≤ 20mA
–
10
50
mV
Temperature Stability
∆Vref/∆TJ
–
10
–
mV
4.85
5.00
5.15
V
Vref = 0V, Note 1
25
80
125
mA
Vref = +3.8V
–
0.2
0.4
V
Vref = +4.8V
2.4
4.8
–
V
TJ = +25°C
–
±3.0
±8.0
%
Total Reference Output Voltage Variation
Short Circuit Current
∆Vref
ISC
+8.0V ≤ VCC ≤ +35V,
0mA ≤ IL ≤ 20mA
Uundervoltage Lockout
Reset Output Voltage
–
Oscillator Section (Note 2)
Initial Accuracy
–
Frequency Stability over Power
Supply Range
∆fosc
∆VCC
+8.0V ≤ VCC ≤ +35V
–
0.5
1.0
%
Frequency Stability over Temperature
∆fosc
∆TJ
∆TJ = 0° to +125°C
–
2.0
–
%
Minimum Frequency
fmin
RT = 150kΩ, CT = 20µF
–
0.5
–
Hz
Maximum Frequency
fmax
RT = 2kΩ, CT = 0.001µF
400
–
–
kHz
Sawtooth Peak Voltage
Vosc(p)
VCC = +35V
–
3.0
3.5
V
Sawtooth Valley Voltage
Vosc(v)
VCC = +8V
0.45
0.8
–
V
–
20
10
mV
Error Amplifier Section (0V ≤ VCM ≤ +5.2V unless otherwise specified)
RS ≤ 2kΩ
Input Offset Voltage
VIO
Input Bias Current
IIB
–
–350
–2000
nA
Input Offset Current
IIO
–
35
200
nA
DC Open Loop Gain
AVOL
60
72
–
dB
RL ≥ 10MΩ
Note 1. Maximum junction temperature must be observed.
Note 2. fOSC = 40kHz (RT = 4.12kΩ ± 1%, CT = 0.01µF ± 1%, RD = 0Ω)
Electrical Characteristics (Cont’d): (VCC = 15V, TJ = 0° to +125°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Error Amplifier Section (Cont’d) (0V ≤ VCM ≤ +5.2V unless otherwise specified)
High Output Voltage
VOH
VPin1 – VPin2 ≥ +150mV,
ISource = 100µA
3.6
4.2
–
V
Low Output Voltage
VOL
VPin2 – VPin1 ≥ +150mV,
ISink = 100µA
–
0.2
0.4
V
Common Mode Rejection Ratio
CMRR
RS ≤ 2kΩ
70
94
–
dB
Power Supply Rejection Ratio
PSRR
+12V ≤ VCC ≤ +18V
66
80
–
dB
Minimum Duty Cycle
DCmin
Vcompensation = +0.4V
–
–
0
%
Maximum Duty Cycle
DCmax
Vcompensation = +3.6V
45
49
–
%
PWM Comparator Section (Note 2)
Digital Ports (SYNC, SHUTDOWN, RESET)
Output Voltage, High Logic Level
VOH
Isource = 40µA
2.4
4.0
–
V
Output Voltage, Low Logic Level
VOL
Isink = 3.6mA
–
0.2
0.4
V
Input Current, High Logic Level
IIH
VIH = +2.4V
–
–125
–200
µA
Input Current, Low Logic Level
IIL
VIL = +0.4V
–
–225
–360
µA
80
100
120
mV
–
–3
–10
µA
Reset = +0.4V
–
0.1
0.4
V
Reset = +2.4V
50
100
150
µA
Isource = 20mA
12.5
13.5
–
V
Isource = 100mA
12.0
13.0
–
V
ISink = 20mA
–
0.2
0.3
V
ISink = 100mA
–
1.2
2.0
V
VC = +40V
–
50
150
µA
CL = 1000pF
–
0.3
0.6
µs
–
0.1
0.2
µs
–
18
30
mA
Current Limit Comparator Section (0V ≤ VCM ≤ +12V unless otherwise specified)
Sense Voltage
Input Bias Current
Vsense
RS ≤ 50Ω
IIB
Soft–Start Section
Error Clamp Voltage
CSoft–Start Charging Current
ICS
Output Drivers (Each Output, VC = +15Vdc unless otherwise specified)
Output High Level
Output Low Level
Collector Leakage
VOH
VOL
IC(Leak)
Rise Time
tr
Fall Time
tf
Supply Current
ICC
Shutdown + +0.4V, VCC = +35V,
RT = 4.12kΩ
Note 2. fOSC = 40kHz (RT = 4.12kΩ ± 1%, CT = 0.01µF ± 1%, RD = 0Ω)
Pin Connection Diagram
Error (+) 1
18 Vref
Error (–) 2
17 VCC
16 Output B
Compensation 3
CSOFT–START 4
15 GND
Reset 5
14 VC
Current Sense (–) 6
13 Output A
Current Sense (+) 7
12 Sync
Shutdown 8
11 RD
RT 9
10 CT
18
10
1
9
.870 (22.1) Max
.250 (6.35)
.150
(3.8)
.100 (2.54)
.800 (20.3)
.125 (3.17) Min