TI TLC59283RGER

TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
16-Channel, Constant-Current LED Driver with Pre-Charge FET
Check for Samples: TLC59283
FEATURES
1
•
2
•
•
•
•
•
•
•
•
•
•
16-Channel, Constant-Current Sink Output
with On and Off Control
Constant-Current Sink Capability:
35 mA (VCC ≤ 3.6 V), 45 mA (VCC > 3.6 V)
LED Power-Supply Voltage: Up to 10 V
VCC = 3 V to 5.5 V
Constant-Current Accuracy:
– Channel-to-Channel:
±1.4% (typ), ±3% (max)
– Device-to-Device: ±2% (typ), ±4% (max)
CMOS Logic Level I/O
Data Transfer Rate: 35 MHz
BLANK Pulse Width: 50 ns
Pre-Charge FET for Ghosting Reduction
Grouped Switching Delay for Noise Reduction
Operating Temperature: –40°C to +85°C
APPLICATIONS
•
•
Video Displays
Message Boards
DESCRIPTION
The TLC59283 is a 16-channel, constant-current sink
light-emitting diode (LED) driver. Each channel can
be individually controlled with a simple serial
communications protocol that is compatible with 3.3-V
or 5-V CMOS logic levels, depending on the
operating VCC. When the serial data buffer is loaded,
a LAT rising edge transfers the data to the OUTn
outputs. The BLANK pin can be used to turn off all
OUTn outputs during power-on and output data
latching to prevent unwanted image displays during
these times. The constant-current value of all 16
channels is set by a single external resistor.
Each constant-current output has a pre-charge fieldeffect transistor (FET) that can reduce ghosting on
the multiplexing (dynamic) drive LED display. Multiple
TLC59283s can be cascaded together to control
additional LEDs from the same processor.
VLED
+
SW
COMn
COMn
VLED
SW
COM1
COM1
VLED
SW
COM0
COM0
COMSEL0
COMSEL1
COMSELn
¼
OUT0
DATA
LAT
Controller
¼
SIN
SCLK
BLANK
OUT15
LAT
VCC
GND
VCC
BLANK
VCC
Device 1
OUT15
SOUT
SCLK
LAT
IREF
¼
SIN
SCLK
BLANK
RIREF
OUT0
SOUT
VCC
IREF
RIREF
Device n
GND
3
Typical Application Circuit (Multiple Daisy-Chained TLC59283s)
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE AND ORDERING INFORMATION (1)
PRODUCT
(1)
PACKAGE-LEAD
TLC59283
SSOP-24 and QSOP-24
TLC59283
QFN-24
ORDERING NUMBER
TRANSPORT MEDIA, QUANTITY
TLC59283DBQR
Tape and Reel, 2500
TLC59283DBQ
Tube, 50
TLC59283RGER
Tape and Reel, 3000
TLC59283RGE
Tape and Reel, 250
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1) (2)
Over operating free-air temperature range, unless otherwise noted.
VALUE
MIN
Voltage
Temperature
Electrostatic discharge ratings
(1)
(2)
UNIT
VCC
Supply
–0.3
+6
V
VIN
Input range, SIN, SCLK, LAT, BLANK, IREF
–0.3
VCC + 0.3
V
Output range, SOUT
–0.3
VCC + 0.3
V
Output range, OUT0 to OUT15
–0.3
+11
V
+50
mA
+150
°C
VOUT
Current
MAX
IOUT
Output (dc), OUT0 to OUT15
TJ(MAX)
Operating junction
Tstg
Storage range
ESD
+150
°C
Human body model (HBM)
–55
2000
V
Charged device model (CDM)
2000
V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
All voltage values are with respect to network ground terminal.
THERMAL INFORMATION
TLC59283
THERMAL METRIC (1)
DBQ
RGE
24 PINS
24 PINS
θJA
Junction-to-ambient thermal resistance
91.5
42.9
θJCtop
Junction-to-case (top) thermal resistance
55.2
55.3
θJB
Junction-to-board thermal resistance
44.9
21.7
ψJT
Junction-to-top characterization parameter
16.8
1.9
ψJB
Junction-to-board characterization parameter
44.5
21.8
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
8.8
(1)
2
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
RECOMMENDED OPERATING CONDITIONS
At TA = –40°C to +85°C, unless otherwise noted.
TLC59283
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
3
5.5
V
10
V
V
DC CHARACTERISTICS (VCC = 3 V to 5.5 V)
VCC
Supply voltage
VO
Voltage applied to output
VIH
Input voltage
VIL
IOH
Output current
IOL
IOLC
OUT0 to OUT15
High
SIN, SCLK, LAT, BLANK
0.7 × VCC
VCC
Low
SIN, SCLK, LAT, BLANK
GND
0.3 × VCC
High
SOUT
Low
SOUT
Constant output sink current
TA
Temperature range
TJ
V
–2
mA
2
mA
OUT0 to OUT15, 3 V ≤ VCC ≤ 3.6 V
2
35
mA
OUT0 to OUT15, 3.6 V < VCC ≤ 5.5 V
2
45
mA
Operating free-air
–40
+85
°C
Operating junction
–40
+125
°C
AC CHARACTERISTICS (VCC = 3 V to 5.5 V)
fCLK
(SCLK)
Data shift clock frequency
SCLK
35
MHz
tWH0
SCLK
10
ns
tWL0
SCLK
10
ns
LAT
20
ns
tWH1
Pulse duration
tWH2
BLANK
100
ns
tWL2
BLANK
50
ns
tSU0
SIN↑↓ – SCLK↑
4
ns
LAT↓ – SCLK↑
10
ns
SIN↑↓ – SCLK↑
4
ns
LAT↓ – SCLK↑
10
ns
tSU1
tH0
tH1
Setup time
Hold time
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
3
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
ELECTRICAL CHARACTERISTICS
All minimum and maximum specifications are at TA = –40°C to +85°C and VCC = 3 V to 5.5 V, unless otherwise noted.
Typical specifications are at TA = +25°C and VCC = 3.3 V.
TLC59283
PARAMETER
VOH
Output voltage
VOL
TEST CONDITIONS
High
IOH = –2 mA at SOUT
Low
IOL = 2 mA at SOUT
MIN
TYP
VCC – 0.4
VPCHG
Pre-charged voltage
IO = –10 µA
VCC – 2.0
VIREF
Reference voltage output
RIREF = 1.5 kΩ, TA = +25°C
IIN
Input current
VIN = VCC or GND at SIN and SCLK
VCC – 1.4
MAX
UNIT
VCC
V
0.4
V
VCC – 0.8
V
1
μA
1.208
V
–1
ICC0
SIN, SCLK, LAT = GND, BLANK = VOUTn = VCC, RIREF = open
1
2
mA
ICC1
SIN, SCLK, LAT = GND, BLANK = VOUTn = VCC,
RIREF = 3 kΩ (IOUT = 17.6 mA target)
3
4
mA
All OUTn = ON, SIN, SCLK, LAT, BLANK = GND,
VOUTn = 0.8 V, RIREF = 3 kΩ
6
8
mA
All OUTn = ON, SIN, SCLK, LAT, BLANK = GND,
VOUTn = 0.8 V, RIREF = 1.5 kΩ (IOUT = 35.3 mA target)
7
11
mA
35.3
37.7
mA
0.1
μA
0.2
μA
0.07
0.5
μA
Supply current (VCC)
ICC2
ICC3
IOLC
Constant output current
All OUTn = ON, VOUTn = VOUTfix = 0.8 V, RIREF = 1.5 kΩ,
TA = +25°C (see Figure 8)
IOLKG0
Output leakage current
TJ = +25°C
All OUTn = OFF, VOUTn = VOUTfix = 10 V,
T = +85°C
BLANK = VCC, RIREF = 1.5 kΩ (see Figure 8) J
TJ = +125°C
ΔIOLC0
ΔIOLC1
Constantcurrent error
Channel-tochannel (1)
All OUTn = ON, VOUTn = VOUTfix = 0.8 V, RIREF = 1.5 kΩ,
TA = +25°C (see Figure 8)
±1.4
±3
%
Device-todevice (2)
All OUTn = ON, VOUTn = VOUTfix = 0.8 V, RIREF = 1.5 kΩ,
TA = +25°C (see Figure 8)
±2
±4
%
±0.05
±1
%/V
±0.5
±1
%/V
ΔIOLC2
Line regulation (3)
All OUTn = ON, VOUTn = VOUTfix = 0.8 V, RIREF = 1.5 kΩ,
VCC = 3 V to 5.5 V
ΔIOLC3
Load regulation (4)
All OUTn = ON, VOUTn = 0.8 V to 3 V, VOUTfix = 0.8 V,
RIREF = 1.5 kΩ
RPUP
RPDWN
RPCHG
(1)
Resistor
32.9
Pull-up
BLANK
250
500
750
kΩ
Pull-down
LAT
250
500
750
kΩ
3
6
kΩ
Pre-charge FET on-resistance
VCC = 5.0 V, VOUTn = 0 V, OUT0 to OUT15,
BLANK = VCC, TA = +25°C
The deviation of each output from the average of OUT0 to OUT15 constant-current. Deviation is calculated by the formula:
D (%) =
IOUTn
(IOUT0 + IOUT1 + ... + IOUT14 + IOUT15)
-1
´ 100
16
(2)
The deviation of the OUT0 to OUT15 constant-current average from the ideal constant-current value.
Deviation is calculated by the following formula:
(IOUT0 + IOUT1 + ... IOUT14 + IOUT15)
16
D (%) =
- (Ideal Output Current)
´ 100
Ideal Output Current
Ideal current is calculated by the formula:
IOUT(IDEAL) = 43.8 ´
(3)
(IOUTn at VCC = 5.5 V) - (IOUTn at VCC = 3 V)
(IOUTn at VCC = 3 V)
´
100
5.5 V - 3 V
Load regulation is calculated by the equation:
D (%/V) =
4
RIREF
Line regulation is calculated by this equation:
D (%/V) =
(4)
1.208 V
(IOUTn at VOUTn = 3 V) - (IOUTn at VOUTn = 1 V)
(IOUTn at VOUTn = 1 V)
100
´
3V-1V
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
SWITCHING CHARACTERISTICS
All minimum and maximum specifications are at TA = –40°C to +85°C, VCC = 3 V to 5.5 V, CL = 15 pF, RL = 110 Ω,
RIREF = 1.5 kΩ, and VLED = 5.0 V, unless otherwise noted. Typical values are at TA = +25°C and VCC = 3.3 V.
TLC59283
PARAMETER
TYP
MAX
SOUT (see Figure 7)
3
10
OUTn (see Figure 6)
44
SOUT (see Figure 7)
3
OUTn (see Figure 6)
44
tD0
SCLK↑ to SOUT↑↓
11
20
ns
tD1
LAT↑ or BLANK↑↓ to OUT0 on or off, TA = +25°C
60
100
ns
Grouped OUTn on or off to next group on or off,
TA = +25°C
2
tR0
Rise time
tR1
tF0
Fall time
tF1
Propagation delay time
tD2
tON_ERR
(1)
Output on-time error (1)
TEST CONDITIONS
MIN
Output on or off latch data = all '1', 50-ns BLANK GND
level pulse, VCC = 3.3 V, TA = +25°C
UNIT
ns
ns
10
ns
ns
ns
–45
45
ns
Output on-time error (tON_ERR) is calculated by the formula: tON_ERR (ns) = tOUT_ON – BLANK low level one-shot pulse width (tWL2).
tOUT_ON indicates the actual on-time of the constant-current output.
PIN CONFIGURATIONS
DBQ PACKAGE
SSOP-24 AND QSOP-24
(TOP VIEW)
SCLK
SIN
GND
VCC
IREF
SOUT
24
23
22
21
20
19
RGE PACKAGE
QFN-24
(TOP VIEW)
GND
1
24
VCC
SIN
2
23
IREF
SCLK
3
22
SOUT
LAT
4
21
BLANK
LAT
1
18
BLANK
OUT0
5
20
OUT15
OUT0
2
17
OUT15
OUT1
6
19
OUT14
OUT1
3
16
OUT14
OUT2
7
18
OUT13
OUT2
4
15
OUT13
OUT3
8
17
OUT12
OUT3
5
14
OUT12
OUT4
9
16
OUT11
OUT4
6
13
OUT11
OUT5
10
15
OUT10
OUT6
11
14
OUT9
OUT7
12
13
OUT8
7
8
9
10
11
12
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
Thermal Pad
(Bottom Side)
NOTE: Thermal pad is not connected to GND internally. The thermal pad must be connected to GND via the printed circuit board (PCB)
pattern.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
5
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
PIN DESCRIPTIONS
PIN
NUMBER
NAME
6
DBQ
RGE
I/O
DESCRIPTION
All outputs empty (blank); Schmitt buffer input. When BLANK is high, all constant-current outputs
(OUT0 to OUT15) are forced off and all pre-charge FETs are turned on. When BLANK is low, all
constant-current outputs are controlled by the data in the output on or off data latch and all precharge FETs are turned off. This pin is internally pulled up to VCC with a 500-kΩ (typ) resistor.
BLANK
21
18
I
GND
1
22
—
Power ground
IREF
23
20
I/O
Constant-current value setting, the OUT0 to OUT15 sink constant-current outputs are set to the
desired values by connecting an external resistor between IREF and GND.
LAT
4
1
I
Level-triggered latch; Schmitt buffer input. The data in the 16-bit shift register continue to transfer
to the output on or off data latch while LAT is high. Therefore, if the data in the 16-bit shift register
are changed when LAT is high, the data in the data latch are also changed. The data in the data
latch are held when LAT is low. This pin is internally pulled down to GND with a 500-kΩ (typ)
resistor.
OUT0
5
2
O
Constant-current output. Each output can be tied together with others to increase the constantcurrent. Different voltages can be applied to each output.
OUT1
6
3
O
Constant-current output
OUT2
7
4
O
Constant-current output
OUT3
8
5
O
Constant-current output
OUT4
9
6
O
Constant-current output
OUT5
10
7
O
Constant-current output
OUT6
11
8
O
Constant-current output
OUT7
12
9
O
Constant-current output
OUT8
13
10
O
Constant-current output
OUT9
14
11
O
Constant-current output
OUT10
15
12
O
Constant-current output
OUT11
16
13
O
Constant-current output
OUT12
17
14
O
Constant-current output
OUT13
18
15
O
Constant-current output
OUT14
19
16
O
Constant-current output
OUT15
20
17
O
Constant-current output
SCLK
3
24
I
Serial data shift clock; Schmitt buffer input.
All data in the 16-bit shift register are shifted toward the MSB by a 1-bit SCLK synchronization.
SIN
2
23
I
Serial data input for driver on or off control; Schmitt buffer input.
When SIN is high, the LSB is set to '1' for only one SCLK input rising edge. If two SCLK rising
edges are input while SIN is high, then the 16-bit shift register LSB and LSB+1 are set to '1'.
When SIN is low, the LSB is set to '0' at the SCLK input rising edge.
SOUT
22
19
O
Serial data output. This output is connected to the 16-bit shift register MSB. SOUT data changes
at the SCLK rising edge.
VCC
24
21
—
Power-supply voltage
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
FUNCTIONAL BLOCK DIAGRAM
VCC
VCC
SIN
LSB
MSB
16-Bit Shift Register
(1 Bit x 16 Channels)
SCLK
SOUT
0
15
¼
MSB
LSB
LAT
Output On or Off Data Latch
(1 Bit x 16 Channels)
0
15
¼
BLANK
16-Channel Constant-Current Sink Driver
with Grouped Switching Delay
IREF
ALLOFF
VCC - 1.4 V
(typ)
Timing
Control
GND
GND
Pre-Charge
FETs
¼
OUT0
OUT1
OUT14
OUT15
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
7
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
PARAMETER MEASUREMENT INFORMATION
PIN-EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
VCC
VCC
INPUT
SOUT
GND
GND
Figure 1. SIN and SCLK
Figure 4. SOUT
VCC
VCC
LAT
OUTn
(1)
GND
GND
Figure 2. LAT
(1)
n = 0 to 15.
Figure 5. OUT0 Through OUT15
VCC
BLANK
GND
Figure 3. BLANK
8
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
TEST CIRCUITS
RL
VCC
VCC
OUTn
IREF
RIREF
VLED
CL
GND
Figure 6. OUTn Rise and Fall Time Test Circuit
VCC
SOUT
VCC
CL
GND
Figure 7. SOUT Rise and Fall Time Test Circuit
VCC
OUT0
¼
VCC
IREF
¼
RIREF
OUTn
GND OUT15
VOUTfix
VOUTn
Figure 8. OUTn Constant-Current Test Circuit
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
9
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
TIMING DIAGRAMS
tWH0, tWL0, tWH1, tWH2, tWL2:
VCC
Input
(1)
50%
GND
tWL
tWH
tSU0, tSU1, tH0, tH1:
VCC
SCLK
(1)
50%
GND
tSU
tH
VCC
Data and Control
Clock
50%
(1)
GND
(1) Input pulse rise and fall time is 1 ns to 3 ns.
Figure 9. Input Timing Diagram
(1)
tR0, tR1, tF0, tF1, tD0, tD1, tD2, tD3, tON_ERR :
VCC
Input
(2)
50%
GND
tWL2
tD
VOH or VOUTn
90%
Output
50%
10%
tOUT_ON
VOL or VOUTn
tR or tF
(1) tON_ERR is calculated by tOUTON – tWL2.
(2) Input pulse rise and fall time is 1 ns to 3 ns.
Figure 10. Output Timing Diagram
10
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
SIN
DATA
0A
DATA
15B
DATA
13B
DATA
14B
DATA
12B
DATA
11B
DATA
3B
DATA
2B
DATA
1B
DATA
0B
tH0
tSU0
tH1
tWH0
DATA
15C
DATA
14C
DATA
13C
DATA
12C
DATA
11C
DATA
10C
1
2
3
tWL0
4
5
6
tSU1
SCLK
1
2
3
4
5
13
14
15
16
tWH1
LAT
DATA
15B
DATA
14B
DATA
13B
DATA
12B
DATA
3B
DATA
2B
DATA
1B
DATA
0B
DATA
15C
DATA
14C
DATA
13C
DATA
12C
DATA
11C
Shift Register
LSB+1 Data (Internal)
DATA
1A
DATA
0A
DATA
15B
DATA
14B
DATA
13B
DATA
4B
DATA
3B
DATA
2B
DATA
1B
DATA
0B
DATA
15C
DATA
14C
DATA
13C
DATA
12C
Shift Register
MSB-1 Data (Internal)
DATA
14A
DATA
13A
DATA
12A
DATA
11A
DATA
10A
DATA
2A
DATA
1A
DATA
15B
DATA
14B
DATA
13B
DATA
12B
DATA
11B
DATA
10B
DATA
9B
Shift Register
MSB Data (Internal)
DATA
15A
DATA
14A
DATA
13A
DATA
12A
DATA
11A
DATA
3A
DATA
2A
DATA
1A
DATA
15B
DATA
14B
DATA
13B
DATA
12B
DATA
11B
DATA
10B
¼
¼
Output On or Off Control
Data Latch (Internal)
Previous On or Off Control Data
(1)
SOUT
¼
DATA
0A
¼
Shift Register
LSB Data (Internal)
DATA
15A
DATA
14A
DATA
13A
DATA
12A
tD0
DATA
2A
DATA
1A
Latest On or Off Control Data
DATA
15B
DATA
0A
DATA
14B
DATA
13B
tR0/tF0
DATA
12B
DATA
11B
DATA
10B
tWH2
BLANK
tWL2
OFF
OUT0
OFF
ON
ON
OFF
OUT1, 15
tD1
tD1
tOUTON
tD2
tD2
OFF
ON
ON
¼
¼
¼
¼
tF1
tR1
OFF
OUT7, 9
ON
tD2
tD2
OFF
OUT8
OFF
ON
ON
ON
ON
Pre-Charge FET
OFF
ON
ON
OFF
OFF
(1) Output on or off data = FFFFh.
(2) tON_ERR = tOUTON – tWL2.
Figure 11. Data Write and Output On or Off Timing Diagram
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
11
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
TYPICAL CHARACTERISTICS
At TA = +25°C and VCC = 3.3 V, unless otherwise noted.
REFERENCE RESISTOR
vs OUTPUT CURRENT
OUTPUT CURRENT vs
OUTPUT VOLTAGE (VCC = 3.3 V)
50
100
Output Current (mA)
Reference Resistor (kW)
40
26.5
10.6
10
5.29
3.53
2.65
2.12 1.76
1
10
20
30
Output Current (mA)
30
25
20
15
40
0
50
0
0.5
1
G020
OUTPUT CURRENT vs OUTPUT VOLTAGE
(VCC = 3.3 V, Magnified)
39
IO = 45 mA
38
IO = 40 mA
37
35
IO = 35 mA
30
IO = 30 mA
25
IO = 20 mA
Output Current (mA)
40
20
15
IO = 10 mA
IO = 5 mA
5
0.5
1
1.5
2
Output Voltage (V)
36
35
34
33
TA = −40°C
TA = +25°C
TA = +85°C
32
IO = 2 mA
0
VCC = 3.3 V
VOUTn = 0.8 V
IO = 35 mA
2.5
31
3
0
0.5
1
Output Voltage (V)
G001
Figure 14.
1.5
G004
Figure 15.
OUTPUT CURRENT vs OUTPUT VOLTAGE
(VCC = 5.0 V, Magnified)
ΔIOLC vs AMBIENT TEMPERATURE
39
3
VCC = 5.0 V
VOUTn = 0.8 V
IO = 35 mA
38
37
2
VOUTn = 0.8 V
IO = 20 mA
1
36
∆IOLC (%)
Output Current (mA)
3
G000
OUTPUT CURRENT vs
OUTPUT VOLTAGE (VCC = 5.0 V)
10
35
34
0
−1
33
TA = −40°C
TA = +25°C
TA = +85°C
32
0
0.5
1
Output Voltage (V)
−2
1.5
−3
−40
G005
Figure 16.
12
2.5
Figure 13.
45
31
1.5
2
Output Voltage (V)
Figure 12.
VCC = 5.0 V, VOUTn = 0.8 V, TA = +25°C
50
Output Current (mA)
35
5
1.32
55
0
IO = 10 mA
IO = 5 mA
IO = 2 mA
10
1.51
1.18
0
IO = 35 mA
IO = 30 mA
IO = 20 mA
VCC = 3.3 V
VOUTn = 0.8 V
TA = +25°C
45
VCC = 3.3 V
VCC = 5.0 V
−20
0
20
40
60
Ambient Temperature (°C)
80
100
G006
Figure 17.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C and VCC = 3.3 V, unless otherwise noted.
SUPPLY CURRENT vs OUTPUT CURRENT
SUPPLY CURRENT vs AMBIENT TEMPERATURE
12
12
VCC = 5.0 V
VCC = 3.3 V
11
10
10
9
ICC (mA)
ICC (mA)
VCC = 3.3 V
VCC = 5.0 V
11
8
9
8
7
5
4
7
SIN = 17.5 MHz
SCLK = 35 MHz
All Outputs On
TA = +25°C
6
0
10
20
30
Output Current (mA)
40
SIN = 17.5 MHz
SCLK = 35 MHz
All Outputs On
IO = 35 mA
6
5
−40
50
−20
0
20
40
60
80
Ambient Temperature (°C)
G018
Figure 18.
100
G008
Figure 19.
CONSTANT-CURRENT OUTPUT
VOLTAGE WAVEFORM
CH1-BLANK
(50 ns)
Channel 1
(5 V/div)
Channel 2
(2 V/div)
Channel 3
(2 V/div)
Channel 4
(2 V/div)
CH2-OUT0
(BLANK = 50 ns)
IO = 35 mA
TA = +25°C
RL = 110 W
CL = 15 pF
VCC = 5 V
VLED = 5 V
CH3-OUT1
(BLANK = 50 ns)
CH4-OUT2
(BLANK = 50 ns)
Time (20 ns/div)
G021
Figure 20.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
13
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
DETAILED DESCRIPTION
CONSTANT SINK CURRENT VALUE SETTING
The constant-current values are determined by an external resistor (RIREF) placed between IREF and GND. The
resistor (RIREF) value is calculated by Equation 1.
RIREF (kW) =
VIREF (V)
´ 43.8
IOLC (mA)
Where:
VIREF = the internal reference voltage on the IREF pin (typically 1.208 V)
(1)
IOLC must be set in the range of 2 mA to 35 mA when VCC is less than 3.6 V. Also, when VCC is equal to 3.6 V or
greater, IOLC must be set in the range of 2 mA to 45 mA. The constant sink current characteristic for the external
resistor value is illustrated in Figure 12. Table 1 describes the constant-current output versus external resistor
value.
Table 1. Constant-Current Output versus External Resistor Value
IOLC (mA)
RIREF (kΩ, Typical)
45 (VCC > 3.6 V only)
1.18
40 (VCC > 3.6 V only)
1.32
35
1.51
30
1.76
25
2.12
20
2.65
15
3.53
10
5.29
5
10.6
2
26.5
CONSTANT-CURRENT DRIVER ON OR OFF CONTROL
When BLANK is low, the corresponding output is turned on if the data in the on or off control data latch are '1'
and remains off if the data are '0'. When BLANK is high, all outputs are forced off. This control is shown in
Table 2.
Table 2. Output On or Off Control Data Truth Table
OUTPUT ON OR OFF DATA
CONSTANT-CURRENT OUTPUT
STATUS
0
Off
1
On
When the device is initially powered on, the data in the 16-bit shift register and output on or off data latch are not
set to default values. Therefore, the output on or off data must be written to the data latch before turning the
constant-current output on. BLANK should be high when powered on because the constant-current may be
turned on as a result of random data in the output on or off data latch.
14
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
REGISTER CONFIGURATION
The TLC59283 has a 16-bit shift register and an output on or off data latch. Both the shift register and data latch
are 16 bits long and are used to turn the constant-current outputs on and off. Figure 21 shows the shift register
and data latch configuration. The data at the SIN pin are shifted into the 16-bit shift register LSB at the rising
edge of the SCLK pin; SOUT data change at the SCLK rising edge.
16-Bit Shift Register (1 Bit ´ 16 Channels)
SOUT
MSB
15
14
13
12
On or Off
Data for
OUT15
On or Off
Data for
OUT14
On or Off
Data for
OUT13
On or Off
Data for
OUT12
4
11
¼
3
2
1
LSB
0
On or Off
Data for
OUT3
On or Off
Data for
OUT2
On or Off
Data for
OUT1
On or Off
Data for
OUT0
3
2
1
LSB
0
On or Off
Data for
OUT3
On or Off
Data for
OUT2
On or Off
Data for
OUT1
On or Off
Data for
OUT0
SIN
SCLK
¼
MSB
15
14
13
12
On or Off
Data for
OUT15
On or Off
Data for
OUT14
On or Off
Data for
OUT13
On or Off
Data for
OUT12
4
11
¼
Output On or Off Data Latch (1 Bit ´ 16 Channels)
LAT
16 Bits
To Constant-Current Driver Control Block
Figure 21. 16-Bit Shift Register and Output On or Off Data Latch Configuration
The output on or off data in the 16-bit shift register continue to transfer to the output on or off data latch while
LAT is high. Therefore, if the data in the 16-bit shift register are changed when LAT is high, the data in the data
latch are also changed. The data in the data latch are held when LAT is low. When the device initially powers on,
the data in the output on or off shift register and latch are not set to default values; on or off control data must be
written to the on or off control data latch before turning the constant-current output on. All constant-current
outputs are forced off when BLANK is high. The OUTn on or off outputs are controlled by the data in the output
on or off data latch. The writing data truth table and timing diagram are shown in Table 3 and Figure 22,
respectively.
Table 3. Truth Table in Operation
SCLK
LAT
BLANK
SIN
OUT0…OUT7…OUT15
SOUT
↑
High
Low
Dn
Dn…Dn – 7…Dn – 15
Dn – 15
↑
Low
Low
Dn + 1
No change
Dn – 14
↑
High
Low
Dn + 2
Dn + 2…Dn – 5…Dn – 13
Dn – 13
↓
—
Low
Dn + 3
Dn + 2…Dn – 5…Dn – 13
Dn – 13
↓
—
High
Dn + 3
Off
Dn – 13
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
15
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
0
1
2
3
4
5
6
D15
D14
D13
D12
D11 D10
7
8
9
10
11
12
13
14
15
SCLK
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SIN
LAT
BLANK
D0
OFF
OUT0
ON
OUT1
D1
OUT2
D2
D3
OUT3
ON
OFF
ON
OFF
ON
Don’t Care
¼
¼
¼
¼
D15
OUT15
SOUT
OFF
OFF
ON
D15
Figure 22. Operation Timing Diagram
NOISE REDUCTION
Large surge currents may flow through the device and board if all 16 outputs turn on or off simultaneously. These
large current surges can induce detrimental noise and electromagnetic interference (EMI) into other circuits. The
TLC59283 independently turns on or off the outputs for each group with a 1-ns (typ) delay time; see Figure 11.
The 16 outputs are grouped into nine groups of either one or two outputs: group 1 (OUT0), group 2 (OUT1 and
OUT15), group 3 (OUT2 and OUT14), group 4 (OUT3 and OUT13), group 5 (OUT4 and OUT12), group 6 (OUT5
and OUT11), group 7 (OUT6 and OUT10), group 8 (OUT7 and OUT9), and group 9 (OUT9). Both turn-on and
turn-off times are delayed when BLANK transitions from low to high or high to low. Also when output-on and -off
data are changed at the LAT rising edge while BLANK is low, both turn-on and turn-off times are delayed.
However, the state of each output is controlled by the data in the output on or off data latch and the BLANK
level.
16
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
TLC59283
www.ti.com
SBVS199A – JUNE 2012 – REVISED JUNE 2012
Internal Pre-Charge FET
The internal pre-charge FET prevents ghosting of multiplexed LED modules. One cause of this phenomenon is
the parasitic capacitance charging current of the constant-current outputs (OUTn) and PCB wiring connected to
OUTn through the LED. One of the mechanisms is shown in Figure 23.
In Figure 23, the constant-current driver turns LED0-0 on at (1) and off at (2). After LED0-0 is turned off, the
OUT0 voltage is pulled up to VCHG by LED0-0. This OUT0 node has some parasitic capacitance (such as the
constant-current driver output capacitance and the board layout capacitance shown as C0-2). After LED0-0 turns
off, SWPMOS0 is turned off, SWNMOS0 is turned on for COM0, and COM0 is pulled down to GND. Because
there is a parasitic capacitance between COM0 and OUT0, the OUT0 voltage is also pulled down to GND.
Afterwards, SWPMOS1 is turned on for the next common line (COM1). When SWPMOS1 turns on, the OUT0
voltage is pulled up from the ground voltage to VLED – VF. The charge current (ICHRG) flows to the parasitic
capacitor (C0) through LED1-0, causing the LED to briefly turn on and creating a ghosting effect of LED1-0.
VLED
(LED Power-Supply)
SW
PMOS1
SW
PMOS0
LED1-1
LED1-2
COM1
LED Drive Line Selector
¼
SW
NMOS1
Parasitic Capacitor
LED1-0
C0
VLED
SW
PMOS0
C1
C2
ICHRG
LED0-0
LED0-1
Ordinal
LED Driver
OUT0
ON
OUT1
ON
OUT1
OUT2
ON
Constant-Current
Output
OUT2
COM1 is VLED level.
ON
OFF
¼
OUT0
OFF
OFF
OUT0
Voltage
LED0-2
COM0 is GND level.
ON
SW
NMOS1
OUT0
COM0 is VLED level.
OFF
SW
PMOS1
BLANK
COM0
SW
NMOS0
SW
NMOS0
ON
ON
COM1 is GND level.
High
Low
ON
OFF
VLED
VCHG
VLED - VF
LED0-0
Current
20 mA
LED1-0
Current
20 mA
¼
GND
0 mA
0 mA
(1) (2)
OUT0 voltage is pulled down to GND side
by the coupling with LED lamp capacitor
between COM0 and OUT0.
(3)
(4)
Ghost phenomenon is observed
when COM1 goes up to VLED.
Figure 23. LED Ghost-Lighting Phenomenon Mechanism
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
17
TLC59283
SBVS199A – JUNE 2012 – REVISED JUNE 2012
www.ti.com
The TLC59283 has an internal pre-charge FET to prevent ghosting, as shown in Figure 24. When a small delay
after PWM control for a single common line completes, the FET pulls OUTn up to VCC. The charge current does
not flow to C0 through LED1-0 when SWMOS1 is turned on and the ghosting is eliminated at (3). However,
depending on the LED anode voltage, the number of LEDs in series, the LED forward voltage, and the
TLC59283 VCC supply voltage, there may not be a great enough ghost-canceling effect.
VLED
(LED Power-Supply)
SW
PMOS1
LED1-1
LED1-2
COM1
SW
PMOS0
LED Drive Line Selector
¼
SW
NMOS1
Parasitic Capacitor
LED1-0
C0
VLED
C1
C2
Disappearing ICHRG
SW
PMOS0
SW
NMOS0
LED0-1
COM0 is GND level.
ON
OFF
COM1 is VLED level.
ON
OFF
SW
NMOS1
OFF
ON
COM1 is GND level.
High
BLANK
LED0-0
COM0 is VLED level.
OFF
SW
PMOS1
COM0
SW
NMOS0
ON
Low
ON
LED0-2
OUT0
OFF
¼
OUT0
OUT1
OUT2
PCHGON
Signal
Pre-Charge FET
VCC
OUT0
Voltage
BLANK
PCHGON
Timing
Control
OUT0
ON
OUT0
ON
Constant-Current
Output
OUT0
ON
ON
OFF
VCC - 1.4 V (typ)
VLED
VCHG
VLED - VF
LED0-0
Current
20 mA
LED1-0
Current
20 mA
GND
0 mA
¼
TLC59283
LED Driver
0 mA
(1) (2)
(3)
(4)
Ghost phenomenon not seen
Figure 24. LED Ghost-Lighting Mechanism by Pre-Charge FET
18
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TLC59283
PACKAGE OPTION ADDENDUM
www.ti.com
20-Jun-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
TLC59283DBQ
ACTIVE
SSOP/QSOP
DBQ
24
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TLC59283DBQR
ACTIVE
SSOP/QSOP
DBQ
24
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TLC59283RGER
PREVIEW
VQFN
RGE
24
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TLC59283RGET
PREVIEW
VQFN
RGE
24
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Jun-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TLC59283DBQR
Package Package Pins
Type Drawing
SSOP/
QSOP
DBQ
24
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
16.4
Pack Materials-Page 1
6.5
B0
(mm)
K0
(mm)
P1
(mm)
9.0
2.1
8.0
W
Pin1
(mm) Quadrant
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Jun-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLC59283DBQR
SSOP/QSOP
DBQ
24
2500
346.0
346.0
33.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Mobile Processors
www.ti.com/omap
Wireless Connectivity
www.ti.com/wirelessconnectivity
TI E2E Community Home Page
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated