E2U0030-28-82 ¡ Semiconductor MSM7570-01 ¡ Semiconductor This version:MSM7570-01 Aug. 1998 Previous version: Nov. 1996 Multi-Function ADPCM CODEC GENERAL DESCRIPTION The MSM7570-01, developed for advanced digital cordless telephone systems, is a single channel ADPCM CODEC IC which performs mutual transcoding between the analog voice band signal and 32 kbps ADPCM serial data. This device includes DTMF Tone and several types of tone generation, transmit/receive data mute and gain control, side-tone path and gain control, and VOX function. Using advanced ciruit technology, the device operates using a single 5 V power supply and have low power consumption. FEATURES • Single 5 V Power Supply Operation VDD: 4.5 V to ␣ 5.5 V ITU-T G.726 (32 kbps, 24 kbps, 16 kbps) • ADPCM Algorithm : • Transmit/Receive Full-Duplex Single Channel Operation • Transmit/Receive Synchronous Mode Only • PCM Data Format : A-law/µ-law Selectable • Serial PCM/ADPCM Transmission Data Rate :64 kbps to 2048 kbps • Low Power Consumption Operating Mode : 70 mW Typ. (VDD = 5.0 V) Power-Down Mode : 0.5 mW Typ. (VDD = 5.0 V) • Two Analog Input Amplifier Stages : Externally Adjustable Gain • Analog Output Stage : Push-pull Drive (direct drive of 350 W␣ + 120 nF) • Master Clock Frequency : 12.288/19.200 MHz Selectable • Transmit/Receive Mute, Transmit/Receive Programmable Gain Control • Side Tone Path with Programmable Attenuation (8-step Level Adjustment) • Built-in DTMF Tone Generator • Built-in Various Ringing/Function Tones Generator • Built-in Various Ring Back Tone Generator • Serial MCU Interface Control • Built-in Sounder Driving Amplifier • Built-in VOX Control Transmit side : Voice Signal Detect Receive side : Background Noise Generation • Characteristic Evaluation Board. • Package: 32-pin plastic TSOP (TSOPI32-P-814-0.50-1K) (Product name: MSM7570-01TS-K) 1/26 AIN1+ Voice Detect GSX1 RC Filter – + TXON/OFF AIN2 A/D Conv. VOXO Compander BPF Transmit gain adjust GSX2 AOUT+ XSYNC IS TXMUTE S / P PCMSI P / S PCMSO S / P PCMRI P / S PCMRO –1 Noise Generator – + Tone gain adjust Power Detect RXMUTE PWI RC Filter D/A Conv. + LPF RXON/OFF RXPAD VFRO + Receive gain adjust SAO+ +1 SAO– –1 Expander ADPCM DECODER S / P BCLK IR RSYNC VOXI Clock/Timing MCU Interface VREF PDN/ RESET MCK DOUT DIN EXCK DEN AGC DGC VDDC 2/26 MSM7570-01 SG P / S DTMF/other Tone Generator Side tone gain adjust AOUT– ADPCM CODER ¡ Semiconductor – + BLOCK DIAGRAM AIN1– MSM7570-01 ¡ Semiconductor PIN CONFIGURATION (TOP VIEW) AG SG AIN1+ AIN1– GSX1 AIN2 GSX2 VFRO PWI AOUT– AOUT+ SAO+ SAO– PDN/RESET VOXI VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 DG BCLK XSYNC RSYNC PCMSO PCMSI IS IR PCMRO PCMRI MCK DEN EXCK DIN DOUT VOXO 32-Pin Plastic TSOP 3/26 MSM7570-01 ¡ Semiconductor PIN AND FUNCTIONAL DESCRIPTIONS AIN1+, AIN1–, AIN2, GSX1, GSX2 Transmit analog inputs and the output for transmit gain adjustment. AIN1– (AIN2) connects to the inverting input of the internal transmit amplifier. AIN1+ connects to non-inverting input of the internal transmit amplifier. GSX1 (GSX2) connects to the internal transmit amplifier output. Refer to Fig.1 for gain adjustment. VFRO, AOUT+, AOUT–, PWI Receive analog outputs and the output for receive gain adjustment. VFRO is the receive filter output. AOUT+ and AOUT– are differential analog signal outputs which can directly drive ZL = 350 W + 120 nF or a 1.2 kW load. Refer to Fig.1 for gain adjustment. AIN1– Differential Analog Input C1 Vi R1 – V REF + AIN1+ C1 0.1 mF R2 R1 R2 10 mF + GSX1 SG AIN2 – R3 C2 to ENCODER + R4 GSX2 Transmit Gain: V GSX2 /Vi = (R2/R1) ¥ (R4/R3) Receive Gain: Vo/V VFRO = 2 ¥ (R6/R5) – VFRO from DECODER R5 PWI R6 AOUT– Z L = 120 nF + 350 W VO Differential Analog Output SELECT + AOUT+ SAO+ Z L = 120 nF + 350 W – –1 +1 Differential Sound Output SAO– –1 Figure 1 Analog Input/Output Interface 4/26 ¡ Semiconductor MSM7570-01 SAO+, SAO– Differential analog outputs for sound output. Control register data CR4-B5 determines the output pins (AOUT+ and AOUT- /SAO+ and SAO) for the voice signal and an acoustic component of the sound tone, DTMF tone, R tone, F tone, and various types of tones at either the VFRO pin or the SAO+ and SAO- pins. The output load conditions of these pins are the same as those of AOUT+ and AOUT-. SG Analog signal ground. The output voltage of this pin is approximately 2.4 V. Put the bypass capacitors (10 µF in parallel with 0.1 µF ceramic type) between this pin and AG to get the specified noise characteristics. During power-down, this output voltage is 0 V. The SG voltage if necessary should be used via a baffer. AG Analog ground. DG Digital ground. This ground is separated from the analog signal ground pin (AG). The DG pin must be kept as close as possible to AG on the PCB. VDD +5 V power supply. PDN/RESET Power down and reset control input. A “0” level makes the IC enter a power down state. At the same time, all control register data is reset to the initial state. Set this pin to “1” during normal operating mode. The power down state is controlled by a logical OR with CR0-B5 of the control register. When using PDN/RESET for power down and reset control, set CR0-B5 to digital “0”. The reset width (during "L") should be 200 ns or more. MCK Master clock input. The frequency must be 12.288 MHz or 19.2 MHz. The applied clock frequency is selected by the control register data CR0-B6. The master clock signal may be asynchronous with BCLK, XSYNC, and RSYNC. 5/26 ¡ Semiconductor MSM7570-01 PCMSO Transmit PCM data output. PCM is output from MSB in synchronization with the rising edge of BCLK and XSYNC. PCMSI Transmit PCM data input. This signal is converted to the transmit ADPCM data. PCM is shifted in synchronization with the falling edge of BCLK. Normally, this pin is connected to PCMSO. PCMRO Receive PCM data output. PCM is the output signal after ADPCM decoder processing. This signal is output serially from MSB in synchronization with the rising edge of BCLK and RSYNC. PCMRI Receive PCM data input. PCM is shifted on the rising edge of the BCLK and input from MSB. Normally, this pin is connected to PCMRO. IS Transmit ADPCM signal output. After having encoded PCM with ADPCM, this signal is output from MSB in synchronization with the rising edge of BCLK and XSYNC. This pin is an open drain output and remains in a high impedence state during power-down. IS requires a pull-up resistor. IR Receive ADPCM signal input. This input signal is shifted serially on the falling edge of BCLK in synchronization with RSYNC and input from MSB. BCLK Shift clock input for the PCM data (PCMSO, PCMSI, PCMRO, PCMRI) and the ADPCM data(IS, IR) . The frequency is set in the 64 kHz to 2048 kHz range. 6/26 ¡ Semiconductor MSM7570-01 XSYNC Transmit PCM and ADPCM data 8 kHz synchronous signal input. Synchronize this signal with BCLK signal . XSYNC is used to indicate the MSB of the transmit serial PCM and ADPCM data stream. Be sure to input the XSYNC signal because it is also used as the input of the timing generator. RSYNC Receive PCM and ADPCM data synchronous signal input. Synchronize this signal with BCLK signal. RSYNC is used to indicate the MSB of the receive serial PCM and ADPCM data stream. VOXO Transmit VOX function signal output. VOX function recognizes the presence or absence of the transmit voice signal by detecting the signal energy. “1” and “0” levels set on this pin correspond to the presence and the absence of voice, respectively. This result appears at the register data CR7-B7. The signal energy detect threshold is set by the control register data CR6-B6, B5. VOXI Signal input for receive VOX function. A “1” level at VOXI indicates the presence of a voice signal. The decoder block processes normal receive signal, and the voice signal appears at analog output pins . The “0” level indicates the absence of a voice signal. Background noise generated in this device is transferred to the analog output pins. The background noise amplitude is set by the control register CR6. Because this signal is ORed with the register data CR6-B3, set the control register data CR6-B3 to digital “0”. 7/26 MSM7570-01 ¡ Semiconductor Voice Input GSX2 Silence VOXO Voice Voice TVXOFF Silence Detect (Hang-over time) TVXON Voice Detect (a) Transmit VOX Function Timing Diagram Silence VOXI Voice Voice Voice Output VFRO Normal Voice Signal Decoded Time period Background Noise (b) Receive VOX Function (CR6-B3: digital "0") Timing Diagram Note: VOXO, VOXI functions become valid when setting CR6-B7 to digital “1”. Figure 2 VOX Function 8/26 MSM7570-01 ¡ Semiconductor , , DEN , EXCK, DIN, DOUT Serial control ports for MCU interface. Reading and writing data are performed by an external MCU through these pins. Eight registers with eight bits are provided on the devices. DEN is the “Enable” control signal input, EXCK is the data shift clock input, DIN is the address and data input, and DOUT is the data output. Fig.3 shows the input/output timing diagram. DEN EXCK W DIN A2 A1 A0 DOUT B7 B6 B5 B4 B3 B2 B1 B0 B2 B1 B0 High Impedance (a) Write Data Timing Diagram DEN EXCK DIN R DOUT A2 A1 A0 B7 High Impedance B6 B5 B4 B3 (b) Read Data Timing Diagram Figure 3 MCU Interface Input/Output Timing Table 1 shows the register map. Table-1 Name Control and Detect Data Address A2 A1 A0 CR0 0 0 0 CR1 0 0 1 CR2 0 1 0 CR3 0 1 1 CR4 1 0 0 CR5 1 0 1 CR6 1 1 0 CR7 1 1 1 B7 B6 B5 A/m MCK PDN SEL SEL ALL MODE1 MODE0 B3 B2 B1 — — — — TX RX TX RX RESET RESET MUTE MUTE TX TX TX TX RX RX RX RX ON/OFF GAIN2 GAIN1 GAIN0 ON/OFF GAIN2 GAIN1 GAIN0 TONE TONE TONE TONE TONE ON/OFF GAIN3 GAIN2 GAIN1 GAIN0 TONE4 TONE3 TONE2 TONE1 TONE0 R/W — — — — Side Tone Side Tone Side Tone GAIN2 DTMF/ OTHERS SEL GAIN1 GAIN0 TONE SAO/ SEND VFRO — — — — B0 PDN SAO/AOUT RX PAD — VOX ON ON OFF VOX ON/OFF LVL1 LVL0 TIME IN LEVEL SEL LVL1 LVL0 — — — — — VOX OUT R/W B4 TX NOISE TX NOISE LVL1 LVL0 R/W : Read/Write enable RX NOISE RX NOISE RX NOISE R/W R/W R/W R/W R/W R/W R R : Read only register. 9/26 MSM7570-01 ¡ Semiconductor ABSOLUTE MAXIMUM RATINGS Symbol Condition Rating Unit Power Supply Voltage Parameter VDD — –0.3 to +7 V Analog Input Voltage VAIN — –0.3 to VDD + 0.3 V Digital Input Voltage VDIN — –0.3 to VDD + 0.3 V Storage Temperature TSTG — –55 to +150 °C RECOMMENDED OPERATING CONDITIONS Parameter Symbol Power Supply Voltage VDD Operating Temperature Ta Condition Voltage must be fixed — Min. Typ. Max. Unit 4.5 — 5.5 V –25 +25 +70 °C 2.2 — VDD V 0 — 0.6 V MCK, XSYNC, RSYNC, PCMRI, Digital Input High Voltage VIH PCMSI, BCLK, IR, PDN/RESET, DEN, EXCK, DIN MCK, XSYNC, RSYNC, PCMRI, Digital Input Low Voltage VIL PCMSI, BCLK, IR, PDN/RESET, DEN, EXCK, DIN Master Clock Frequency Bit Clock Frequency Synchronous Signal Frequency Clock Duty Ratio fMCK1 MCK (CR0–B6 = "0") –0.01% 12.288 +0.01% MHz fMCK2 MCK (CR0–B6 = "1") –0.01% 19.200 +0.01% MHz fBCK BCLK 64 — 2048 kHz XSYNC, RSYNC — 8.0 — kHz MCK, BCLK, EXCK 30 50 70 % — — 50 ns — — 50 ns 100 — — ns fSYMC DC MCK, XSYNC, RSYNC, PCMRI, Digital Input Rise Time tIr PCMSI, BCLK, IR, PDN/RESET, DEN, EXCK, DIN MCK, XSYNC, RSYNC, PCMRI, Digital Input Fall Time tIf PCMSI, BCLK, IR, PDN/RESET, tXS BCLK to XSYNC DEN, EXCK, DIN Transmit Sync Signal Setting Time Receive Sync Signal Setting Time tSX XSYNC to BCLK 100 — — ns tRS BCLK to RSYNC 100 — — ns tSR RSYNC to BCLK 100 — — ns Synchronous Signal Width tWS XSYNC, RSYNC 1 BCLK — 100 ms PCM, ADPCM Set-up Time tDS — 100 — — ns PCM, ADPCM Hold Time Digital Output Load Bypass Capacitors for SG tDH — RDL IS (Pull-up Resistor) CDL IS, PCMSO, PCMRO, VOXO, DOUT CSG SG to AG 100 — — ns 500 — — W — — 100 pF 10 + 0.1 — — mF 10/26 MSM7570-01 ¡ Semiconductor ELECTRICAL CHARACTERISTICS DC and Digital Interface Characteristics Parameter Power Supply Current Symbol IDD1 (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Condition Min. Typ. Max. Unit — 14 28 mA Operating Mode, No Signal, (VDD = 5.0 V) IDD2 Power Down Mode, (VDD = 5.0 V) — 0.1 0.2 mA Input High Voltage VIH — 2.2 — VDD V Input Low Voltage VIL — 0.0 — 0.6 V — — 2.0 mA Input Leakage Current Output Low Voltage IIH VI = VDD IIL VI = 0 V — — 0.5 mA VOL 1 LSTTL, Pull-up: 500 W 0.0 0.2 0.4 V IS — — 10 mA — 5 — pF — 25 50 kW — 700 — ns Output Leakage Current IO Input Capacitance CIN Output Resistance ROSG SG Warm-up Time TSG — SG SG´GND 10+0.1 mF (Rise time to 90% of max. level) Transmit Analog Interface Characteristics (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Parameter * Min. Typ. Max. Unit Input Resistance Symbol RINX AIN1+ , AIN1– , AIN2 Condition 10 — — MW Output Load Resistance RLGX GSX1, GSX2 20 — — kW Output Load Capacitance CLGX GSX1, GSX2 — — 100 pF Output Amplitude VOGX GSX1, GSX2, RL = 20 kW — — *2.226 VPP Input Offset Voltage VOFGX Pre–OPAMPs –20 — +20 mV –3.0 dBm (600 W) = 0 dBm0, + 3.14 dBm0 = 2.226 VPP (A-law) –3.0 dBm (600 W) = 0 dBm0, + 3.17 dBm0 = 2.226 VPP (m-law) 11/26 MSM7570-01 ¡ Semiconductor Receive Analog Interface Characteristics (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Parameter Input Resistance Output Load Resistance Output Capacitance Output Voltage Level Symbol Open Loop Gain * Min. Typ. Max. Unit 10 — — MW RLVF VFRO 20 — — kW RLAO AOUT+, AOUT–, SAO+, SAO– 1.2 — — kW CLVF VFRO — — 100 pF CLAO AOUT+, AOUT–, SAO+, SAO– VOVF VFRO, AOUT+, AOUT–, SAO+, SAO– VFRO VOAO VOFVF Offset Voltage Condition RINPW PWI VOFAO GDB — — 100 pF RL = 20 kW — — *2.226 VPP RL = 1.2 kW — — *2.226 VPP — — *2.226 VPP –100 — +100 mV –20 — +20 mV 40 — — dB ZL = 350 W + 120 nF(See Fig.1) AOUT+, AOUT– (GAIN = 0 dB, Power amp only) SAO+, SAO– Power amp (0.3 to 3.4 kHz, ZL = 350 W + 120 nF)(See Fig.1) –3.0 dBm (600 W) = 0 dBm0, + 3.14 dBm0 = 2.226 VPP (A-law) –3.0 dBm (600 W) = 0 dBm0, + 3.17 dBm0 = 2.226 VPP (m-law) 12/26 MSM7570-01 ¡ Semiconductor AC Chracteristics (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Condition Parameter Symbol LOSS T1 Freq. Level (Hz) (dBm0) Others 0 to 60 LOSS T2 300 to 3000 Transmit Frequency LOSS T3 1020 Response LOSS T4 3300 LOSS T5 3400 Receive Frequency Response to Distortion Ratio Receive Signal to Distortion Ratio Transmit Gain Tracking Receive Gain Tracking Typ. Max. Unit 25 — — dB — +0.20 dB –0.15 0 — Reference dB –0.15 — +0.80 dB 0 — 0.80 dB LOSS T6 3968.75 13 — — dB LOSS R1 0 to 3000 –0.15 — +0.20 dB LOSS R2 1020 LOSS R3 3300 — +0.80 dB Reference 0 — –0.15 dB LOSS R4 3400 0 — 0.80 dB LOSS R5 3968.75 13 — — dB 35 — — dB 35 — — dB 35 — — dB SD T1 Transmit Signal Min. 3 SD T2 SD T3 0 1020 –30 (*1) SD T4 –40 28 — — dB SD T5 –45 23 — — dB SD R1 3 35 — — dB SD R2 0 35 — — dB 35 — — dB 28 — — dB SD R3 1020 –30 (*1) SD R4 –40 SD R5 –45 23 — — dB GT T1 3 –0.2 — +0.2 dB –10 GT T2 GT T3 1020 –40 dB Reference — –0.2 — +0.2 dB –0.5 — +0.5 dB GT T4 –50 GT T5 –55 –1.2 — +1.2 dB GT R1 3 –0.2 — +0.2 dB –10 GT R2 GT R3 1020 –40 Reference — dB –0.2 — +0.2 dB GT R4 –50 –0.5 — +0.5 dB GT R5 –55 –1.2 — +1.2 dB *1 Use the P-message weighted filter 13/26 MSM7570-01 ¡ Semiconductor AC Characteristics (Continued) (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Condition Parameter Freq. Level (Hz) (dBm0) NIDLT — AIN = SG NIDLR — — Symbol Idle Channel Noise Absolute Signal Amplitude AVT Others (*1) (*1) (*2) Typ. — — — — GSX2 0.488 VFRO 0.488 0 1020 AVR Power Supply Noise PSRRT Noise Freq. Noise Level Rejection Ratio PSRRR : 0 to 50 kHz : 50 mVPP 0.548 (*3) 0.548 (*3) Max. Unit –68 (–71) dBm0p –72 (dBmp) (–75) 0.615 Vrms 0.615 Vrms 30 — — dB 30 — — dB tSDX 0 — 200 ns tSDR 0 — 200 ns 0 — 200 ns 0 — 200 ns 0 — 200 ns tM1 50 — — ns tM2 50 — — ns tM3 50 — — ns Digital Output tXD1 Delay Time tRD1 PCM and ADPCM tXD2 Interface tRD2 — — 1 LSTTL + 100 pF, See Pull-up: 500 W Fig.4 tXD3 tRD3 tM4 Serial Port Digital tM5 Input/Output Setting tM6 Time tM7 50 — — ns 100 — — ns See 50 — — ns Fig.5 CL = 100 pF — 50 — — ns tM8 0 — 50 ns tM9 50 — — ns tM10 50 — — ns 0 — 50 ns — — 10 MHz tM11 Shift Clock Frequency Min. fEXCK — — EXCK *1 Use the P-message weighted filter *2 PCMRI input code "11010101"(A-law) "11111111"(m-law) *3 0.548 Vrms = 0 dBm0 = –3.0 dBm Note: All ADPCM coder and decoder characteristics comply with ITU-T Recommendation G.726. 14/26 MSM7570-01 ¡ Semiconductor AC Characteristics (DTMF and Other Tones) (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Parameter Frequency Difference Symbol DTMF Tones DFT2 Other Tones VTL Original (reference) Tone Signal Level *4 DTMF Tones Transmit Tones DTMF (Low) DTMF (High) VTH (Gain setting 0 dB) VRL Receive Tones DTMF (Low) (Tone generator DTMF (High) gain setting –6 dB) and Other Tones VRH Relative Level of Condition DFT1 RDTMF and Other Tones VTH/VTL, VRH/VRL Min. Typ. Max. Unit –7 — +7 Hz –7 — +7 Hz –18 –16 –14 dBmO –16 –14 –12 dBmO –10 –8 –6 dBmO –8 –6 –4 dBmO 1 2 3 dBmO *4 Does not contain the setting value set for the programmable gain AC Characteristics (Programmable Gain Stages) (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Parameter Gain Accuracy Symbol Condition Min. Typ. Max. Unit DG All gain stages, to programmed value –1 0 +1 dB AC Characteristics (VOX Function) Parameter (VDD = 4.5 V to 5.5 V, Ta = –25°C to +70°C) Condition Symbol Transmit VOX Detect Time tVXON OFF Æ ON VOXO, (Voice Signal ON/OFF Detect Time) tVXOF ON Æ OFF See Fig.2 Min. — Typ. 10 *5 Max. — Unit ms 150/310 160/320 170/330 ms 0 dB Transmit VOX Detect Level Accuracy DVX To the values (CR6-B6, B5) –2.5 +2.5 (Threshold Level) *5 When single tone is input at 1000 Hz. 15/26 MSM7570-01 ¡ Semiconductor TIMING DIAGRAM Transmit Side PCM/ADPCM Data Interface BCLK 0 tXS XSYNC 2 tWS tXD1 tXD2 3 4 5 6 7 8 9 10 9 10 tXD3 LSB MSB PCMSO BCLK 1 tSX tSDX 0 tXS XSYNC 1 tSX 2 tXD1 tXD2 IS 3 4 5 7 8 tXD3 LSB MSB tSDX 6 Receive Side PCM/ADPCM Data Interface BCLK 0 tRS 1 tSR 2 RSYNC tDS IR BCLK PCMRO 4 0 5 6 7 8 9 10 5 6 7 8 9 10 tDH MSB tRS RSYNC 3 tWS LSB 1 tSR 2 tRD1 tRD2 3 4 MSB tRD3 LSB tSDR Figure 4 PCM/ADPCM Data Interface 16/26 MSM7570-01 ¡ Semiconductor Serial Port Data Transfer for MCU Interface DEN tM1 DIN tM3 2 3 4 tM6 tM4 W/R tM10 tM5 tM2 1 EXCK A2 5 6 11 12 tM9 tM7 A1 A0 B7 B1 B0 tM11 tM8 DOUT B7 B1 B0 Figure 5 MCU Interface 17/26 MSM7570-01 ¡ Semiconductor FUNCTIONAL DESCRIPTION Control Registers (1) CR0 (Basic operating mode) B7 CR0 Initial Value B6 B5 B4 B3 B2 B1 A/m SEL MCK SEL PDN ALL — — — — 0 0 0 0 0 0 0 B0 PDN SAO/AOUT 0 Note : Initial Value : Reset state by PDN/RESET B7 ...PCM Companding law select; 0/µ-law, 1/A-law B6 ...Master clock frequency select; 0/12.288 MHz, 1/19.200 MHz B5 ...Power down (entire system); 0/Power on, 1/Power down When using this data for power down control, set pin PDN/RESET at “1” level. The control registers are not reset by this signal. B2 ...Not used B1 ...Not used B0 ...Power Down for Sound output amps: (SAO+, SAO–), or Receiver output amp (AOUT+, AOUT–, VFRO ); If this data is set to digital “1”, either a pair of sound amplifiers or a pair of reciver amplifiers enters the power down state depending on the set data on CR4-B5. If this data is set to digital "0", sound amplifiers and receiver amplifiers are in the poweron state. B4, B3 ... Not used (These pins are used to test the devise. They should be set to "0" during normal operation.) 18/26 MSM7570-01 ¡ Semiconductor (2) CR1 (ADPCM block operating mode) CR1 Initial Value B7 B6 MODE1 MODE0 0 0 B5 B4 B3 B2 TX RESET RX RESET TX MUTE RX MUTE 0 0 B7, B6 ... ADPCM data compression algorithm select; (0, 0): 32 kbps (0, 1): 64 kbps (data through) (1, 0): 24 kbps (1, 1): 16 kbps B5 ... ADPCM of transmit reset (specified by G.726); B4 ... ADPCM of receive reset (specified by G.726 ); B3 ... ADPCM transmit data mute, B2 ... ADPCM receive data mute, B1 ... Not used B0 ... Receive side PAD, 0 0 B1 B0 — RX PAD 0 0 1/Reset* 1/Reset* 1/Mute 1/Mute 1/inserted,12 dB loss 0/no PAD * The reset width should be 125 ms or more. The transmitter and receiver can not be reset separately They must be reset at the same time. 19/26 MSM7570-01 ¡ Semiconductor (3) CR2 (PCM CODEC operational mode setting and transmit/receive gain adjustment) B7 CR2 B6 B5 B4 B3 B2 B1 B0 TX ON/OFF TX GAIN2 TX GAIN1 TX GAIN0 RX ON/OFF RX GAIN2 RX GAIN1 RX GAIN0 Initial Value 0 0 1 1 0 0 1 1 B7 ... PCM Coder disable; 0/Enable, 1/Disable (transmit PCM idle pattern) B6, B5, B4 ... Transmit gain adjustment, refer to Table-2. B3 ... PCM Decoder disable; 0/Enable, 1/Disable (receive PCM idle pattern) B2, B1, B0 ... Receive gain setting, refer to Table-2. Table-2 B6 B5 B4 Transmit Gain B2 B1 B0 Receive Gain 0 0 0 –6 dB 0 0 0 –6 dB 0 0 1 –4 dB 0 0 1 –4 dB 0 1 0 –2 dB 0 1 0 –2 dB 0 1 1 0 dB 0 1 1 0 dB 1 0 0 +2 dB 1 0 0 +2 dB 1 0 1 +4 dB 1 0 1 +4 dB 1 1 0 +6 dB 1 1 0 +6 dB 1 1 1 +8 dB 1 1 1 +8 dB This programmable gain table should be assigned, not only for transmit/receive voice signal and the transmitted DTMF and other tones. The transmission of these tone signals is enabled by the CR4-B6 data described later. The original (reference) signal amplitude of these tones is analogically defined as follows. DTMF low-group-tones .................................... –16 dBm0 DTMF high-group-tones and others............... –14 dBm0 For example, when selecting +8 dB (B6, B5, B4) = (1,1,1) as a transmit gain, each tone signal amplitude with an analogical expression on the pin PCMSO becomes as follows . DTMF low-group tones .................................... –8 dBm0 DTMF high-group tones and other tones ...... –6 dBm0 Gain setting for the side tone (path to receive side from transmit side) and the receive side tone is performed by register CR3. 20/26 MSM7570-01 ¡ Semiconductor (4) CR3 (Side tone and other tone generator gain setting) B7 B6 B5 Side. Tone Side. Tone Side. Tone CR3 Initial Value B4 B3 B2 B1 B0 TONE TONE TONE TONE TONE GAIN2 GAIN1 GAIN0 ON/OFF GAIN3 GAIN2 GAIN1 GAIN0 0 0 0 0 0 0 0 0 B7, B6, B5 ... Side tone path gain setting, refer to Table-3. B4 ... Tone generator enable; 0/Disable, 1/Enable B3, B2, B1, B0 ... Tone generator gain adjustment for receive side, refer to Table-4 Table-3 B7 B6 B5 Side Tone Path Gain 0 0 0 OFF 0 0 1 –21 dB 0 1 0 –19 dB 0 1 1 –17 dB 1 0 0 –15 dB 1 0 1 –13 dB 1 1 0 –11 dB 1 1 1 –9 dB Table-4 B3 B2 B1 B0 Tone Generator Gain B3 B2 B1 B0 Tone Generator Gain 0 0 0 0 –36 dB 1 0 0 0 –20 dB 0 0 0 1 –34 dB 1 0 0 1 –18 dB 0 0 1 0 –32 dB 1 0 1 0 –16 dB 0 0 1 1 –30 dB 1 0 1 1 –14 dB 0 1 0 0 –28 dB 1 1 0 0 –12 dB 0 1 0 1 –26 dB 1 1 0 1 –10 dB 0 1 1 0 –24 dB 1 1 1 0 –8 dB 0 1 1 1 –22 dB 1 1 1 1 –6 dB The tone generator gain setting table for the receive side, as shown in Table-4, depends upon the following reference level. DTMF low-group tones ................................ –2 dBm0 DTMF high-group tones and others ............ 0 dBm0 For example, when selecting –6 dB (B3, B2, B1, B0) = (1, 1, 1, 1) as a tone generator gain, each DTMF tone signal amplitude on SAO+/SAO– or VFRO is as follows. DTMF low-group tone .................................. –8 dBm0 DTMF high-group tone or other tones ....... –6 dBm0 21/26 MSM7570-01 ¡ Semiconductor (5) CR4 (Tone genereator operating mode and frequency select) B7 CR4 B6 B5 DTMF/OTHERS TONE SAO/ SEL SEND VFRO 0 0 0 Initial Value B4 B3 B2 B1 B0 TONE4 TONE3 TONE2 TONE1 TONE0 0 0 0 0 0 B7 ... DTMF or other tones select; 0/Others, 1/DTMF B6 ... Tone transmit enable (Transmit side); 0/Voice signal (transmit), 1/Tone transmit B5 ... Tone output pin select (Receive side); 0/VFRO, 1/SAO+ and SAO– B4, B3, B2, B1, B0 ... Tone frequency setting, referred to Table-5-1 and 5-2. (a) B7 = 1 (DTMF tone) Table-5-1 B4 B3 B2 B1 B0 Frequency B4 B3 B2 B1 B0 Frequency * 0 0 0 0 697 Hz + 1209 Hz * 1 0 0 0 852 Hz + 1209 Hz * 0 0 0 1 697 Hz + 1336 Hz * 1 0 0 1 852 Hz + 1336 Hz * 0 0 1 0 697 Hz + 1477 Hz * 1 0 1 0 852 Hz + 1477 Hz * 0 0 1 1 697 Hz + 1633 Hz * 1 0 1 1 852 Hz + 1633 Hz * 0 1 0 0 770 Hz + 1209 Hz * 1 1 0 0 941 Hz + 1209 Hz * 0 1 0 1 770 Hz + 1336 Hz * 1 1 0 1 941 Hz + 1336 Hz * 0 1 1 0 770 Hz + 1477 Hz * 1 1 1 0 941 Hz + 1477 Hz * 0 1 1 1 770 Hz + 1633 Hz * 1 1 1 1 941 Hz + 1633 Hz *Unrelated (b) B7 = 0 (Other tones) Table-5-2 B4 B3 B2 B1 B0 Frequency B4 B3 B2 B1 B0 Frequency 0 0 0 0 0 0 0 0 0 1k/1333 Hz, 16 Hz wamb. 1 0 0 0 0 2000 Hz Single tone 1 800/667 Hz, 16 Hz wamb. 1 0 0 0 1 2042 Hz Single tone 0 0 0 1 0 0 0 1 0 800/1k Hz,16 Hz wamb. 1 0 0 1 0 2514 Hz Single tone 1 500/667 Hz,16 Hz wamb. 1 0 0 1 1 500 Hz Single tone 0 0 1 0 0 500/400 Hz,16 Hz wamb. 1 0 1 0 0 667 Hz Single tone 0 0 0 0 1 0 1 800/1k Hz, 8 Hz wamb. 1 0 1 0 1 1333 Hz Single tone 1 1 0 500/400 Hz, 8 Hz wamb. 1 0 1 1 0 2100 Hz Single tone 0 0 0 1 1 1 400 Hz,16 Hz wamb. 1 0 1 1 1 — 1 0 0 0 400 Hz,20 Hz wamb. 1 1 0 0 0 — 0 1 0 0 1 400 Hz Single tone 1 1 0 0 1 — 0 1 0 1 0 425 Hz Single tone 1 1 0 1 0 — 0 1 0 1 1 440 Hz Single tone 1 1 0 1 1 — 0 1 1 0 0 450 Hz Single tone 1 1 1 0 0 — 0 1 1 0 1 800 Hz Single tone 1 1 1 0 1 — 0 1 1 1 0 1000 Hz Single tone 1 1 1 1 0 — 0 1 1 1 1 1300 Hz Single tone 1 1 1 1 1 — 22/26 MSM7570-01 ¡ Semiconductor (6) CR5 (Not used) B7 B6 B5 B4 B3 B2 B1 B0 CR5 — — — — — — — — Initial Value 0 0 0 0 0 0 0 0 B7 – B0..... Not used 23/26 MSM7570-01 ¡ Semiconductor (7) CR6 (VOX function control) B7 CR6 Initial Value B6 B5 B4 VOX ON ON OFF ON/OFF LVL1 LVL0 TIME 0 0 0 0 B3 VOX IN 0 B2 B0 B1 RX NOISE RX NOISE RX NOISE LEVEL SEL LVL1 LVL0 0 0 0 B7 ... VOX function enable; 0/Disable, 1/Enable B6, B5 ... Transmit signal energy detect (Transmit VOX) threshold (at 1000 Hz) (0, 0): –30 dBm0 (0, 1): –35 dBm0 (1, 0): –40 dBm0 (1, 1): –45 dBm0 B4 ... Hang-over time (Fig.2, TVXOFF); 0/160 ms, 1/320 ms B3 ... Receive VOX function setting; 0/Background noise transmit, 1/Voice signal detect When using this data for control, set pin VOXI at “0” level. B2 ... Background noise amplitude setting; 0/Automatic, 1/Programmable by B1 and B0 Automatic : Set the noise at the voice signal amplitude when B3 (or VOXI) changes from “1” to digital “0”. B1, B0 ... (0, 0): No noise (0, 1): –55 dBm0 (1, 0): –45 dBm0 (1, 1): –35 dBm0 (8) CR7 (Detect register, read only) B7 CR7 Initial Value VOX B6 B5 TX NOISE TX NOISE OUT LVL1 LVL0 0 0 0 B4 B3 B2 B1 B0 — — — — — * * * * * * For IC test B7 ... Transmit VOX function result; 0/Silence, 1/Voice B6, B5 ... Transmit silence level (indicator); (0, 0) : Below –60 dBm0 Note: These outputs are valid only when the VOX (0, 1) : –50 to –60 dBm0 function is enabled by CR6-B7. (1, 0) : –40 to –50 dBm0 (1, 1) : Above –40 dBm0 B4 ... Not used B3 ... Not used B2 ... Not used B1 ... Not used B0 ... Not used 24/26 MSM7570-01 ¡ Semiconductor APPLICATION CIRCUIT MSM7570-01 TS VDD – + – + 1 2 3 4 5 6 7 Transmit Voice Analog Input 8 9 10 Receive Voice Analog Output 11 12 Sound 13 Power-Down/Reset Input 14 VOX IN 15 16 AG DG BCLK SG AIN1+ XSYNC AIN1– RSYNC GSX1 AIN2 GSX2 PCMSO PCMSI IS VFRO PWI AOUT– AOUT+ SAO+ SAO– PDN/RESET VOXI VDD Bit Clock (64 kHz to 2048 kHz) 32 31 30 29 28 27 26 25 IR PCMRO 24 23 PCMRI 22 MCK 21 DEN 20 EXCK 19 DIN 18 DOUT 17 VOXO 8 kHz Sync. Signal Input VDD ADPCM Output ADPCM Input Master Clock Serial MCU Interface VOX OUT * Single-ended Analog Input Stage Type 25/26 MSM7570-01 ¡ Semiconductor PACKAGE DIMENSIONS (Unit : mm) TSOPI32-P-814-0.50-1K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.27 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 26/26