MICROCHIP 24LC09_04

Obsolete Device
24LC09
8K 2.5V ACR Serial EEPROM
Features
PDIP/SOIC
A0
1
8
VCC
A1
2
7
WP
A2
3
6
SCL
VSS
4
5
SDA
24LC09
• Supports ACR riser card specification
- 2-wire ACR serial bus interface
- Address: 1011
• Single supply with operation down to 2.5V
• Low power CMOS technology
- 1 mA active current typical
- 500 nA standby current typical at 5V
• Organized as four blocks of 256 bytes
(4 x 256 x 8)
• Schmitt trigger, filtered inputs for noise
suppression
• Output slope control to eliminate ground bounce
• 400 kHz Capability (2.5 to 5.5 Volts)
• Self-timed write cycle (including auto-erase)
• Page-write buffer for up to 16 bytes
• 2 ms typical write cycle time for page-write
• Hardware write protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
• 1,000,000 erase/write cycles guaranteed
• Data retention > 200 years
• 8-pin PDIP, 8-lead SOIC packages
• Available temperature ranges:
- Industrial (I):
-40°C to
+85°C
Package Types
Block Diagram
WP
HV GENERATOR
I/O
CONTROL
LOGIC
MEMORY
CONTROL
LOGIC
XDEC
EEPROM ARRAY
(2 x 256 x 8) or
(4 x 256 x 8)
PAGE LATCHES
SDA
SCL
YDEC
VCC
VSS
SENSE AMP
R/W CONTROL
Description
The Microchip Technology Inc. 24LC09 is an 8 Kbit
Electrically Erasable PROM (EEPROM) designed to
meet the Advanced Communication Riser Special
Interest Group (ACR-SIG). The device is organized as
four blocks of 256 x 8-bit memory that supports the 2wire serial interface with a special address: 1011. Low
voltage design permits operation down to 2.5 volts with
typical standby and active currents of only 5 µA and
1 mA, respectively. The 24LC09 also has a page-write
capability for up to 16 bytes of data. The 24LC09 is
available in the standard 8-pin DIP, 8-lead surface
mount SOIC packages.
I2C is a registered trademark of Philips Corporation.
 2004 Microchip Technology Inc.
DS21675B-page 1
24LC09
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
VCC .............................................................................................................................................................................7.0V
All inputs and outputs, w.r.t. VSS ....................................................................................................... -0.3V to VCC + 1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-65°C to +125°C
Soldering temperature of leads (10 seconds) .......................................................................................................+300°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
†Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
1.1
DC Characteristics
Industrial (I):
DS Characteristics
TAMB = -40°C to +85°C
Param.
No.
Sym
D1
VIH
High level input voltage
.7 VCC
—
V
Low level input voltage
—
.3 VCC
V
.05 VCC
—
V
(Note)
Low level output voltage
—
.40
V
IOL = 3.0 mA, VCC = 2.5V
D2
VIL
D3
VHYS
D4
VOL
Characteristic
Hysteresis of Schmitt trigger
Inputs
Min.
Max.
Units
Test Conditions
D5
ILI
Input leakage current
-10
10
µA
VIN = 0.1V to VCC
D6
ILO
Output leakage current
-10
10
µA
VOUT = 0.1V to VCC
—
10
pF
VCC = 5.0V, TAMB = 25°C,
FCLK = 1 MHz (Note)
D7
CIN, COUT Pin capacitance
(all inputs/outputs)
D8
ICC WRITE Operating current
D9
ICC
D10
Note:
READ
ICCS
Standby current
—
3
mA
VCC = 5.5V,
—
1
mA
SCL = 400 kHz
—
—
1
1
µA
µA
VCC = 3.0V, SDA = SCL = VCC
VCC = 5.5V, SDA = SCL = VCC
WP = VSS
This parameter is periodically sampled and not 100% tested.
DS21675B-page 2
 2004 Microchip Technology Inc.
24LC09
1.2
AC Characteristics
Param.
No.
Sym
1
FCLK
2
TAMB = -40°C to +85°C
Industrial (I):
AC Characteristics
Min
Max
Units
Clock frequency
—
—
400
100
kHz
4.5V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
THIGH
Clock high time
600
—
ns
2.5V ≤ VCC ≤ 5.5V
3
TLOW
Clock low time
1300
—
ns
2.5V ≤ VCC ≤ 5.5V
4
TR
SDA and SCL rise time
—
300
ns
2.5V ≤ VCC ≤ 5.5V (Note 1)
5
TF
SDA and SCL fall time
—
300
ns
(Note 1)
THD:STA START condition hold time
600
—
ns
2.5V ≤ VCC ≤ 5.5V
7
TSU:STA START condition setup time
600
—
ns
2.5V ≤ VCC ≤ 5.5V
8
THD:DAT Data input hold time
0
—
ns
(Note 2)
6
Parameter
Conditions
9
TSU:DAT Data input setup time
100
—
ns
2.5V ≤ VCC ≤ 5.5V
10
TSU:STO STOP condition setup time
600
—
ns
2.5V ≤ VCC ≤ 5.5V
—
900
ns
2.5V ≤ VCC ≤ 5.5V
1300
—
ns
2.5V ≤ VCC ≤ 5.5V
20+0.1CB
250
ns
2.5V ≤ VCC ≤ 5.5V (Note 1)
(Notes 1 and 3)
Output valid from clock
(Note 2)
11
TAA
12
TBUF
Bus free time: Time the bus
must be free before a new
transmission can start
13
TOF
Output fall time from VIH
minimum to VIL maximum
14
TSP
Input filter spike suppression
(SDA and SCL pins)
—
50
ns
15
TWC
Write cycle time (byte or page)
—
5
ms
Endurance
1M
—
cycles
16
25°C, VCC = 5.0V, Block Mode
(Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but established by characterization. For endurance estimates in a specific
application, please consult the Total Endurance Model which can be obtained on Microchip’s website.
 2004 Microchip Technology Inc.
DS21675B-page 3
24LC09
FIGURE 1-1:
BUS TIMING START/STOP
D3
SCL
6
7
10
SDA
START
FIGURE 1-2:
STOP
BUS TIMING DATA
5
4
2
3
SCL
7
9
8
10
6
SDA
IN
14
11
6
11
12
SDA
OUT
DS21675B-page 4
 2004 Microchip Technology Inc.
24LC09
2.0
PIN DESCRIPTIONS
This feature allows the user to use the 24LC09 as a
serial ROM when WP is enabled (tied to VCC).
The descriptions of the pins are listed in Table 2-1.
2.4
TABLE 2-1:
PIN FUNCTION TABLE
Name
2.1
These pins are not used by the 24LC09. They may be
left floating or tied to either VSS or VCC.
Function
VSS
Ground
SDA
Serial Address/Data I/O
SCL
Serial Clock
WP
Write Protect Input
VCC
+2.5V to 5.5V Power Supply
A0, A1, A2
3.0
No Internal Connection
Serial Address/Data Input/Output
(SDA)
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for
400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the START and STOP conditions.
2.2
A0, A1, A2
Serial Clock (SCL)
FUNCTIONAL DESCRIPTION
The 24LC09 supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus has to be controlled by a master device which generates the serial
clock (SCL), controls the bus access, and generates
the Start and Stop conditions, while the 24LC09 works
as slave. Both, master and slave can operate as transmitter or receiver but the master device determines
which mode is activated.
4.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a start or stop condition.
This input is used to synchronize the data transfer from
and to the device.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
2.3
4.1
Write Protect (WP)
Bus not Busy (A)
This pin must be connected to either VSS or VCC.
Both data and clock lines remain High.
If tied to VSS, normal memory operation is enabled
(read/write the entire memory).
4.2
If tied to VCC, WRITE operations are inhibited. The
entire memory will be write-protected. Read operations
are not affected.
A High to Low transition of the SDA line while the clock
(SCL) is high determines a start condition. All commands must be preceded by a start condition.
FIGURE 4-1:
SCL
(A)
Start Data Transfer (B)
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(B)
(D)
(D)
(C)
(A)
SDA
START
CONDITION
 2004 Microchip Technology Inc.
ADDRESS OR
DATA
ACKNOWLEDGE ALLOWED
VALID
TO CHANGE
STOP
CONDITION
DS21675B-page 5
24LC09
4.3
Stop Data Transfer (C)
A low to high transition of the SDA line while the clock
(SCL) is high determines a stop condition. All operations must be ended with a stop condition.
4.4
Data Valid (D)
The state of the data line represents valid data when,
after a start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a start condition and
terminated with a stop condition. The number of the
data bytes transferred between the start and stop conditions is determined by the master device and is theoretically unlimited, although only the last 16 will be
stored when doing a write operation. When an overwrite does occur, it will replace data in a first in first out
fashion.
4.5
Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
Note:
The 24LC09 does not generate any
acknowledge bits if an internal programming cycle is in progress.
The device that acknowledges, has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an acknowledge bit on the last
byte that has been clocked out of the slave. In this
case, the slave must leave the data line HIGH to enable
the master to generate the stop condition.
DS21675B-page 6
4.6
Device Addressing
A control byte is the first byte received following the
start condition from the master device. The control byte
consists of a 4-bit control code, for the 24LC09 this is
set as 1011 binary for read and write operations. The
next three bits of the control byte are the block select
bits (B2, B1, B0). B2 is a don't care for the 24LC09.
They are used by the master device to select which of
the four 256 word blocks of memory are to be
accessed. These bits are in effect the most significant
bits of the word address.
The last bit of the control byte defines the operation to
be performed. When set to one a read operation is
selected, when set to zero a write operation is selected.
Following the start condition, the 24LC09 monitors the
SDA bus checking the device type identifier being
transmitted, upon a 1011 code the slave device outputs an acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24LC09 will select a
read or write operation.
Operation
Control
Code
Block Select
R/W
Read
1011
Block Address
1
Write
1011
Block Address
0
FIGURE 4-2:
CONTROL BYTE
ALLOCATION
START
READ/WRITE
SLAVE ADDRESS
1
0
1
1
X
R/W A
B1
B0
X = Don’t care.
 2004 Microchip Technology Inc.
24LC09
5.0
WRITE OPERATION
5.1
Byte Write
master has transmitted a stop condition. After the
receipt of each word, the four lower order address
pointer bits are internally incremented by one. The
higher order seven bits of the word address remains
constant. If the master should transmit more than 16
words prior to generating the stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the stop condition is received an internal write cycle will begin (Figure 5-2).
Following the start condition from the master, the
device code (4 bits), the block address (3 bits), and the
R/W bit which is a logic low is placed onto the bus by
the master transmitter. This indicates to the addressed
slave receiver that a byte with a word address will follow after it has generated an acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmitted by the master is the word address and will be written into the address pointer of the 24LC09. After
receiving another acknowledge signal from the 24LC09
the master device will transmit the data word to be written into the addressed memory location. The 24LC09
acknowledges again and the master generates a stop
condition. This initiates the internal write cycle, and during this time the 24LC09 will not generate acknowledge
signals (Figure 5-1).
5.2
Note:
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24LC09 in the same way as
in a byte write. But instead of generating a stop condition the master transmits up to 16 data bytes to the
24LC09 which are temporarily stored in the on-chip
page buffer and will be written into the memory after the
FIGURE 5-1:
BYTE WRITE
BUS ACTIVITY
MASTER
S
T
A
R
T
SDA LINE
S
CONTROL
BYTE
WORD
ADDRESS
S
T
O
P
DATA
P
A
C
K
BUS ACTIVITY
FIGURE 5-2:
Page write operations are limited to writing
bytes within a single physical page, regardless of the number of bytes actually being
written. Physical page boundaries start at
addresses that are integer multiples of the
page buffer size (or ‘page size’) and end at
addresses that are integer multiples of
[page size - 1]. If a page write command
attempts to write across a physical page
boundary, the result is that the data wraps
around to the beginning of the current page
(overwriting data previously stored there),
instead of being written to the next page as
might be expected. It is therefore necessary for the application software to prevent
page write operations that would attempt to
cross a page boundary.
A
C
K
A
C
K
PAGE WRITE
BUS ACTIVITY
MASTER
S
T
A
R
T
SDA LINE
S
WORD
ADDRESS (n)
CONTROL
BYTE
BUS ACTIVITY
 2004 Microchip Technology Inc.
DATA n + 1
DATA n
S
T
O
P
DATA n + 15
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
DS21675B-page 7
24LC09
6.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master sending a start condition followed by the control byte for a
write command (R/W = 0). If the device is still busy with
the write cycle, then no ACK will be returned. If the
cycle is complete, then the device will return the ACK
and the master can then proceed with the next read or
write command. See Figure 6-1 for flow diagram.
FIGURE 6-1:
ACKNOWLEDGE
POLLING FLOW
Send
Write Command
8.1
Current Address Read
The 24LC09 contains an address counter that maintains the address of the last word accessed, internally
incremented by one. Therefore, if the previous access
(either a read or write operation) was to address n, the
next current address read operation would access data
from address n + 1. Upon receipt of the slave address
with R/W bit set to one, the 24LC09 issues an acknowledge and transmits the 8-bit data word. The master will
not acknowledge the transfer but does generate a stop
condition and the 24LC09 discontinues transmission
(Figure 8-1).
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24LC09 as part of a write operation. After the word
address is sent, the master generates a start condition
following the acknowledge. This terminates the write
operation, but not before the internal address pointer is
set. Then the master issues the control byte again but
with the R/W bit set to a one. The 24LC09 will then
issue an acknowledge and transmits the 8-bit data
word. The master will not acknowledge the transfer but
does generate a stop condition and the 24LC09 discontinues transmission (Figure 8-2).
Send Start
Send Control Byte
with R/W = 0
8.3
No
Yes
Next
Operation
7.0
READ OPERATION
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.
8.2
Send Stop
Condition to
Initiate Write Cycle
Did Device
Acknowledge
(ACK = 0)?
8.0
WRITE PROTECTION
The 24LC09 can be used as a serial ROM when the
WP pin is connected to VCC. Programming will be
inhibited and the entire memory will be write-protected.
Sequential Read
Sequential reads are initiated in the same way as a random read except that after the 24LC09 transmits the
first data byte, the master issues an acknowledge as
opposed to a stop condition in a random read. This
directs the 24LC09 to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
To provide sequential reads the 24LC09 contains an
internal address pointer which is incremented by one at
the completion of each operation. This address pointer
allows the entire memory contents to be serially read
during one operation.
8.4
Noise Protection
The 24LC09 employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
DS21675B-page 8
 2004 Microchip Technology Inc.
24LC09
FIGURE 8-1:
CURRENT ADDRESS READ
S
T
A
R
T
BUS ACTIVITY
MASTER
SDA LINE
CONTROL
BYTE
S
T
O
P
DATA n
S
P
N
O
A
C
K
BUS ACTIVITY
A
C
K
FIGURE 8-2:
RANDOM READ
S
BUS ACTIVITY T
A
MASTER
R
T
CONTROL
BYTE
S
T
A
R
T
WORD
ADDRESS (n)
S
DATA (n)
P
A
C
K
A
C
K
BUS ACTIVITY
BUS ACTIVITY
MASTER
S
T
O
P
S
SDA LINE
FIGURE 8-3:
CONTROL
BYTE
A
C
K
N
O
A
C
K
SEQUENTIAL READ
CONTROL
BYTE
DATA n
DATA n + 1
DATA n + 2
S
T
O
P
DATA n + X
SDA LINE
BUS ACTIVITY
P
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
 2004 Microchip Technology Inc.
DS21675B-page 9
24LC09
9.0
PACKAGING INFORMATION
9.1
Package Marking Information
8-Lead PDIP (300 mil)
Example
XXXXXXXX
XXXXXNNN
YYWW
24LC09
I/PNNN
0120
8-Lead SOIC (150 mil)
Example
XXXXXXXX
XXXXYYWW
NNN
Legend: XX...X
YY
WW
NNN
Note:
*
24LC09
I/SN0120
NNN
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code).
DS21675B-page 10
 2004 Microchip Technology Inc.
24LC09
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
 2004 Microchip Technology Inc.
DS21675B-page 11
24LC09
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45×
c
A2
A
f
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
f
c
B
α
β
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21675B-page 12
 2004 Microchip Technology Inc.
24LC09
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Explorer. Files are also available for FTP download
from our FTP site.
Connecting to the Microchip Internet Web Site
Systems Information and Upgrade Hot Line
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits.The
Hot Line Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
013001
The Microchip web site is available by using your
favorite Internet browser to attach to:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
 2004 Microchip Technology Inc.
DS21675B-page 13
24LC09
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this Data Sheet.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: 24LC09
Y
N
Literature Number: DS21675B
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
DS21675B-page 14
 2004 Microchip Technology Inc.
24LC09
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Package
Examples:
a)
b)
Device:
24LC09: 8K I2C Serial EEPROM
24LC09T: 8K I2C Serial EEPROM (Tape and Reel)
Temperature Range:
I
Package:
P
=
SN =
=
24LC09-I/P: Industrial Temperature,
PDIP package, normal VDD limits
24LC09-I/SN: Indistrial Temperature,
SOIC package, normal VDD limits.
-40°C to +85°C
Plastic DIP (300 mil Body), 8-lead
Plastic SOIC (150 mil Body), 8-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2004 Microchip Technology Inc.
DS21675B-page15
24LC09
NOTES:
DS21675B-page 16
 2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
 2004 Microchip Technology Inc.
DS21675B-page 17
WORLDWIDE SALES AND SERVICE
AMERICAS
China - Beijing
Singapore
Corporate Office
Unit 706B
Wan Tai Bei Hai Bldg.
No. 6 Chaoyangmen Bei Str.
Beijing, 100027, China
Tel: 86-10-85282100
Fax: 86-10-85282104
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: www.microchip.com
China - Chengdu
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Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200
Fax: 86-28-86766599
Boston
China - Fuzhou
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Unit 28F, World Trade Plaza
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Tel: 86-591-7503506
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Atlanta
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Dallas
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Toronto
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China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
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Tel: 852-2401-1200
Fax: 852-2401-3431
Taiwan
Kaohsiung Branch
30F - 1 No. 8
Min Chuan 2nd Road
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Tel: 886-7-536-4816
Fax: 886-7-536-4817
Taiwan
Taiwan Branch
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Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Taiwan
Taiwan Branch
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Hsinchu City 300, Taiwan
Tel: 886-3-572-9526
Fax: 886-3-572-6459
EUROPE
China - Shanghai
Austria
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700
Fax: 86-21-6275-5060
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
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China - Shenzhen
Regus Business Centre
Lautrup hoj 1-3
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Rm. 1812, 18/F, Building A, United Plaza
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Fax: 86-755-8295-1393
China - Shunde
Room 401, Hongjian Building, No. 2
Fengxiangnan Road, Ronggui Town, Shunde
District, Foshan City, Guangdong 528303, China
Tel: 86-757-28395507 Fax: 86-757-28395571
China - Qingdao
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205
India
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-22290061 Fax: 91-80-22290062
Japan
ASIA/PACIFIC
Yusen Shin Yokohama Building 10F
3-17-2, Shin Yokohama, Kohoku-ku,
Yokohama, Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Australia
Korea
Microchip Technology Australia Pty Ltd
Unit 32 41 Rawson Street
Epping 2121, NSW
Sydney, Australia
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
Denmark
France
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany
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D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy
Via Salvatore Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands
Waegenburghtplein 4
NL-5152 JR, Drunen, Netherlands
Tel: 31-416-690399
Fax: 31-416-690340
United Kingdom
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44-118-921-5869
Fax: 44-118-921-5820
07/12/04
DS21675B-page 18
 2004 Microchip Technology Inc.