PI3L100 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 3.3V, Wide Bandwidth Quad 2:1 Mux/Demux LanSwitch Features Description • Replaces mechanical relays • High-performance, low-cost solution for switching between different LAN signals • Ultra-low quiescent power (0.1µA typical) • Low crosstalk: –90dB @ 30 MHz • Low insertion loss or on-resistance: 3Ω typical • Single supply operation: 3.3V • Off isolation: –45dB @ 30 MHz • Wide bandwidth data rates > 200 MHz • Packages available: – 16-pin 150 mil wide plastic QSOP (Q) – 16-pin 173 mil wide plastic TSSOP (L) Pericom Semiconductor’s PI3L series of logic circuits are produced using the Company’s advanced submicron CMOS technology. The PI3L100 is a Quad 2:1 multiplexer/demultiplexer LanSwitch with three-state outputs. This device can be used for switching between various standards, such as 10 Base-T and 100 Base-T. Generally, this part can be used to replace mechanical relays in low voltage LAN applications that have physical layer, unshielded twisted pair media (UTP) with either CAT 3 or CAT 5 grade cable. Logic Block Diagram 16-Pin Product Configuration IA1 IA0 IB0 IB1 IC0 IC1 ID0 ID1 S IA0 IA1 YA IB0 IB1 YB GND 1 16 2 15 3 4 5 14 16-Pin W,L 13 12 6 11 7 10 8 9 VCC E ID0 ID1 YD IC0 IC1 YC E Product Pin Description S YA YB YC YD Pin Name IAn-IDn S E YA-YD GND VCC Description Data Inputs Select Inputs Enable Data Outputs Ground Power Truth Table(1) E H L L S X L H YA Hi-Z IA0 IA1 YB Hi-Z IB0 IB1 YC Hi-Z IC0 IC1 YD Hi-Z ID0 ID1 Function Disable S=0 S=1 Note: 1. H = High Voltage Level L = Low Voltage Level 1 PS8504 11/13/00 PI3L100 3.3V, Wide Bandwidth Quad 2:1, Mux/Demux LanSwitch 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................. –65°C to +150°C Ambient Temperature with Power Applied ................................. 0°C to +70°C Supply Voltage to Ground Potential (Inputs & Vcc Only) ...... –0.5V to +4.6V Supply Voltage to Ground Potential (Outputs & D/O Only) ... –0.5V to +4.6V DC Input Voltage ..................................................................... –0.5V to +4.6V DC Output Current ............................................................................... 120 mA Power Dissipation ......................................................................................0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = 0°C to +70°C, VCC = 3.3V ±5%) Parame te rs De s cription Te s t Conditions (1) M in. Typ(2) M ax. Units VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 — — VIL Input LOW Voltage Guaranteed Logic LOW Level –0 . 5 — 0.8 IIH Input HIGH Current VCC = Max., VIN = VCC — — ±1 IIL Input LOW Current VCC = Max., VIN = GND — — ±1 — — ±1 — –1.2 V 10 0 — — mA — 15 0 — mV VCC = Min., VIN = 0V, ION = 48mA — 5 7 VCC = Min., VIN = 2.4V, ION = 15mA — 10 15 VIN = 3.0V, E = LOW — — — IOZH High Impedance Output Current 0 ≤ A, B ≤ VCC VIK Clamp Diode Voltage VCC = Min., IIN = –18mA IOS Short Circuit Current(3) A (B) = 0V, B (A) = VCC VH Input Hysteresis at Control Pins RON(6) Switch On Resistance ∆RON On Resistance Match V µA Ω Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for applicable device type. 2. Typical values are at VCC = 3.3V, TA = 25°C ambient temperature. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. VON (min) value is at VCC = 3.3V, TA = 70°C. Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) Description Test Conditions CIN COFF Input Capacitance Capacitance, Switch Off (Y) CON COFF Typ Max. Units VIN = 0V VIN = 0V 3 17 pF pF Capacitance, Switch On VIN = 0V 25 pF Capacitance, Switch Off (A/B) VIN = 0V 8 pF Note: 1. This parameter is determined by device characterization but is not production tested. 2 PS8504 11/13/00 PI3L100 3.3V, Wide Bandwidth Quad 2:1, Mux/Demux LanSwitch 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Test Conditions(1) Parameters Description Min. Typ(2) Max. Units ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC — 0.1 3.0 µA ∆ICC Supply Current per Input @ TTL HIGH VCC = Max. VIN = 3.4V(3) — — 750 µA ICCD Supply Current per Input per MHz(4) VCC = Max., Input Pins Open E = GND Control Input Toggling 50% Duty Cycle — — 0.25 mA/ MHz Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input (VIN = 3.0V, control inputs only); A and B pins do not contribute to ICC. 4. This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified frequency. The A and B inputs generate no significant AC or DC currents as they transition. This parameter is not tested, but is guaranteed by design. Switching Characteristics over Operating Range Parameters tPLH tSY tPHZ tPLZ XTALK Description Propagation Delay(2,3) In to Y Bus Enable Time S to Y Bus Disable Time E to Y Crosstalk Conditions(1) PI3L100 Com. Min Typ Max Unit — — 0.25 ns 1 — 4.5 ns 1 — 4.5 ns RL = 100Ω f = 30 MHz See Figure 2 — –90 — dB CL = 50pF RL = 500Ω OIRR Off Isolation RL = 100Ω f = 30 MHz — –45 — dB BW –3dB Bandwidth RL = 100Ω See Figure 2 — 213 — MHz tON Turn On Time RL = 100Ω — — — ns tOFF Turn Off Time CL = 35pF See Figure 1 — — — ns Notes: 1. See test circuit and waveforms. 2. This parameter is guaranteed but not tested. 3. The bus switch contributes no propagational delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 50pF load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side. 3 PS8504 11/13/00 PI3L100 3.3V, Wide Bandwidth Quad 2:1, Mux/Demux LanSwitch 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Applications LAN Switch VCC Bias Voltage vs. RON To keep RON to a minimum, it is recommended that the VCC voltage be increased to a voltage between 3.3V and 3.6V. Ideally an input voltage between 0.2V and 3.6V will keep RON flat. Signal Distortion Distortion of the input signal is equated to 20LOG ∆RON/RL. So keeping RON flat as the data signal level varies is critical to low distortion. It should also be noted that increasing the data rate increases harmonic distortion which also effects the signal amplitude. The PI3L100 was designed to switch between various standards such as 10Base-T, 100Base-T, 100VGAnyLAN, and Token Ring. Also general purpose applications such as loopback, line termination, and line clamps that might normally use mechanical relays are also ideal uses for this LAN Switch (see Figure 1). Generally speaking, this LAN Switch can be used for data rates to 200 Mbps and data signal levels from 0V to 3.6V. LAN Standards Data Rate per twisted pair (UTP) 10Base-T 10 Mbps 100Base-T 100 Mbps 100VG-AnyLAN 25 Mbps Test Circuits 3.3V DIGITAL INPUT Vcc S 3V D 50% VOUT 75Ω IN 50% ANALOG OUTPUT 35 pF PI3L100 GND EN 90% t ON 90% t OFF Figure 1. Switching Time Ordering Information Part Pin Package Te mpe rature PI3L100Q 16 QSOP (Q) –40°C to +85°C PI3L100L 16 TSSOP (L) –40°C to +85°C 4 PS8504 11/13/00 PI3L100 3.3V, Wide Bandwidth Quad 2:1, Mux/Demux LanSwitch 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 HP4195A S1 R1 T1 HP11667A PI3L100 100Ω Figure 2. Gain/Phase Crosstalk, Off Isolation VCC = 3.3V 0.1µF S 1 16 VCC IA0 2 15 Z IA1 3 14 ID0 YA 4 IB0 5 12 YD IB1 6 11 IC0 YB 7 10 IC1 GND 8 9 DSO Vo 100Ω 100Ω PI3L100 13 ID1 100Ω 100Ω PULSE GENERATOR YC Figure 3. Differential Crosstalk Measurement TRANSMIT 2 TX1 PI3L100 RX1 RECEIVE 2 OFFSET ADJUST Figure 4a. Full Duplex Transceiver 5 PS8504 11/13/00 PI3L100 3.3V, Wide Bandwidth Quad 2:1, Mux/Demux LanSwitch 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 120Ω 100Ω TX1 Figure 4c. Line Termination RX1 Figure 4b. Loop Back Figure 4d. Line Clamp LIFE SUPPORT POLICY Pericom Semiconductor Corporation’s products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the manufacturer and an officer of PSC. 1. Life support devices or systems are devices or systems which: (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Pericom Semiconductor Corporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Pericom Semiconductor does not assume any responsibility for use of any circuitry described other than the circuitry embodied in a Pericom Semiconductor product. The Company makes no representations that circuitry described herein is free from patent infringement or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent, patent rights, or other rights, of Pericom Semiconductor Corporation. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 6 PS8504 11/13/00