PI74FCT16543T PI74FCT162543T PI74FCT162H543T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS 16-Bit Latched Transceivers Product Features: Product Description: Common Features: • PI74FCT16543T, PI74FCT162543T and PI74FCT162H543T are high-speed, low power devices with high current drive. • VCC = 5V ±10% • Hysteresis on all inputs • Packages available: – 56-pin 240 mil wide plastic TSSOP (A) – 56-pin 300 mil wide plastic SSOP (V) PI74FCT16543T Features: • High output drive: IOH = –32 mA; IOL = 64 mA • Power off disable outputs permit “live insertion” • Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C PI74FCT162543T Features: • Balanced output drivers: ±24 mA • Reduced system switching noise • Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C PI74FCT162H543T Features: • Bus Hold retains last active state during 3-state • Eliminates the need for external pull-up resistors Pericom Semiconductor’s PI74FCT series of logic circuits are produced in the Company’s advanced 0.6 micron CMOS technology, achieving industry leading speed grades. ThePI74FCT16543T,PI74FCT162543TandPI74FCT162H543T are 16bit latched transceivers organized with two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (xCEAB) input must be LOW in order to enter data from xAx or to take data from xBx, as indicated in the Truth Table. With xCEAB LOW, a LOW signal makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the xLEAB signal puts the A latches in the storage mode and their outputs no longer change the A inputs. With xCEAB and xOEAB both LOW, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the xCEBA, xLEBA, and xOEBA inputs. The PI74FCT16543T output buffers are designed with a Power-Off disable allowing “live insertion”of boards when used as backplane drivers. The PI74FCT162543T has ±24 mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications. The PI74FCT162H543T has “Bus Hold” which retains the input’s last state whenever the input goes to high-impedance preventing “floating” inputs and eliminating the need for pull-up/down resistors. Logic Block Diagram 1OEBA 2OEBA 1CEBA 2CEBA 1LEBA 2LEBA 1OEAB 2OEAB 1CEAB 2CEAB 1LEAB 2LEAB C 1B0 1A0 C 2B0 2A0 D D C C D D TO 7 OTHER CHANNELS TO 7 OTHER CHANNELS 1 PS2038B 01/10/01 PI74FCT16543/162543/162H543T 16-BIT LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Description Pin Name xOEAB xOEBA xCEAB xCEBA xLEAB xLEBA xAx xBx GND VCC Truth Table(1) Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs(1) B-to-A Data Inputs or B-to-A 3-State Outputs(1) Ground Power XCEAB H X X L L Inputs XLEAB X H X L H Latch Output Status Buffers XOEAB XAX TO XBX XBX X Storing High Z X Storing X H X High Z L Transparent Current A Inputs L Storing Previous* A Inputs Notes: 1. *Before xLEAB LOW-to-HIGH Transistion H = High Voltage Level L = Low Voltage Level X = Don’t Care or Irrelevant Z = High Impedance 2. A-to-B data flow shown. B-to-A flow control is the same, except using xCEBA, xLEBA, and xOEBA. Note: 1. For the PI74FCT162H543T, these pins have “Bus Hold.” All other pins are standard, outputs, or I/Os. Product Pin Configuration 1OEAB 1LEAB 1CEAB GND 1A0 1A1 VCC 1A2 1A3 1A4 GND 1A5 1A6 1A7 2A0 2A1 2A2 GND 2A3 2A4 2A5 VCC 2A6 2A7 GND 2CEAB 2LEAB 2OEAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 1OEBA 53 52 51 GND 50 49 56-PIN 48 V56 47 A56 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1LEBA 1CEBA 1B0 1B1 VCC 1B2 1B3 1B4 GND 1B5 1B6 1B7 2B0 2B1 2B2 GND 2B3 2B4 2B5 VCC 2B6 2B7 GND 2CEBA 2LEBA 2OEBA 2 PS2038B 01/10/01 PI74FCT16543/162543/162H543T 16-BIT LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................................................... –65°C to +150°C Ambient Temperature with Power Applied .................................... –40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. –0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ........... –0.5V to +7.0V DC Input Voltage ............................................................................ –0.5V to +7.0V DC Output Current ..................................................................................... 120 mA Power Dissipation ..........................................................................................1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%) Test Conditions(1) Parameters Description VIH VIL IIH IIH IIH IIH IIL IIL IIL IIL IBHH IBHL IOZH(5) IOZL(5) VIK IOS IO VH Input HIGH Voltage Input LOW Voltage Input HIGH Current Input HIGH Current Input HIGH Current Input HIGH Current Input LOW Current Input LOW Current Input LOW Current Input LOW Current Bus Hold Sustain Current High-Impedance Output Current (3-STATE OUTPUTS) Clamp Diode Voltage Short Circuit Current Output Drive Current Input Hysteresis Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Standard Input, VCC = Max. Standard I/O, VCC = Max. Bus Hold Input(4), VCC = Max. Bus Hold I/O(4), VCC = Max. Standard Input, VCC = Min. Standard I/O, VCC = Min. Bus Hold Input(4), VCC = Min. Bus Hold I/O(4), VCC = Min. Bus Hold Input(4), VCC = Min. VCC = Max. VCC = Max. VCC = Min., IIN = –18 mA VCC = Max.(3), VOUT = GND VCC = Max.(3), VOUT = 2.5V Min. Typ(2) Max. Units 0.8 1 1 ±100 ±100 –1 –1 ±100 ±100 V V µA µA µA µA µA µA µA µA µA 1 –1 µA µA –1.2 –200 –180 V mA mA mV 2.0 VIN = VCC VIN = VCC VIN = VCC VIN = VCC VIN = GND VIN = GND VIN = GND VIN = GND VIN = 2.0V VIN = 0.8V VOUT = 2.7V VOUT = 0.5V –50 +50 –80 –50 –0.7 –140 100 Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Pins with Bus Hold are identified in the pin description. 5. This specification does not apply to bi-directional functionalities with Bus Hold. 3 PS2038B 01/10/01 PI74FCT16543/162543/162H543T 16-BIT LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT16543T Output Drive Characteristics (Over the Operating Range) Test Conditions(1) Parameters Description VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL VOL IOFF Output LOW Voltage Power Down Disable VCC = Min., VIN = VIH or VIL VCC = 0V, VIN or VOUT ≤4.5V IOH = –3.0 mA IOH = –15.0 mA IOH = –32.0 mA IOL = 64 mA Min. Typ(2) 2.5 2.4 2.0 3.5 3.5 3.0 0.2 — 0.55 ±100 V µA Min. Typ(2) Max. Units 2.4 3.3 0.3 115 –115 0.55 150 –150 V V mA mA — Max. Units V PI74FCT162543T/162H543T Output Drive Characteristics (Over the Operating Range) Test Conditions(1) Parameters Description VOH VOL IODL IODH Output HIGH Voltage Output LOW Voltage Output LOW Current Output HIGH Current VCC = Min., VIN = VIH or VIL IOH = –24.0 mA VCC = Min., VIN = VIH or VIL IOL = 24 mA VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) 60 –60 Capacitance (TA = 25°C, f = 1 MHz) Parameters(4) CIN COUT Description Test Conditions Typ Max. Units Input Capacitance Output Capacitance VIN = 0V VOUT = 0V 4.5 5.5 6 8 pF pF Notes: 1. For Max. or Min.conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested. 4 PS2038B 01/10/01 PI74FCT16543/162543/162H543T 16-BIT LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Parameters Description Test Conditions(1) Min. Typ(2) Max. Units ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 0.1 500 µA ∆ICC Supply Current per Input @ TTL HIGH VCC = Max. VIN = 3.4V(3) 0.5 1.5 mA ICCD Supply Current per Input per MHz(4) VCC = Max., Outputs Open VIN = VCC xCEAB & xOEAB = GND VIN = GND xCEBA = VCC One Bit Toggling 50% Duty Cycle 60 100 µA/ MHz IC Total Power Supply Current(6) VCC = Max., Outputs Open fI = 10 MHZ 50% Duty Cycle xLEAB, xCEAB, and xOEAB = GND xCEBA = VCC One Bit Toggling VIN = VCC VIN = GND 0.6 1.5(5) mA VIN = 3.4V VIN = GND 0.9 2.3(5) VCC = Max., Outputs Open fI = 2.5 MHZ 50% Duty Cycle xLEAB, xCEAB, and xOEAB = GND xCEBA = VCC VIN = VCC VIN = GND 2.4 4.5(5) VIN = 3.4V VIN = GND 6.4 16.5(5) 16 Bits Toggling Notes: 1. For Max. or Min. conditions , use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. 5 PS2038B 01/10/01 PI74FCT16543/162543/162H543T 16-BIT LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT16543T Switching Characteristics over Operating Range Parameters t PLH t PHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o) (1) 16543T 16543AT 16543CT 16543DT 16543ET Com. Com. Com. Com. Com. Description Conditions Min Max Min Max Min Max Min Max Min Max Unit Propagation Delay Transparent Mode xAx to xBx or xBx to xAx Propagation Delay xLEBA to xAx, xLEAB to xBx Output Enable Time xOEBA or xOEAB to xAx or xBx Output Disable Time(3) xOEBA or xOEAB to xAx or xBx Setup Time HIGH or LOW xAx or xBx to xLEAB or xLEBA Hold Time HIGH or LOW xAx or xBx to xLEAB or xLEBA xLEAB or xLEBA Pulse Width 5.0 LOW(3) Output Skew(4) CL = 50 pF RL = 500Ω 2.5 8.5 2.5 6.5 2.5 5.3 2.5 4.4 1.5 3.4 ns 2.5 12.5 2.5 8.0 2.5 7.0 2.5 5.0 1.5 3.7 ns 2.0 12.0 2.0 9.0 2.0 8.0 2.0 5.4 1.5 4.8 ns 2.0 9.0 2.0 7.5 2.0 6.5 2.0 4.3 1.5 4.0 ns 3.0 — 2.0 — 2.0 — 2.0 — 1.0 — ns 2.0 — 2.0 — 2.0 — 1.5 — 1.0 — ns — 5.0 — 5.0 — 3.0 — 3.0 — 3.0 ns — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns PI74FCT162543T Switching Characteristics over Operating Range Parameters t PLH t PHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o) (1) 162543T 162543AT 162543CT 162543DT 162543ET Com. Com. Com. Com. Com. Description Conditions Min Max Min Max Min Max Min Max Min Max Unit Propagation Delay Transparent Mode xAx to xBx or xBx to xAx Propagation Delay xLEBA to xAx, xLEAB to xBx Output Enable Time xOEBA or xOEAB to xAx or xBx Output Disable Time(3) xOEBA or xOEAB to xAx or xBx Setup Time HIGH or LOW xAx or xBx to xLEAB or xLEBA Hold Time HIGH or LOW xAx or xBx to xLEAB or xLEBA xLEAB or xLEBA Pulse Width 5.0 LOW(3) Output Skew(4) CL = 50 pF RL = 500Ω 2.5 8.5 2.5 6.5 2.5 5.3 2.5 4.4 1.5 3.4 ns 2.5 12.5 2.5 8.0 2.5 7.0 2.5 5.0 1.5 3.7 ns 2.0 12.0 2.0 9.0 2.0 8.0 2.0 5.4 1.5 4.8 ns 2.0 9.0 2.0 7.5 2.0 6.5 2.0 4.3 1.5 4.0 ns 3.0 — 2.0 — 2.0 — 2.0 — 1.0 — ns 2.0 — 2.0 — 2.0 — 1.5 — 1.0 — ns — 5.0 — 5.0 — 3.0 — 3.0 — 3.0 ns — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 6 PS2038B 01/10/01 PI74FCT16543/162543/162H543T 16-BIT LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT162H543T Switching Characteristics over Operating Range 162H543T 162H543AT 162H543CT 162H543DT 162H543ET Com. Parameters t PLH t PHL t PLH t PHL t PZH t PZL t PHZ t PLZ tSU tH tW tSK(o) Com. Com. Com. Com. Description Conditions(1) Min Max Min Max Min Max Min Max Min Max Unit Propagation Delay Transparent Mode xAx to xBx or xBx to xAx Propagation Delay xLEBA to xAx, xLEAB to xBx Output Enable Time xOEBA or xOEAB to xAx or xBx Output Disable Time(3) xOEBA or xOEAB to xAx or xBx Setup Time HIGH or LOW xAx or xBx to xLEAB or xLEBA Hold Time HIGH or LOW xAx or xBx to xLEAB or xLEBA xLEAB or xLEBA Pulse Width 5.0 LOW(3) Output Skew(4) CL = 50 pF RL = 500Ω 2.5 8.5 2.5 6.5 2.5 5.3 2.5 4.4 1.5 3.4 ns 2.5 12.5 2.5 8.0 2.5 7.0 2.5 5.0 1.5 3.7 ns 2.0 12.0 2.0 9.0 2.0 8.0 2.0 5.4 1.5 4.8 ns 2.0 9.0 2.0 7.5 2.0 6.5 2.0 4.3 1.5 4.0 ns 3.0 — 2.0 — 2.0 — 2.0 — 1.0 — ns 2.0 — 2.0 — 2.0 — 1.5 — 1.0 — ns — 5.0 — 5.0 — 3.0 — 3.0 — 3.0 ns — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 7 PS2038B 01/10/01