PERICOM PS393

PS391/PS392/PS393
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Precision, Quad, SPST, Analog Switches
Description
Features
• Low On-Resistance, (16−ohms typ)
Minimizes Distortion and Error Voltages
• On-Resistance Match Between Channels, <2 ohms
• Guaranteed On-Resistance Flatness, <4 ohms
• Low Charge Injection, 3pC typ.
• Improved Leakage Over Temperature, <2.5nA at +85oC
• ESD Rating >2000V per Method 3015.7
• Single-Supply Operation (+3V to +15V)
• Bipolar-Supply Operation (±3V to ±8V)
• Low Power Consumption, <1µA
• TTL/CMOS Compatible
The PS391/ PS392/ PS393 are improved, quad, single-pole singlethrow (SPST) analog switches designed to operate with ±3V to ±8V
power supplies or a single 3V to 15V supply. The PS391 has four
normally closed (NC) switches, the PS392 has four normally open
(NO) switches. The PS393 has two NO and two NC switches. All
three devices offer low leakage (<2pA typ) and fast switching
speeds (tON <130ns). Power consumption is less than 1µA, ideal for
battery-powered equipment.
With ±5V supplies, the PS391/PS392/PS393 guarantee <2ohm
channel-to-channel matching, <30ohm on-resistance (RON), and
<4ohm RON flatness over the specified range.
Applications
•
•
•
•
•
•
These switches are fully specified for single +5V operation, with
<2ohm RON match, <45ohm RON, and <4ohm flatness.
Instrumentation
Battery Powered Systems
Audio Switching
±5V Data Acquisition Systems
Sample-and-Hold Circuits
Telecommunications Systems
For operation below 5V, the PI5A391A/PI5A392A/PI5A393A are
also recommended.
Functional Diagrams, Pin Configurations, and Truth Tables
IN1
1
16 IN2
COM1
2
15 COM2
NC1
3
14 NC2
V-
4
GND
5
NC4
13 V +
PS391
IN1
1
16 IN2
COM1
2
15 COM2
NO1
3
14 NO2
V-
4
12 N.C.
GND
5
6
11 NC3
NO4
COM4
7
10 COM3
IN4
8
9 IN3
1
16 IN2
COM1
2
15 COM2
NO1
3
14 NC2
V-
4
13 V+
PS392
13 V+
PS393
12 N.C.
GND
5
6
11 NO3
NO4
6
11 NC3
COM4
7
10 COM3
COM4
7
10 COM3
IN4
8
IN4
8
9 IN3
Top View
N.C. = No Connect.
IN1
12 N.C.
9 IN3
Top View
Top View
Switches shown for logic “0” input
PS393
PS392
PS391
Logic
Switch
Logic
Switch
Logic
Switche s 1,4
Switche s 2,3
0
1
ON
O FF
0
1
O FF
ON
0
1
O FF
ON
ON
O FF
1
PS8168E
09/16/02
PS391/PS392/PS393
Precision,
Quad,
SPST
Analog Switches
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Absolute Maximum Ratings
Thermal Information
Voltages Referenced to V–
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +17V
VIN, VCOM, VNC, VNO (Note 1) . . . . . . . . (V– )–2V to (V+) +2V
or 30mA, whichever occurs first
Current (any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current, COM, NO, NC
(pulsed at 1ms, 10% duty cycle) . . . . . . . . . . . . . . . . . 100mA
ESD per Method 3015.7 . . . . . . . . . . . . . . . . . . . . . . . . >2000V
Continuous Power Dissipation (TA= +70ºC)
Plastic DIP (derate 10.5mW/ ºC above +70ºC) . . . . . . . . . 800mW
SO and QSOP (derate 8.7mW/ ºC above +70ºC) . . . . . . . 650mW
Storage Temperature . . . . . . . . . . . . . . . . . . . . –65ºC to +150ºC
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . +300ºC
Note
Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped
by internal diodes. Limit forward diode current to 30mA.
Caution: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating
and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.
Electrical Specifications - Single +12V Supply
(V+ = 12V ±10%, GND = 0V, VINH = 4V, VINL = 0.8V)
Parame te r
Symbol
Conditions
Te mp. (°C)
M in(1)
Full
0
(Typ(2) M a1)x
Units
Analog Switch
Analog Signal Range(3)
VAN ALO G
On Resistance
RO N
On- Resistance Match
Between Channels(4)
∆RO N
On- Resistance
Flatness(5)
RF LAT(O N )
NO or NC Off
Leakage Current(6)
V+ = 12V, IC O M = 2mA,
VN O = 10V
V+ = 12V, IC O M = 2mA
VN O = 10V
25
V+
16
Full
IN O (O F F )
OR
IN C (O F F )
COM Off Leakage
Current(6)
IC O M (O F F )
COM On Leakage
Current(6)
IC O M (O N )
V+ = 12V, VC O M = 0V,
VN O = 10V
V+ = 12V, VC O M = 0V,
VN O = 10V
V+ = 12V, VC O M = 10V,
VN O = 10V
2
45
55
25
0.5
Full
V+ = 12V, IC O M = 2mA,
VN O = 10V, 5V, 1V
V
4
ohm
6
25
2
Full
4
6
25
–1
1
Full
–6
6
25
–1
1
Full
–6
6
25
–2
2
Full
–12
12
PS8168E
nA
09/16/02
PS391/PS392/PS393
Precision, Quad, SPST Analog Switches
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Electrical Specifications - Single +12V Supply (continued)
(V+ = 12V ±10%, GND = 0V, VINH = 4V, VINL = 0.8V)
Parame te r
Symbol
Conditions
Input Current with Input
Voltage High
IIN H
IN = 5V, all others = 0.8V
Input Current with Input
Voltage Low
IIN L
Te mp (°C)
M in(1 ) Typ(2 ) M ax(1 )
Units
Logic Input
–0.5
0.005
0.5
–0.5
0.005
0.5
51
13 0
Full
IN = 0.8V, all others =5V
µA
Dynamic
Turn- On Time
tO N
25
VC O M = 10V, Figure 2
Full
17 5
25
17
Turn- Off Time
tO F F
On- Channel Bandwidth
BW
Signal = 0dbm
Figure 4, 50ohm in and out
100
Q
CL=1nF, VG EN = 0V, RG EN = 0Ω,
Figure 3
3
Off Isolation
O IR R
RL = 50ohm, CL= 5pF, f = 1 MHz, Figure 4
Crosstalk(8 )
XTA LK
RL = 50ohm, CL= 5pF, f = 1 MHz, Figure 5
–86
NO Capacitance
C (O F F )
f =1 MHz, Figure 6
12
CC O M (O F -
f =1 MHz, Figure 6
12
25
Charge Injection(3 )
COM Off Capacitance
Full
75
ns
100
MHz
10
–58
25
pC
dB
pF
F)
COM On Capacitance
CC O M (O N )
f =1MHz, Figure 7
Positive Supply Current
I+
VIN = 0V or V+, all channels on or off
Total Harmonic Distortion
THD
Full
–1
0.001
1
0.03
µA
%
Notes:
1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in
this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ∆RON = ∆RON max - ∆RON min
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7. Off Isolation = 20log10 [ VCOM / (VNO or VNO) ], VCOM = 0utput, VNC /VNO = input to off switch
8. Between any two switches.
3
PS8168E
09/16/02
PS391/PS392/PS393
Precision,
Quad,
SPST
Analog Switches
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Electrical Specifications - Dual Supplies
(V+ = +5V ±10%, V– = –5V ±10%, GND = 0V, VINH = 2.4V, VINL = 0.8V)
Parame te r
Symbol
Conditions
Te mp°C
M in(2 )
Full
V–
Typ(2 )
M a x( 2 )
Units
V+
V
Analog Switch
Analog Signal Range(3 )
On- Resistance
On- Resistance Match
Between Channels(4 )
VA N A LO G
RO N
V+ = 4.5V, V– = –4.5V,
IC O M = –10mA, VN O or VN C = +3.5V
VC O M
RF LAT(O N )
NO or NC Off Leakage
Current(6 )
IN O (O F F ) or
IN O (O F F )
COM Off Leakage
Current(6 )
IC O M (O F F )
COM On Leakage
Current(6 )
IC O M (O N )
16
Full
V+ = 5.5V, V– = –5.5V,
= –10mA, VN O or VN C = ±3.5V
0.2
Full
VC O M
V+ = 5.5V, V– = –5.5V,
VC O M = ±4.5V, VN O or VN C = ±4.5V
4
2
4
25
1
Full
V+ = 5.5V, V– = –5.5V,
= ±4.5V, VN O or VN C = +4.5V
30
40
25
∆RO N
On- Resistance Flatness(5 )
25
ohm
4
6
25
–0.1
Full
–2.5
25
–0.1
Full
–2.5
25
–0.2
Full
–5
–0.001
0.1
2.5
–0.001
0.1
2.5
0.002
nA
0.2
5
PS8168E
09/16/02
PS391/PS392/PS393
Precision, Quad, SPST Analog Switches
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Electrical Specifications - Dual Supplies (continued)
(V+ = +5V ±10%, V– = –5V ±10%, GND = 0V, VINH = 2.4V, VINL = 0.8V)
Parame te r
Symbol
Conditions
Te mp°C
M in(1 )
Typ(2 )
M a x( 1 )
Units
Full
–0.5
0.005
0.5
µA
51
130
Logic Input
Input Current with
Input Voltage High
Input Current with
Input Voltage Low
IIN H
IN = 2.4V,
all others = 0.8V
IIN L
IN = 0.8V,
all others = 2.4V
Dynamic
Turn- On- Time
25
tO N
Full
VC O M = ± 3V,
Figure 1
Turn- Off- Time
175
25
t(O F F )
29
Full
tD
PS393 only, RL = 300ohm,
CL= 35pF, Figure 2
Charge Injection(3 )
Q
CL = 1nF, VG EN = 0V,
RG EN = 0ohm, Figure 3
3
O IR R
RL= 50ohm, CL = 5pF,
f = 1MHz, Figure 4
–65
Crosstalk
XTA LK
RL= 50ohm, CL = 5pF,
f = 1MHz, Figure 5
NC or NO Capacitance
C (O F F )
Off Isolation
COM Off Capacitance
CC O M (O F F )
COM On Capacitance
CC O M (O N )
ns
100
Break- Before- Make
Time Delay
Full
75
10
20
5
pC
dB
25
–90
12
f = 1MHz, Figure 6
12
f = 1MHz, Figure 7
pF
25
Supply
Positive Supply Range
V+, V–
Positive Supply Current
I+
Negative Supply Current
I–
V+ = 5.5V, V– = –5.5V,
VIN = 0V or V+
All channels on or off
±3
±8
V
–1
1
µA
Full
Notes:
1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum,
is used in this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ∆RON = RON max - RON min
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7. Off Isolation = 20log10 [ VCOM / (VNC or VNO) ], VCOM = Output, VNC ,VNO = input to off switch
8. Between any two switches.
5
PS8168E
09/16/02
PS391/PS392/PS393
Precision,
Quad,
SPST
Analog Switches
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Electrical Specifications - Single 5V Supply
(V+ = +5V ±10%, V– = –5V ±10%, GND = 0V, VINH = 2.4V, VINL = 0.8V)
De s cription
Parame te r
Conditions
Te mp (°C)
M in(1 )
Typ(2 )
M a x( 1 )
Units
V+
V
Analog Switch
Analog Switch Range(3 )
On- Resistance
On- Resistance Match
Between Channels(4 )
VA N A LO G
0
RO N
V+ = 4.5V, IC O M = –10mA,
VN O or VN C = 3.5V
∆RO N
V+ = 5V, IC O M = –1mA,
VN O or VN C = 3V
On- Resistance
Flatness(3 ,5 )
RF LAT(O N )
V+ = 5V, IC O M = –1mA,
VN O or VN C = 1V, 4V
NO or NC Off Leakage
Current(9 )
IN O (O F F ) or
IN C (O F F )
V+ = 5.5V, VC O M = 0V,
VN O or VN C = 4.5V
COM Off Leakage
Current(9 )
IC O M (O F F )
V+ = 5.5V, VC O M = 0V,
VN O or VN C = 4.5V
COM On Leakage
Current(9 )
IC O M (O N )
V+ = 5.5V, VC O M = 4.5V
25
23
Full
45
60
25
0.3
Full
2
W
4
25
1
Full
4
6
25
–0.1
Full
–2.5
25
–0.1
Full
–2.5
25
–0.2
Full
–5
0.0004
0.1
2.5
0.001
0.1
nA
2.5
0.002
0.2
5
Dynamic
Turn- On Time
25
tO N
VN O or VN C = 3V
Turn- Off Time
tO F F
63
Full
240
25
34
Full
Break- Before- Make
Time Delay(3 )
tD
PS393 only, RL = 300ohm,
C L = 35pF
Full
Charge Injection(3 )
Q
CL = 1nF, VG EN = 0V,
RG EN = 0V, Figure 4
25
V+ = 5.5V,
VIN = 0V or V+,
All channels on or off
Full
170
50
ns
100
10
20
0
5
pC
1
mA
Supply
Positive Supply Current
Negative Supply Current
I+
I–
6
–1
PS8168E
09/16/02
PS391/PS392/PS393
Precision, Quad, SPST Analog Switches
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Electrical Specifications - Single 3.3V Supply
(V+ = +3V to 3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V)
De s cription
Parame te r
Conditions
Te mp (°C) M in(1)
Typ(2)
M a x( 1 )
Units
V+
V
Analog Switch
Analog Switch Range(3)
VAN ALO G
Channel On- Resistance
RO N
Full
V+ =3V, IC O M = –10mA,
VN O or VN C = 1.5V
0
25
62
Full
17 5
275
ohm
Dynamic
Turn- On- Time(3)
25
tO N
VN O or VN C = 1.5V
Turn- Off- Time(3)
t(O F F )
97
Full
500
25
53
Full
Break- Before- Make Time Delay(3)
tD
PS393 only, RL = 300ohm;
C L = 35pF
25
Charge Injection(3)
Q
CL = 1.0nF, VGEN = 0V,
RGEN = 0V
Full
V+ = 3.6V, VIN = 0V or
V+,
All channels on or off
Full
400
125
ns
175
20
1
5
pC
1
µA
Supply
Positive Supply Current
I+
Negative Supply Current
I–
–1
Notes:
1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum,
is used in this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ∆RON = RON max - RON min
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7. Off Isolation = 20log10 [ VCOM / (VNC or VNO) ], VCOM = Output, VNC ,VNO = input to off switch
8. Between any two switches.
9. Leakage testing at single supply is guaranteed by testing with dual supplies.
7
PS8168E
09/16/02
PS391/PS392/PS393
Precision,
Quad,
SPST
Analog Switches
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Typical Operating Characteristics (TA = + 25ºC, unless otherwise noted)
RON vs. VCOM & Supply Voltages
28
24
V+ = +5V
V- = 5V
24
–3V
20
R ON (Ω)
Ω
20
R ON (Ω)
Ω
RON vs. VCOM & Supply Voltages
28
16
–5V
12
TA = +85
16
TA = +25
12
–8V
8
4
-8 -6
-4 -2
0
2
4
6
4
8
-4
-2
VCOM(V)
2
4
60
V- = 0V
V+ = 3V
V+ = +5V
V- = 0V
50
60
40
R ON (Ω)
RON (Ω)
0
RON vs. VCOM and Temperature (Single Supply)
80
40
V+ = 5V
20
2
4
6
8
TA = +25 C
20
TA = -55 C
10
V+ = 12V
0
TA = +85 C
30
10
0
12
0
1
VCOM(V)
Charge Injection vs. Analog Voltage
3
4
5
Leakage Current vs. VCOM
+2
Current (pA)
15
10
5
+1
0
+5V Supply
I
-2.5
0
2.5
-2
5.0
VCOM Voltage (V)
F)
OF
(
OM
IC
-1
0
N)
(O
M
CO
–5V Supply
-5
-5.0
2
VCOM(V)
20
Q - Charge Injection (pC)
C
VCOM(V)
RON vs. VCOM (Single Supply)
10
C
TA = -55
8
C
-5
-2.5
0
2.5
5
VCOM (V)
8
PS8168E
09/16/02
PS391/PS392/PS393
Precision, Quad, SPST Analog Switches
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Typical Operating Characteristics (continued)
Leakage Current
Leakage Current vs. Temperature
1nA
5
100pA
4
10pA
3
N)
I
Input Switching Threshold
vs. Supply Voltages
(O
M
CO
1pA
2
F)
OF
'(
),
FF
0.1pA
C,
NO
I
M
CO
1
(O
IN
0.01pA
-40
0
+40
+80
0
+120
±3
±4
±5
Temperature (˚C)
±7
±8
V+, V- (±V)
Switching Times vs. Supply Voltage
Supply Current vs. VIN
10
±6
100
V+ = +5.5V
V- = -5.5V
80
tON, tOFF (ns)
I+ (mA)
8
6
4
0
4
-4
6
-2
0
2
VIN - Logic Control Voltage (V)
Switching Times vs. Temperature
±3
2
60
tON
40
±4
±5
±6
±7
±8
Supply Currents vs. Switching Frequency
2.5
I+, I- (mA)
Switching Times
tOFF
V+, V- (±V)
80
tOFF
20
0
-40
40
20
2
0
tON
60
V+ = +5V
V- = -5V
VIN = 5VP-P
1.5
1
I+
I-
0.5
0
0
80
40
1
120
2
3
4
5
Frequency (MHz)
Temperature ( C)
˚
9
PS8168E
09/16/02
PS391/PS392/PS393
Precision,
Quad,
SPST
Analog Switches
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Test Circuits/Timing Diagrams
+12V
V+
VCOM = +3V(for ton),
NO
or NC
COM
-3V(for toff)
VOUT
RL
300Ω
IN
Logic
Input
Logic +3V
Input
0V
tr <20ns
tf <20ns
50%
tOFF
CL
35pF
VOUT
Switch
Output
90%
0V
GND
tON
90%
LOGIC INPUT WAVEFORMS INVERTED FOR
SWITCHES THAT HAVE OPPOSITE LOGIC
CL INCLUDES FIXTURE AND STRAY CAPACITANCE
RL
VOUT = VCOM
RL + RON
(
)
Figure 1. Switching Time
+5V
Logic
Input
V+
VCOM1= +3V
COM
NO
VCOM3= +3V
COM
NC
VOUT1
IN
V-5V
90%
Switch
Output 1
(VOUT1) 0V
CL1
CL2
RL2
GND
50%
0V
VOUT3
RL1
Logic
Input
+3V
Switch
Output3
(VOUT3)
RL= 300Ω
CL = 35pF
90%
0V
tD
tD
CL INCLUDES FIXTURE AND STRAY CAPACITANCE
Figure 2. Break-Before-Make Interval (PS393 only)
+5V
RGEN
V+
COM
VGEN
VOUT
IN
CL
OFF
OFF
ON
1nF
IN
Logic
Input
∆VOUT
VOUT
NO or
NC
GND
V-
IN
OFF
-5V
ON
OFF
Q = (∆VOUT)(CL)
Figure 3. Charge Injection
10
PS8168E
09/16/02
PS391/PS392/PS393
Precision, Quad, SPST Analog Switches
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Test Circuits/Timing Diagrams (continued)
+5V
10nF
Signal
Generator 0dBm
10nF
Signal
Generator 0dBm
V+
COM
COM
Analyzer
50Ω
N01
IN2
RL
Figure 5. Crosstalk
+5V
10nF
+5V
V+
V+
COM
IN
NC
or NO
GND
10nF
10nF
Figure 4. Off Isolation
10nF
NC
V-5V
-5V
0V or
2.4V
COM2
N02
GND
V-
RL
f = 1kHz
V+
IN1
0V or
2.4V
0V or
2.4V
NC
or NO
GND
Capacitance
Meter
COM1
COM
IN
Analyzer
+5V
Capacitance
Meter
0V or
2.4V
f = 1kHz
IN
0V or
2.4V
NC
or NO
GND
V-
-5V
COM
EN
10nF
Figure 6. Channel-Off Capacitance
Figure 7. Channel-On Capacitance
Applications
As illustrated in Figure 8, PS391 can be used to insert various
capacitors (C1, C2) and set proper RC times for integration. The
resistors R1 and R2 set initial gain. The RIN resistor x C1 or C2 sets
the RC time. The reset switch discharges the hold capacitor
through RIN.
Figure 8. Programmable Integrator and Sample/Hold
11
PS8168E
09/16/02
PS391/PS392/PS393
Precision,
Quad,
SPST
Analog Switches
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Overvoltage Protection
Ordering Information
Proper power-supply sequencing is recommended for all CMOS
devices. Do not exceed the absolute maximum ratings, because
stresses beyond the listed ratings may cause permanent damage
to the devices. Always sequence V+ on first, followed by V-, and
then the logic inputs. If power-supply sequencing is not possible,
add two small signal diodes or two current limiting resistors in
series with the supply pins for overvoltage protection (Figure 9).
Adding diodes reduces the analog signal range, but low switch
resistance and low leakage characteristics are unaffected.
Part Numbe r
Positive Supply
V+
NO
COM
Vg
V-
Te mpe rature Range
Package
PS391CPE
0ºC to + 70ºC
16 Ld PDIP
PS391CSE
0ºC to + 70ºC
16 Narrow SOIC
PS391EPE
–40ºC to + 85ºC
16 Ld PDIP
PS391ESE
–40ºC to + 85ºC
16 Narrow SOIC
PS391EEE
–40ºC to + 85ºC
16 QSOP
P S 392C P E
0ºC to + 70ºC
16 Ld PDIP
P S 392C S E
0ºC to + 70ºC
16 Narrow SOIC
PS392EPE
–40ºC to + 85ºC
16 Ld PDIP
PS392ESE
–40ºC to + 85ºC
16 Narrow SOIC
PS392EEE
–40ºC to + 85ºC
16 QSOP
P S 393C P E
0ºC to + 70ºC
16 Ld PDIP
P S 393C S E
0ºC to + 70ºC
16 Narrow SOIC
PS393EPE
–40ºC to + 85ºC
16 Ld PDIP
PS393ESE
–40ºC to + 85ºC
16 Narrow SOIC
PS393EEE
v40ºC to + 85ºC
16 Q S O P
Figure 9. Overvoltage protection is accomplished using two
external blocking diodes or two current limiting resistors.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
12
PS8168E
09/16/02