ONET8511T www.ti.com SLLS895 – MARCH 2008 11.3 Gbps Linear Transimpedance Amplifier With AGC and RSSI FEATURES 1 • • • • • • • • • • 8 GHz Bandwidth 5.5 kΩ Differential Small Signal Transimpedance Automatic Gain Control (AGC) 5% THD Typical with 100 MHz Input 10 pA/√Hz Typical Input Referred Noise 2 mAP-P Input Current Linear Operation Received Signal Strength Indication (RSSI) CML Data Outputs With On-Chip 50 Ω Back-Termination On Chip Supply Filter Capacitor Single 3.3 V Supply • • Die Size: 945 × 1200 µm Case temperature operation: –25°C to 100°C APPLICATIONS • • • • • 10 Gigabit Ethernet LRM Optical Receivers SFP+ Optical Receivers 8×and 10× Fibre Channel Optical Receivers SONET OC-192 PIN Preamplifier-Receivers DESCRIPTION The ONET8511T is a high-speed, high linearity transimpedance amplifier used in optical receivers with data rates up to 11.3 Gbps. It features low input referred noise, 8 GHz bandwidth, 5.5 kΩ small signal transimpedance, automatic gain control (AGC) which provides highly linear operation and a received signal strength indicator (RSSI). The ONET8511T is available in die form, includes an on-chip VCC bypass capacitor and is optimized for packaging in a TO can and for the use together with electronic dispersion compensation (EDC) ICs. The ONET8511T requires a single +3.3 V supply and its power efficient design typically dissipates less than 160 mW. The device is characterized for operation from -25°C to 100°C (IC back side) temperature.. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated ONET8511T www.ti.com SLLS895 – MARCH 2008 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. BLOCK DIAGRAM Figure 1 shows an ONET8511T block diagram. The ONET8511T consists of the signal path, supply filters, a control block for DC input bias, automatic gain control (AGC), and received signal strength indicator (RSSI). The RSSI provides the bias for the TIA stage and the control for the AGC. The signal path consists of a transimpedance amplifier stage, an AGC voltage amplifier, and a CML output buffer. The on-chip filter circuit provides a filtered VCC for the photodiode and for the transimpedance amplifier. The DC input bias circuit and automatic gain control use internal low pass filters to cancel the DC current on the input and to adjust the transimpedance amplifier gain. Additionally, the chip provides circuitry to monitor the received signal strength. To AGC Amplifier and Output Buffer VCC_OUT VCC_IN To TIA GND 220 W FILTER1/2 RSSI AGC and RSSI OUT+ IN OUT– TIA AGC Amplifier CML Output Buffer RF B0298-01 Figure 1. ONET8511T Block Diagram 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T ONET8511T www.ti.com SLLS895 – MARCH 2008 BOND PAD ASSIGNMENT OUT+ 1 VCC_OUT 2 GND GND GND GND GND 18 17 16 15 14 13 12 GND 11 OUT– 10 GND 9 RSSI 4 5 6 7 8 FILTER1 IN FILTER2 GND 3 GND VCC_IN GND 8511T The ONET8511T is available in die form. The locations of the bond pads are shown in Figure 2. M0094-01 Figure 2. ONET8511T Bond Pad Assignment TERMINAL FUNCTIONS TERMINAL TYPE DESCRIPTION 5, 7 Analog Bias voltage for photodiode cathode. These pads are internally connected to an 220 Ω resistor to VCC and a filter capacitor to ground (GND). 4, 8, 10, 12, 13, 14, 15,16, 17, 18 Supply Circuit ground. All GND pads are connected on die. Bonding all pads is optional; however for optimum performance a good ground connection is mandatory. IN 6 Analog input Data input to TIA (photodiode anode). OUT+ 1 Analog output Non-inverted CML data output. On-chip 50 Ω back-terminated to VCC. OUT– 11 Analog output Inverted CML data output. On-chip 50 Ω back-terminated to VCC. RSSI 9 Analog output Analog output current proportional to the input data amplitude. Indicates the strength of the received signal (RSSI). Must be sunk through an external resistor to ground (GND). The RSSI gain can be adjusted by choosing the external resistor; however, for proper operation, ensure that the voltage at the RSSI pad does not exceed VCC-0.65V. If the RSSI feature is not used, this pad must be bonded to ground (GND) for proper operation. VCC_IN 3 Supply 2.95 V to 3.6 V supply voltage for input TIA stage. VCC_OUT 2 Supply 2.95 V to 3.6 V supply voltage for the AGC amplifier. NAME NO. FILTER GND Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T 3 ONET8511T www.ti.com SLLS895 – MARCH 2008 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) PARAMETER VALUE UNIT VCC_IN, VCC_OUT Supply voltage (2) –0.3 to 4.0 V VFILTER, VOUT+, VOUT–, VRSSI Voltage at FILTER1, FILTER2, OUT+, OUT–, RSSI (2) –0.3 to 4.0 V IIN Current into IN –0.7 to 3.5 mA IFILTER Current into FILTER1, FILTER2 –8 to 8 mA IOUT+, IOUT– Continuous current at outputs –8 to 8 mA 2 kV (HBM) (4) ESD rating at all pins except input IN ESD (3) ESD rating at IN 0.5 TJ,max Maximum junction temperature 125 °C TSTG Storage temperature range –65 to 150 °C (1) (2) (3) (4) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. For optimum high-frequency performance, the input pin has reduced ESD protection. Human Body Model RECOMMENDED OPERATING CONDITIONS MIN TYP MAX VCC Supply voltage 2.95 3.3 3.6 V TA Operating backside die temperature –25 100 (1) °C LFILTER, LIN Wire-bond inductor at pins FILTER and IN 0.4 0.6 nH CPD Photodiode Capacitance 0.2 (1) UNIT pF 105°C junction temperature DC ELECTRICAL CHARACTERISTICS over recommended operating conditions (unless otherwise noted). Typical values are at VCC = 3.3 V and TA = 25°C. PARAMETER VCC IVCC Supply current VIN Input bias voltage ROUT Output resistance RFILTER Photodiode filter resistance (1) 4 TEST CONDITIONS Supply voltage MIN TYP MAX 2.95 3.3 3.6 46 (1) Input current IIN < 1400 µAP-P Single-ended to VCC 45 70 UNIT V mA 0.85 1.05 V 50 65 Ω 220 Ω Includes RSSI current Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T ONET8511T www.ti.com SLLS895 – MARCH 2008 AC ELECTRICAL CHARACTERISTICS over recommended operating conditions (unless otherwise noted). Typical values are at VCC = 3.3 V and TA = 25°C. PARAMETER TEST CONDITIONS Z21 Small signal transimpedance Differential output; Input current IIN = 20 µAp-p fHSS,3dB Small signal bandwidth IIN = 100 µAp-p with AGC on fL,3dB Low frequency –3 dB bandwidth IIN = 100 µAp-p THD Linear operation 100 MHz signal, 3.5 dB extinction ratio, IIN ≤ 1400 µAp-p τAGC AGC settling time IIN = 500 Ap-p, 3.5dB extinction ratio IN,IN Input referred RMS noise unfiltered Input referred noise density 10 GHz bandwidth Deterministic jitter IIN < 1400 µAp-p (K28.5 pattern) DJ PSNR Power supply noise rejection ARSSI RSSI gain (3) MIN 3.5 (1) 7 RSSI VOUTD,MAX (1) (2) (3) (4) kHz 5 10 % 2.2 µA µs 14 pA/√Hz 18 psp-p 1 1.05 A/A 22 32 µA 25 (4) 0.95 kΩ 50 8 1 < f < 10 MHz UNIT GHz 10 RSSI bandwidth Maximum differential output voltage 8 30 1.0 RSSI output offset current (no light) fH,3dB, 5.5 8 (2) Resistive load to GND TYP MAX dB 2 MHz Input current IIN = 100 µAp-p, 3.5 dB extinction ratio 200 250 mVp-p Input current IIN = 1400 µAp-p, 3.5 dB extinction ratio 200 270 The small signal bandwidth is specified over process corners, temperature, and supply voltage variation. The assumed photodiode capacitance is 0.2 pF and the bond-wire inductance is 0.4 nH. The small signal bandwidth strongly depends on environmental parasitics. Careful attention to layout parasitics and external components is necessary to achieve optimal performance. Input referred RMS noise = (RMS output noise) ÷ (gain at 100 MHz). The input referred noise is specified over process corners, temperature, and supply voltage variation. PSNR is the differential output amplitude divided by the voltage ripple on supply; no input current at IN. The RSSI output is a current output, which requires a resistive load to ground (GND). The voltage gain can be adjusted for the intended application by choosing the external resistor; however, for proper operation, ensure that the voltage at RSSI does not exceed VCC–0.65 V. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T 5 ONET8511T www.ti.com SLLS895 – MARCH 2008 DETAILED DESCRIPTION SIGNAL PATH The first stage of the signal path is a transimpedance amplifier which converts the photodiode current into a voltage signal with a linear relationship. If the input signal current exceeds a certain value, the transimpedance gain is reduced by means of an AGC circuit to keep the transmit behavior linear. The second stage is an AGC voltage amplifier that provides additional linear gain and converts the single ended input voltage into a differential data signal. The third stage is the output buffer which provides CML outputs with an on-chip 50Ω back-termination to VCC. FILTER CIRCUITRY The FILTER pins provide a filtered VCC for the photodiode bias. The on-chip low pass filter for the photodiode is implemented using a filter resistor of 220 Ω and a capacitor. The corresponding corner frequency is below 5 MHz. The supply voltages for the transimpedance amplifier are filtered by means of on-chip capacitors, thus avoiding the need for an external supply filter capacitor. The input stage has a separate VCC supply (VCC_IN) that is not connected on the chip to the supply of the AGC/CML stages (VCC_OUT). AGC AND RSSI The voltage drop across the internal photodiode supply-filter resistor is monitored by the bias and RSSI control circuit block. If the DC input current exceeds a specified level then it is partially cancelled by means of a controlled current source. This keeps the transimpedance amplifier stage within sufficient operating limits for optimum performance. The automatic gain control circuitry adjusts the voltage gain of the AGC amplifier to ensure linear behavior of the complete amplifier. Finally, this circuit block senses the current through the filter resistor and generates a mirrored current that is proportional to the input signal strength. The mirrored current is available at the RSSI output and must be sunk to ground (GND) using an external resistor. For proper operation, ensure that the voltage at the RSSI pad does not exceed VCC-0.65 V. 6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T ONET8511T www.ti.com SLLS895 – MARCH 2008 TYPICAL CHARACTERISTICS Typical operating condition is at VCC = +3.3V and TA = +25°C (unless otherwise noted). TRANSIMPEDANCE vs INPUT CURRENT SMALL SIGNAL TRANSIMPEDANCE vs AMBIENT TEMPERATURE 6 9 8 5 Transimpedance − kΩ Transimpedance − kΩ 7 4 3 2 6 5 4 3 2 1 1 0 0 200 400 600 800 IIN − Input Current − µAPP 0 −40 1000 20 40 60 80 100 G001 G002 Figure 3. Figure 4. SMALL SIGNAL TRANSFER CHARACTERISTICS OUTPUT VOLTAGE vs INPUT CURRENT (644 MHz Signal, 3.5 dB ER) VOD − Differential Output Voltage − mVPP 350 36 30 Gain − dB 0 TA − Ambient Temperature − °C 42 24 18 12 6 0 1M −20 300 250 200 150 100 50 0 10M 100M 1G 10G 100G 0 200 f − Frequency − Hz G003 Figure 5. 400 600 800 1000 1200 IIN − Input Current − µAPP 1400 G004 Figure 6. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T 7 ONET8511T www.ti.com SLLS895 – MARCH 2008 TYPICAL CHARACTERISTICS (continued) Typical operating condition is at VCC = +3.3V and TA = +25°C (unless otherwise noted). DETERMINISTIC JITTER vs INPUT CURRENT TOTAL HARMONIC DISTORTION vs INPUT CURRENT (100 MHz Signal, 3.5 dB ER) 14 10 9 12 10 7 8 THD − % Deterministic Jitter − ps 8 6 6 5 4 3 4 2 2 1 0 0 0 250 500 750 1000 1250 1500 1750 2000 IIN − Input Current − µAPP 0 200 400 600 800 1000 1200 IIN − Input Current − µAPP G005 1400 G006 Figure 7. Figure 8. RSSI OUTPUT CURRENT vs AVERAGE INPUT CURRENT POWER SUPPLY NOISE REJECTION vs FREQUENCY 0 1200 1000 800 PSNR − dB RSSI Output Current − µA −10 600 −20 400 −30 200 −40 0 0 200 400 600 800 1000 IIN − Average Input Current − µA 1200 0 1 3 4 5 6 7 8 9 10 f − Frequency − MHz G008 G007 Figure 9. 8 2 Figure 10. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T ONET8511T www.ti.com SLLS895 – MARCH 2008 TYPICAL CHARACTERISTICS (continued) Typical operating condition is at VCC = +3.3V and TA = +25°C (unless otherwise noted). OUTPUT EYE-DIAGRAM AT 10.3 GBPS and 20 µAp-p INPUT CURRENT 50mv/Div OUTPUT EYE-DIAGRAM AT 10.3 GBPS AND 100 µAp-p INPUT CURRENT 16.4ps/Div 100mv/Div 16.4ps/Div G009 G010 Figure 11. Figure 12. OUTPUT EYE-DIAGRAM AT 10.3 GBPS AND 500 µAp-p INPUT CURRENT OUTPUT EYE-DIAGRAM AT 10.3 GBPS AND 2000 µAp-p INPUT CURRENT 100mv/Div 16.4ps/Div 100mv/Div 16.4ps/Div G011 Figure 13. G012 Figure 14. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T 9 ONET8511T www.ti.com SLLS895 – MARCH 2008 APPLICATION INFORMATION Figure 15 shows the ONET8511T being used in a typical fiber optic receiver circuit using the internal photodiode bias. The ONET8511T converts the electrical current generated by the PIN photodiode into a differential output voltage. The FILTER inputs provide a DC bias voltage for the PIN that is low pass filtered by the combination of an internal 220 Ω resistor and a capacitor. Because the voltage drop across the 220 Ω resistor is sensed and used by the bias circuit, the photodiode must be connected to the FILTER pads for the AGC to function correctly. The RSSI output is used to mirror the photodiode output current and must be connected using a resistor to GND. The voltage gain can be adjusted for the intended application by choosing the external resistor; however, for proper operation of the ONET8511T, ensure that the voltage at RSSI never exceeds VCC–0.65 V. The RSSI output must be grounded if it is unused. The OUT+ and OUT– pins are internally terminated by 50 Ω pull-up resisters to VCC. The outputs must be AC coupled, for example by using 0.1 µF capacitors, to the succeeding device. 0.1 mF VCC_OUT OUT+ 3 2 1 8511T VCC_IN 18 4 220 W 17 5 16 6 15 7 14 8 13 9 10 11 12 0.1 mF OUT– RSSI RRSSI GND S0332-01 Figure 15. Basic Application Circuit ASSEMBLY RECOMMENDATIONS You need to concentrate on assembly parasitics and external components to achieve optimal performance. Recommendations that optimize performance include: 1. Minimize the total capacitance on the IN pad by using a low capacitance photodiode and compensating for stray capacitances. Place the photodiode close to the ONET8511T die in order to minimize the bond wire length and associated parasitic inductance. 2. Use identical termination and symmetrical transmission lines at the AC coupled differential output pins OUT+ and OUT–. 3. Use short bond wire connections for the supply terminals VCC_IN, VCC_OUT and GND. Supply voltage filtering is provided on chip but filtering may be improved by using an additional external capacitor. 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T ONET8511T www.ti.com SLLS895 – MARCH 2008 8511T CHIP DIMENSIONS AND PAD LOCATIONS 18 16 17 15 13 14 12 11 1200 mm 1 2 10 9 y 3 4 Origin 0.0 5 6 7 8 945 mm x M0095-01 Die Thickness: 203 µm Pad Dimensions: 105 × 65 µm Bond Pad Locations and Descriptions PAD COORDINATES SYMBOL TYPE DESCRIPTION x (µm) y (µm) 1 116 718 OUT+ Analog output Non-inverted data output 2 116 575 VCC_OUT Supply 3.3 V supply voltage 3 116 289 VCC_IN Supply 3.3 V supply voltage 4 243 136 GND Supply Circuit ground 5 358 136 FILTER1 Analog Bias voltage for photodiode 6 473 136 IN Analog input Data input to TIA 7 588 136 FILTER2 Analog Bias voltage for photodiode 8 703 136 GND Supply Circuit ground 9 828 289 RSSI Analog output RSSI output signal 10 828 474 GND Supply RSSI output signal for externally biased receivers 11 828 718 OUT– Analog output Inverted data output 12 828 910 GND Supply Circuit ground 13 760 1063 GND Supply Circuit ground 14 645 1063 GND Supply Circuit ground 15 530 1063 GND Supply Circuit ground 16 415 1063 GND Supply Circuit ground 17 300 1063 GND Supply Circuit ground 18 185 1063 GND Supply Circuit ground Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T 11 ONET8511T www.ti.com SLLS895 – MARCH 2008 TO46 LAYOUT EXAMPLE An example for a layout (top view) in a 5-pin TO46 can is shown in Figure 16. OUT+ OUT– VCC RSSI M0096-01 Figure 16. TO46 5-Pin Layout Using the ONET8511T 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ONET8511T PACKAGE OPTION ADDENDUM www.ti.com 11-Mar-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing ONET8511TY ACTIVE DIESALE Y Pins Package Eco Plan (2) Qty 0 360 Green (RoHS & no Sb/Br) Lead/Ball Finish Call TI MSL Peak Temp (3) N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. 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