TIC216 SERIES SILICON TRIACS Copyright © 1997, Power Innovations Limited, UK ● Sensitive Gate Triacs ● 6 A RMS ● Glass Passivated Wafer ● 400 V to 800 V Off-State Voltage ● Max IGT of 5 mA (Quadrants 1 - 3) DECEMBER 1971 - REVISED MARCH 1997 TO-220 PACKAGE (TOP VIEW) MT1 1 MT2 2 G 3 Pin 2 is in electrical contact with the mounting base. MDC2ACA absolute maximum ratings over operating case temperature (unless otherwise noted) RATING SYMBOL VALUE TIC216D TIC216M Repetitive peak off-state voltage (see Note 1) TIC216S UNIT 400 600 VDRM V 700 TIC216N 800 IT(RMS) 6 A Peak on-state surge current full-sine-wave (see Note 3) ITSM 60 A Peak on-state surge current half-sine-wave (see Note 4) ITSM 70 A Peak gate current IGM ±1 A W Full-cycle RMS on-state current at (or below) 70°C case temperature (see Note 2) Peak gate power dissipation at (or below) 85°C case temperature (pulse width ≤ 200 µs) PGM 2.2 PG(AV) 0.9 W Operating case temperature range TC -40 to +110 °C Storage temperature range Tstg -40 to +125 °C TL 230 °C Average gate power dissipation at (or below) 85°C case temperature (see Note 5) Lead temperature 1.6 mm from case for 10 seconds NOTES: 1. These values apply bidirectionally for any value of resistance between the gate and Main Terminal 1. 2. This value applies for 50-Hz full-sine-wave operation with resistive load. Above 70°C derate linearly to 110°C case temperature at the rate of 150 mA/°C. 3. This value applies for one 50-Hz full-sine-wave when the device is operating at (or below) the rated value of on-state current. Surge may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost. 4. This value applies for one 50-Hz half-sine-wave when the device is operating at (or below) the rated value of on-state current. Surge may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost. 5. This value applies for a maximum averaging time of 20 ms. electrical characteristics at 25°C case temperature (unless otherwise noted) PARAMETER IDRM IGTM VGTM MIN TEST CONDITIONS Repetitive peak VD = rated VDRM off-state current IG = 0 TC = 110°C TYP MAX UNIT ±2 mA Vsupply = +12 V† RL = 10 Ω tp(g) > 20 µs 5 Peak gate trigger Vsupply = +12 V† RL = 10 Ω tp(g) > 20 µs -5 current Vsupply = -12 V† RL = 10 Ω tp(g) > 20 µs -5 Vsupply = -12 V† RL = 10 Ω tp(g) > 20 µs 10 Vsupply = +12 V† RL = 10 Ω tp(g) > 20 µs 2.2 Peak gate trigger Vsupply = +12 V† RL = 10 Ω tp(g) > 20 µs -2.2 voltage Vsupply = -12 V† RL = 10 Ω tp(g) > 20 µs -2.2 Vsupply = -12 V† RL = 10 Ω tp(g) > 20 µs 3 mA V † All voltages are with respect to Main Terminal 1. PRODUCT INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 TIC216 SERIES SILICON TRIACS DECEMBER 1971 - REVISED MARCH 1997 electrical characteristics at 25°C case temperature (unless otherwise noted) (continued) PARAMETER VTM Peak on-state voltage IH Holding current IL Latching current dv/dt dv/dt(c) MIN TEST CONDITIONS Critical rise of commutation voltage UNIT ±1.7 V IG = 50 mA (see Note 6) Vsupply = +12 V† IG = 0 Init’ ITM = 100 mA 30 Vsupply = -12 V† IG = 0 Init’ ITM = -100 mA -30 Vsupply = +12 V† off-state voltage MAX ITM = ±8.4 A Vsupply = -12 V† Critical rate of rise of TYP 50 (see Note 7) mA -20 VDRM = Rated VDRM IG = 0 TC = 110°C VDRM = Rated VDRM ITRM = ±8.4 A TC = 70°C mA ±50 V/µs ±5 V/µs † All voltages are with respect to Main Terminal 1. NOTES: 6. This parameter must be measured using pulse techniques, tp = ≤ 1 ms, duty cycle ≤ 2 %. Voltage-sensing contacts separate from the current carrying contacts are located within 3.2 mm from the device body. 7. The triacs are triggered by a 15-V (open-circuit amplitude) pulse supplied by a generator with the following characteristics: RG = 100 Ω, tp(g) = 20 µs, tr = ≤ 15 ns, f = 1 kHz. thermal characteristics MAX UNIT RθJC Junction to case thermal resistance PARAMETER 2.5 °C/W RθJA Junction to free air thermal resistance 62.5 °C/W PRODUCT 2 INFORMATION MIN TYP TIC216 SERIES SILICON TRIACS DECEMBER 1971 - REVISED MARCH 1997 MECHANICAL DATA TO-220 3-pin plastic flange-mount package This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. TO220 4,70 4,20 ø 10,4 10,0 3,96 3,71 1,32 1,23 2,95 2,54 see Note B 6,6 6,0 15,90 14,55 see Note C 6,1 3,5 1,70 1,07 0,97 0,61 1 2 14,1 12,7 3 2,74 2,34 5,28 4,88 VERSION 1 0,64 0,41 2,90 2,40 VERSION 2 ALL LINEAR DIMENSIONS IN MILLIMETERS NOTES: A. The centre pin is in electrical contact with the mounting tab. B. Mounting tab corner profile according to package version. C. Typical fixing hole centre stand off height according to package version. Version 1, 18.0 mm. Version 2, 17.6 mm. PRODUCT MDXXBE INFORMATION 3 TIC216 SERIES SILICON TRIACS DECEMBER 1971 - REVISED MARCH 1997 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright © 1997, Power Innovations Limited PRODUCT 4 INFORMATION