TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com Resistor-Programmable Temperature Switch in SOT Package Check for Samples: TMP709 FEATURES APPLICATIONS • • • • • • 1 2 • • • • • • • Threshold Accuracy: – ±0.5°C Typical – ±3°C Maximum (+60°C to +100°C) Temperature Threshold Set By 1% External Resistor Low Quiescent Current: 40 μA Typical Open-Drain, Active-Low Output Stage Pin-Selectable 2°C or 10°C Hysteresis Reset Operation Specified at VCC = 0.8 V Supply Range: 2.7 V to 5.5 V Package: 5-Pin SOT23 Computers (Laptops and Desktops) Servers Industrial and Medical Equipment Storage Area Networks Automotive DESCRIPTION The TMP709 is a fully-integrated, resistorprogrammable temperature switch with a temperature threshold that is set by just one external resistor within its entire operating range. The TMP709 provides an open-drain, active-low output and has a 2.7 V to 5.5 V supply voltage range. The temperature threshold accuracy is typically ±0.5°C with a maximum of ±3°C (+60°C to +100°C). The quiescent current consumption is typically 40 μA. Hysteresis is pin-selectable to 2°C or 10°C. The TMP709 is available in a 5-pin SOT23 package. TYPICAL APPLICATION 150 W 0.1 mF 2.7 V to 5.5 V 470 kW VCC VCC OT TMP709 Microprocessor SET GND HYST GND RSET 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011–2012, Texas Instruments Incorporated TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION (1) (1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING TMP709 SOT23-5 DBV SBJ ORDERING NUMBER TMP709AIDBVR TMP709AIDBVT For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Supply voltage range (VCC) Input voltage range (SET and HYST) Output voltage range (OT) Input current Output current TMP709 UNIT –0.3 to 6 V –0.3 to (VCC + 0.3) V –0.3 to 6 V 20 mA 20 mA Operating temperature, TA –40 to +125 °C Storage temperature, Tstg –65 to +150 °C Junction temperature, TJ ESD ratings (1) +150 °C Human body model (HBM) 4000 V Charged device model (CDM) 1000 V Machine model (MM) 200 V Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. THERMAL INFORMATION TMP709 THERMAL METRIC (1) DBV (SOT23) UNITS 5 PINS θJA Junction-to-ambient thermal resistance 217.9 θJCtop Junction-to-case (top) thermal resistance 86.3 θJB Junction-to-board thermal resistance 44.6 ψJT Junction-to-top characterization parameter 4.4 ψJB Junction-to-board characterization parameter 43.8 θJCbot Junction-to-case (bottom) thermal resistance N/A (1) 2 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TMP709 TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS At TA = 0°C to +125°C and VCC = 2.7 V to 5.5 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY VCC ICC Supply voltage range Supply current 5.5 V VCC = 5 V 2.7 40 55 µA VCC = 2.7 V 40 55 µA ±3 °C +125 °C TEMPERATURE TE Temperature error TA Operating temperature range ±0.5 TA = +60°C to +100°C –40 DIGITAL INPUT (HYST) VIH High-level input voltage VIL Low-level input voltage CIN Input capacitance 0.7 × VCC V 0.3 × VCC 10 V pF ANALOG INPUT (SET) VIN Input voltage range Ilkg_in Input leakage current 0 VCC V 1 µA 12 mA 1 µA DIGITAL OPEN-DRAIN OUTPUT (OT) I(OT_SINK) Output sink current VOT = 0.3 V Ilkg(OT) Output leakage current VOT = VCC 5 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TMP709 3 TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com PIN CONFIGURATION DBV PACKAGE SOT23-5 (TOP VIEW) SET 1 GND 2 OT 3 5 VCC 4 HYST PIN DESCRIPTIONS PIN 4 NAME NO. I/O TYPE DESCRIPTION GND 2 Power Analog Device ground HYST 4 Input Digital Hysteresis selection. For 10°C, HYST = VCC; for 2°C, HYST = GND. OT 3 Output Digital Open-drain, active low output SET 1 Input Analog Temperature set point. Connect an external 1% resistor between SET and GND. VCC 5 Power Analog Power-supply voltage (2.7 V to 5.5 V) Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TMP709 TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C and VCC = 2.7 V to 5.5 V, unless otherwise noted. SUPPLY CURRENT vs TEMPERATURE RSET vs TRIP TEMPERATURE 48 100 VCC = 5 V VCC = 2.7 V 90 80 44 70 RSET (kW) Supply Current (mA) 46 42 40 60 50 40 30 38 20 36 10 RSET = 0 W 34 0 0 20 40 60 80 100 120 140 0 40 60 80 Trip Temperature (°C) Figure 1. Figure 2. HYSTERESIS vs TRIP TEMPERATURE 1.5 12 1 10 8 10°C Hysteresis 2°C Hysteresis 6 100 120 140 TEMPERATURE ERROR vs TRIP TEMPERATURE 14 4 Temperature Error (°C) Hysteresis (°C) 20 Temperature (°C) 0.5 0 -0.5 -1 2 0 -1.5 0 20 40 60 80 100 120 140 0 Trip Temperature (°C) 20 40 60 80 100 120 140 Trip Temperature (°C) Figure 3. Figure 4. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TMP709 5 TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com THEORY OF OPERATION DEVICE DESCRIPTION The TMP709 is a fully-integrated, resistor-programmable temperature switch that incorporates two temperature-dependent voltage references and one comparator. One voltage reference exhibits a positive temperature coefficient (tempco), and the other voltage reference exhibits a negative tempco. The temperature at which both voltage references are equal determines the temperature trip point. The TMP709 temperature threshold is programmable from 0°C to +125°C and is set by an external 1% resistor from the SET pin to the GND pin. The TMP709 has an open-drain, active-low output structure that can easily interface with a microprocessor. HYSTERESIS INPUT The HYST pin is a digital input that allows the input hysteresis to be set at either 10°C (when HYST = VCC) or 2°C (when HYST = GND). The hysteresis function keeps the OT pin from oscillating when the temperature is near the threshold. Thus, the HYST pin should always be connected to either VCC or GND. Other input voltages on this pin may cause abnormal supply currents and/or function. CIRCUIT DETAILS Figure 5 shows the comparator, the NFET open-drain device connected to the OT pin, the positive tempco reference using the external RSET resistor, the negative tempco reference, and the hysteresis control. The voltage of the positive tempco reference is controlled by external resistor RSET. +2.7 V to +5.5 V VCC HYST SET Hysteresis Control RPULLUP Positive Tempco Reference OT RSET Negative Tempco Reference TMP709 GND Figure 5. Circuit Details The TMP709 reaches the temperature trip point when the voltage from the positive tempco reference is greater than the voltage from the negative tempco reference. This situation causes the output of the comparator to switch from logic 0 to logic 1. The comparator output drives the gate of the NFET open-drain device and pulls the voltage on the OT pin from logic 1 to logic 0 under these conditions (output trips). Furthermore, the logic 1 output from the comparator causes the hysteresis control to increase the voltage of the positive tempco reference by an amount set by the logic setting on the HYST pin (10°C for logic 1 on the HYST pin; 2°C for logic 0 on the HYST pin). Increasing the voltage of the positive tempco reference after the TMP709 trips stops the TMP709 from untripping (voltage on the OT pin changing from logic 0 to logic 1) until the local temperature has been reduced by the amount set by the HYST pin. After the local temperature has been reduced and the voltage from the positive tempco reference is less than the voltage from the negative tempco reference, the output of the comparator switches from logic 1 to logic 0. This condition causes the voltage on the OT pin to change from logic 0 to logic 1 (device untrips). 6 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TMP709 TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com APPLICATION INFORMATION SET-POINT RESISTOR (RSET) The temperature threshold is set by connecting RSET from the SET pin to GND. The value of RSET can be determined using either Figure 2 or from Equation 1: RSET (kΩ) = 0.0012T2 – 0.9308T + 96.147 Where T = temperature threshold in degree Celsius. (1) THERMAL CONSIDERATIONS The TMP709 quiescent current is typically 40 μA. The device dissipates negligible power when the output drives a high-impedance load. Thus, the die temperature is the same as the package temperature. In order to maintain accurate temperature monitoring, a good thermal contact should be provided between the TMP709 package and the device being monitored. The rise in die temperature as a result of self-heating is given by the following equation: ΔTJ = PDISS × θJA Where: PDISS = power dissipated by the device. θJA = package thermal resistance. Typical thermal resistance for SOT-23 package is 217.9°C/W. (2) To minimize the effects of self-heating, keep the output current at a minimum level. POWER-SUPPLY FILTERING Any significant noise on the VCC pin may result in a trip-point error. This noise can be minimized levels by low-pass filtering the device supply (VCC) using a 150-Ω resistor and a 0.1-μF capacitor. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TMP709 7 TMP709 SBOS583A – DECEMBER 2011 – REVISED FEBRUARY 2012 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (December 2011) to Revision A Page • Updated threshold accuracy feature bullet ........................................................................................................................... 1 • Updated threshold accuracy text in second paragraph of Description section ..................................................................... 1 • Updated temperature error parameter in the Electrical Characteristics ............................................................................... 3 8 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TMP709 PACKAGE OPTION ADDENDUM www.ti.com 5-Mar-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TMP709AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP709AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Mar-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TMP709AIDBVR SOT-23 DBV 5 3000 178.0 9.0 TMP709AIDBVT SOT-23 DBV 5 250 178.0 9.0 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.23 3.17 1.37 4.0 8.0 Q3 3.23 3.17 1.37 4.0 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 5-Mar-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TMP709AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TMP709AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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