TPS62600 TPS62601 CSP-6 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 500-mA, 6-MHz SYNCHRONOUS STEP-DOWN CONVERTER IN CHIP SCALE PACKAGING FEATURES 1 • • • Cell Phones, Smart-Phones PDAs, Pocket PCs WLAN and Bluetooth™ Applications DVB-H Tuner Applications Portable Hard Disk Drives DC/DC Micro Modules TPS 6260x VIN 2.2 mF The TPS6260x operates at a regulated 6-MHz switching frequency and enters the power-save mode operation at light load currents to maintain high efficiency over the entire load current range. The PFM mode extends the battery life by reducing the quiescent current to 30µA (typ) during light load and standby operation. For noise-sensitive applications, the device can be forced into fixed frequency PWM mode by pulling the MODE pin high. In the shutdown mode, the current consumption is reduced to less than 1µA. EN GND 90 FB MODE 200 VI = 3.6 V, VO = 1.83 V 180 160 80 70 VO SW 0.47 mH CI With a wide input voltage range of 2.3V to 5.5V, the device supports applications powered by Li-Ion batteries with extended voltage range. Different fixed voltage output versions are available from 1V to 2.5V. 100 L 2.3 V.. 5.5 V VI The TPS6260x device is a high-frequency synchronous step-down dc-dc converter optimized for battery-powered portable applications. Intended for low-power applications, the TPS6260x supports up to 500mA load current, and allows the use of low cost chip inductor and capacitors. The TPS6260x is available in an 6-pin chip-scale package (CSP). APPLICATIONS • • • • • • DESCRIPTION 1.8 V/ 500 mA Figure 1. Smallest Solution Size Application (Fixed Output Voltage) 140 120 60 100 50 40 Power Loss PFM/PWM Operation 80 60 30 40 20 CO 4.7 mF Efficiency PFM/PWM Operation 10 0 0.1 Power Loss - mW • 89% Efficiency at 6MHz Operation Output Current Up to 500mA Wide VIN Range From 2.3V to 5.5V 6MHz Regulated Frequency Operation Best in Class Load and Line Transient ±1.5% Total DC Voltage Accuracy Automatic PFM/PWM Mode Switching 30µA Quiescent Current 35ns Minimum On-Time Internal Soft Start, <200-µs Start-Up Time Current Overload and Thermal Shutdown Protection Three Surface-Mount External Components Required (One MLCC Inductor, Two Ceramic Capacitors) Complete Sub 1-mm Component Profile Solution Total Solution Size <13 mm2 Available in a 6-Pin NanoFree™ (CSP) Packaging Efficiency - % • • • • • • • • • • • 23 L = 0.5 mH (Aircoil), CO = 4.7 mF 1 10 100 IO - Load Current - mA 20 0 1000 Figure 2. Efficiency vs Load Current 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. Bluetooth is a trademark of Bluetooth SIG, Inc. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) TA -40°C to 85°C (1) (2) (3) PART NUMBER OUTPUT VOLTAGE TPS62600 1.83V TPS62601 1.8V PACKAGE MARKING CHIP CODE ORDERING (2) (3) PACKAGE YFF-6 TPS62600YFF G9 TPS62601YFF GA For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. The YFF package is available in tape and reel. Add a R suffix (TPS62600YFFR) to order quantities of 3000 parts. Add a T suffix (TPS62600YFFT) to order quantities of 250 parts. Internal tap points are available to facilitate output voltages in 25mV increments. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT Voltage at VIN, SW (2) -0.3 V to 7 V Voltage at FB (2) VI Voltage at EN, MODE -0.3 V to 3.6 V (2) -0.3 V to VI + 0.3 V Power dissipation Internally limited TA Operating temperature range (3) TJ (max) Maximum operating junction temperature Tstg Storage temperature range -40°C to 85°C 150°C -65°C to 150°C Human body model ESD rating (4) 2 kV Charge device model 1 kV Machine model (1) (2) (3) (4) 200 V Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)), the maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA(max)= TJ(max)–(θJA X PD(max)). The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF capacitor discharged directly into each pin. DISSIPATION RATINGS (1) (1) (2) 2 PACKAGE RθJA (2) RθJB (2) POWER RATING TA ≤ 25°C DERATING FACTOR ABOVE TA = 25°C YFF-6 125°C/W 53°C/W 800mW 8mW/°C Maximum power dissipation is a function of TJ(max), θJA and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = [TJ(max)-TA] / θJA. This thermal data is measured with high-K board (4 layers board according to JESD51-7 JEDEC standard). Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 ELECTRICAL CHARACTERISTICS VI = 3.6V, VO = 1.83V, EN = 1.8 V, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VI Input voltage range 2.3 IO = 0mA. PFM mode enabled, device not switching 30 6.5 IQ Operating quiescent current IO = 0mA, L = 0.47µH (Aircoil) Forced PWM operation I(SD) Shutdown current EN = GND UVLO Undervoltage lockout threshold 5.5 V 45 µA mA 0.2 1 µA 2.05 2.1 V ENABLE, MODE VIH High-level input voltage VIL Low-level input voltage Ilkg Input leakage current 1 V Input connected to GND or VIN 0.01 VI = V(GS) = 3.6V 310 VI = V(GS) = 2.5V 380 0.4 V 1 µA POWER SWITCH rDS(on) P-channel MOSFET on resistance Ilkg P-channel leakage current, PMOS V(DS) = 5.5V, -40°C ≤ TJ ≤ 85°C mΩ mΩ 1 µA VI = V(GS) = 3.6V 250 mΩ VI = V(GS) = 2.5V 320 mΩ rDS(on) N-channel MOSFET on resistance Ilkg N-channel leakage current, NMOS V(DS) = 5.5V, -40°C ≤ TJ ≤ 85°C P-MOS current limit 2.3V ≤ VI ≤ 5.5V. Open loop Input current limit under short-circuit conditions VO = 0 , L = 0.47µH 900 Thermal shutdown Thermal shutdown hysteresis 1000 2 µA 1100 mA 30 mA 140 °C 10 °C OSCILLATOR fSW Oscillator frequency TPS62600 TPS62601 IO = 0mA, L = 0.47µH. Forced PWM operation 5.4 6 6.6 MHz 2.5V ≤ VI ≤ 5.5V, 0mA ≤ IO ≤ 500mA PFM/PWM operation 0.985×VNOM VNOM 1.025×VNOM V 2.5V ≤ VI ≤ 5.5V, 0 mA ≤ IO ≤ 500mA PWM operation 0.985×VNOM VNOM 1.015×VNOM V OUTPUT Regulated DC output voltage V(OUT) TPS62600 TPS62601 Line regulation VI = VO + 0.5V (min 2.3V) to 5.5V, IO = 200mA Load regulation IO = 0mA to 500mA Feedback input resistance ton(MIN) Minimum on-time (P-channel MOSFET) ΔVO Power-save mode ripple voltage Start-up time TPS62600 TPS62601 IO = 1mA IO = 0mA, Time from active EN to VO 0.25 -0.0003 460 kΩ 35 ns 0.015×VNOM VPP 180 µs Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 %/V %/mA 3 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com PIN ASSIGNMENTS TPS6260x CSP-6 (TOP VIEW) TPS6260x CSP-6 (BOTTOM VIEW) MODE A1 A2 VIN VIN A2 A1 MODE SW B1 B2 EN EN B2 B1 SW C2 GND GND C2 C1 FB FB C1 TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. FB C1 I Output feedback sense input. Connect FB to the converter’s output. VIN A2 I Power supply input. SW B1 I/O EN B2 I This is the switch pin of the converter and is connected to the drain of the internal Power MOSFETs. This is the enable pin of the device. Connecting this pin to ground forces the device into shutdown mode. Pulling this pin to VI enables the device. This pin must not be left floating and must be terminated. This is the mode selection pin of the device. This pin must not be left floating and must be terminated. MODE A1 I MODE = LOW: The device is operating in fixed frequency pulse width modulation mode (PWM) at high-load currents and in pulse frequency modulation mode (PFM) at light load currents. MODE = HIGH: Low-noise mode enabled, fixed frequency PWM operation forced. GND C2 – Ground pin. FUNCTIONAL BLOCK DIAGRAM MODE VIN Undervoltage Lockout Bias Supply Bandgap EN Soft-Start V REF = 0.8 V VIN Negative Inductor Current Detect Power Save Mode Switching Logic Thermal Shutdown Current Limit Detect Frequency Control R1 FB Gate Driver R2 Anti Shoot-Through VREF SW + GND 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 PARAMETER MEASUREMENT INFORMATION TPS6260x L VIN SW EN FB VO 1.8 V/500 mA 0.47 mH 2.3 V .. 5.5 V VI CI 2.2 mF CO 4.7 mF GND MODE List of components: • L = MURATA LQM21PN1R0NGR • CI = MURATA GRM155R60J225ME15 (2.2µF, 6.3V, 0402, X5R) • CO = MURATA GRM155R60G475ME47 (4.7µF, 4V, 0402, X5R) Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 5 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS Table of Graphs FIGURE Efficiency 3, 4, 5 vs Input voltage 6 Combined line/load transient response 7, 8 9, 10, 11, 12 13, 14, 15, 16 Load transient response VO DC output voltage vs Load current 17 IQ No load quiescent current vs Input voltage 18 fs Switching frequency vs Temperature 19 P-channel MOSFET rDS(on) vs Input voltage 20 N-channel MOSFET rDS(on) vs Input voltage 21 rDS(on) PWM operation 22 Power-save mode operation 23 Start-up 24 EFFICIENCY vs LOAD CURRENT 100 EFFICIENCY vs LOAD CURRENT 100 VI = 2.7 V PFM/PWM Operation VO = 1.83 V 90 90 80 60 50 VI = 4.2 V PFM/PWM Operation 40 VI = 3.6 V Forced PWM Operation 30 20 L = 0.47 mH, CO = 4.7 mF 10 0 0.1 1 160 70 VI = 3.6 V PFM/PWM Operation 10 100 IO - Load Current - mA Efficiency - % Efficiency - % 180 80 70 60 120 100 50 Power Loss PFM/PWM Operation 40 80 30 60 20 40 L = 0.47 mH, CO = 4.7 mF 10 1000 140 Efficiency PFM/PWM Operation 0 0.1 1 Figure 3. 6 200 VI = 3.6 V, VO = 1.83 V 10 100 IO - Load Current - mA Power Loss - mW η vs Load current 20 0 1000 Figure 4. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 EFFICIENCY vs LOAD CURRENT EFFICIENCY vs INPUT VOLTAGE 100 100 VO = 1.2 V 90 90 80 80 70 70 VI = 3.6 V PFM/PWM Operation 60 50 Efficiency - % Efficiency - % IO = 300 mA IO = 100 mA VI = 2.7 V PFM/PWM Operation VI = 4.2 V PFM/PWM Operation 40 30 IO = 1 mA 60 50 40 30 20 20 L = 0.47 mH, CO = 4.7 mF 10 0 0.1 1 10 100 IO - Load Current - mA L = 0.47 mH, CO = 4.7 mF 10 1000 0 2.3 2.7 3.1 VO = 1.83 V, PFM/PWM Operation 3.5 3.9 4.3 4.7 VI - Input Voltage - V 5.1 5.5 Figure 5. Figure 6. COMBINED LINE/LOAD TRANSIENT RESPONSE COMBINED LINE/LOAD TRANSIENT RESPONSE VI = 500 mV/div - 3.3 V Offset IO = 200 mA/div VI = 500 mV/div - 3.3 V Offset IO = 200 mA/div VO = 20 mV/div - 1.83 V Offset VO = 20 mV/div - 1.83 V Offset t - Time - 5 ms/div t - Time - 5 ms/div Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 7 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com MODE = Low, L = 0.47 mH, CO = 4.7 mF IO = 0 to 150 mA load step IO = 100 mA/div VI = 3.6 V, VO = 1.83 V IO = 0 to 150 mA load step Figure 9. Figure 10. LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VI = 3.6 V, VO = 1.83 V IO = 150 to 0 mA load step MODE = Low, L = 0.47 mH, CO = 4.7 mF IO = 200 mA/div t - Time - 2.5 ms/div VI = 3.6 V, VO = 1.83 V PFM Operation MODE = Low, L = 0.47 mH, IO = 50 to 350 mA load step CO = 4.7 mF t - Time - 10 ms/div t - Time - 1 ms/div Figure 11. 8 MODE = Low, L = 0.47 mH, CO = 4.7 mF t - Time - 10 ms/div VO = 20 mV/div - 1.83 V Offset VO = 20 mV/div - 1.83 V Offset LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VO = 20 mV/div - 1.83 V Offset VI = 3.6 V, VO = 1.83 V IO = 100 mA/div VO = 20 mV/div - 1.83 V Offset IO = 100 mA/div LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION Figure 12. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 IO = 50 to 350 mA load step MODE = Low, L = 0.47 mH, CO = 4.7 mF IO = 200 mA/div VI = 3.6 V, VO = 1.83 V LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VO = 20 mV/div - 1.83 V Offset VO = 20 mV/div - 1.83 V Offset IO = 200 mA/div LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VI = 3.6 V, VO = 1.83 V IO = 350 to 50 mA load step MODE = Low, L = 0.47 mH, CO = 4.7 mF t - Time - 2.5 ms/div LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION IO = 150 to 500 mA load step MODE = Low, L = 0.47 mH, CO = 4.7 mF VO = 20 mV/div - 1.83 V Offset VI = 3.6 V, VO = 1.83 V IO = 200 mA/div Figure 14. IO = 200 mA/div VO = 20 mV/div - 1.83 V Offset t - Time - 2.5 ms/div Figure 13. VI = 3.6 V, VO = 1.83 V IO = 500 to 150 mA load step MODE = Low, L = 0.47 mH, CO = 4.7 mF t - Time - 1 ms/div t - Time - 1 ms/div Figure 15. Figure 16. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 9 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com OUTPUT VOLTAGE vs LOAD CURRENT QUIESCENT CURRENT vs INPUT VOLTAGE 1.885 45 VI = 3.6 V, VO = 1.83 V, 40 TA = 85°C L = 0.47 mH IQ − Quiescent Current − mA VO - Output Voltage - V 1.867 1.848 PFM/PWM Operation 1.830 PWM Operation 1.812 35 TA = 25°C 30 25 20 15 TA = -40°C 10 1.793 5 1.775 0.1 10 100 IO - Load Current - mA Figure 18. SWITCHING FREQUENCY vs INPUT VOLTAGE P-CHANNEL rDS(ON) vs INPUT VOLTAGE IO = 0 mA VO = 1.83 V fS - Switching Frequency - MHz IO = 500 mA 5.5 4.5 4 VI - Input Voltage - V Figure 17. 6 5 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 1000 IO = 400 mA IO = 250 mA IO = 150 mA IO = 50 mA 3.5 3 MODE = High L = 0.47 mH, CO = 4.7 mF 2.5 2 1.5 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 rDS(on) − Static Drain-Source On-Resistance − mW 6.5 0 1 400 375 350 325 TA = 25°C 300 275 250 225 200 175 150 TA = -40°C 125 100 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 VI - Input Voltage - V Figure 19. 10 TA = 85°C VI - Input Voltage - V Figure 20. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 PWM OPERATION 335 310 TA = 85°C 285 260 VI = 3.6 V, VO = 1.83 V, IO = 200 mA TA = 25°C 235 210 185 160 135 MODE = Low, L = 0.47 mH, CO = 4.7 mF TA = -40°C 110 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 VO = 10 mV/div - 1.83 V Offset IL = 100 mA/div 360 SW = 2 V/div rDS(on) − Static Drain-Source On-Resistance − mW N-CHANNEL rDS(ON) vs INPUT VOLTAGE t - Time - 62.5 ns/div Figure 22. POWER-SAVE MODE OPERATION START-UP EN = 2 V/div Figure 21. VI = 3.6 V, VO = 1.83 V, IO = 0 mA MODE = Low, L = 0.47 mH, CO = 4.7 mF IL = 100 mA/div VO = 1 V/div VI = 3.6 V, VO = 1.83 V, IO = 25 mA VO = 20 mV/div - 1.83 V Offset IL = 100 mA/div VI - Input Voltage - V MODE = Low, L = 0.47 mH, CO = 4.7 mF t - Time - 500 ns/div Figure 23. t - Time - 50 ms/div Figure 24. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 11 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com DETAILED DESCRIPTION OPERATION The TPS6260x is a synchronous step-down converter typically operates at a regulated 6-MHz frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents, the TPS6260x converter operates in power-save mode with pulse frequency modulation (PFM). The converter uses a unique frequency locked ring oscillating modulator to achieve best-in-class load and line response and allows the use of tiny inductors and small ceramic input and output capacitors. At the beginning of each switching cycle, the P-channel MOSFET switch is turned on and the inductor current ramps up rising the output voltage until the main comparator trips, then the control logic turns off the switch. One key advantage of the non-linear architecture is that there is no traditional feed-back loop. The loop response to change in VO is essentially instantaneous, which explains the transient response. The absence of a traditional, high-gain compensated linear loop means that the TPS6260x is inherently stable over a range of L and CO. The device integrates two current limits, one in the P-channel MOSFET and another one in the N-channel MOSFET. When the current in the P-channel MOSFET reaches its current limit, the P-channel MOSFET is turned off and the N-channel MOSFET is turned on. When the current in the N-channel MOSFET is above the N-MOS current limit threshold, the N-channel MOSFET remains on until the current drops below its current limit. The current limit in the N-channel MOSFET is important for small duty-cycle operation when the current in the inductor does not decrease because of the P-channel MOSFET current limit delay, or because of start-up conditions where the output voltage is low. SWITCHING FREQUENCY The magnitude of the internal ramp, which is generated from the duty cycle, reduces for duty cycles either set of 50%. Thus, there is less overdrive on the main comparator inputs which tends to slow the conversion down. The intrinsic maximum operating frequency of the converter is about 10MHz to 12MHz, which is controlled to circa. 6MHz by a frequency locked loop. When high or low duty cycles are encountered, the loop runs out of range and the conversion frequency falls below 6MHz. The tendency is for the converter to operate more towards a "constant inductor peak current" rather than a "constant frequency". In addition to this behavior which is observed at high duty cycles, it is also noted at low duty cycles. When the converter is required to operate towards the 6MHz nominal at extreme duty cycles, the application can be assisted by decreasing the ratio of inductance (L) to the output capacitor's equivalent serial inductance (ESL). This increases the ESL step seen at the main comparator's feed-back input thus decreasing its propagation delay, hence increasing the switching frequency. POWER-SAVE MODE With decreasing load current, the device automatically switches into pulse skipping operation in which the power stage operates intermittently based on load demand. By running cycles periodically, the switching losses are minimized, and the device runs with a minimum quiescent current and maintaining high efficiency. The converter positions the dc output voltage approximately 0.5% above the nominal output voltage under light load conditions. This voltage positioning feature minimizes voltage drops caused by a sudden load step. When in power-save mode, the converter resumes its operation when the output voltage trips below the nominal voltage. It ramps up the output voltage with a minimum of three pulses and goes into power-save mode when the inductor current has returned to a zero steady state. As a consequence of the dynamic voltage positioning in the power-save mode, the average output voltage is slightly higher than its nominal value in PWM mode. For a load transient from light load to heavy load, the logic returns the regulated output voltage to nominal after 64 continuous cycles. 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 The output current at which the PFM/PWM transition occurs is approximated by Equation 1: V V *V I O I + O PFMńPWM V 2 L f sw I • IPFM/PWM : output current at which PFM/PWM transition occurs • fSW : switching frequency (6-MHz typical) • L : inductor value (1) PFM Mode at Light Load PFM Ripple Comp Low Threshold = VONOM PWM Mode at Heavy Load Figure 25. Operation in PFM Mode and Transfer to PWM Mode MODE SELECTION The MODE pin allows to select the operating mode of the device. Connecting this pin to GND enables the automatic PWM and power-save mode operation. The converter operates in fixed frequency PWM mode at moderate to heavy loads and in the PFM mode during light loads, which maintains high efficiency over a wide load current range. Pulling the MODE pin high forces the converter to operate in the PWM mode even at light load currents. The advantage is that the converter operates with a fixed frequency that allows simple filtering of the switching frequency for noise-sensitive applications. In this mode, the efficiency is lower compared to the power-save mode during light loads. For additional flexibility, it is possible to switch from power-save mode to forced PWM mode during operation. This allows efficient power management by adjusting the operation of the converter to the specific system requirements. ENABLE The device starts operation when EN is set high and starts up with the soft start as previously described. Pulling the EN pin low forces the device into shutdown, with a shutdown quiescent current of typically 0.1µA. In this mode, the P and N-channel MOSFETs are turned off, the internal resistor feedback divider is disconnected, and the entire internal-control circuitry is switched off. For proper operation, the EN pin must be terminated and must not be left floating. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 13 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com SOFT START The TPS6260x has an internal soft-start circuit that limits the inrush current during start-up. This limits input voltage drops when a battery or a high-impedance power source is connected to the input of the converter. The soft-start system progressively increases the on-time from a minimum pulse-width of 30ns as a function of the output voltage. This mode of operation continues for c.a. 180µs after enable. Should the output voltage not have reached its target value by this time, such as in the case of heavy load, the soft-start transitions to a second mode of operation. The converter then operates in a current limit mode, specifically the P-MOS current limit is set to half the nominal limit, and the N-channel MOSET remains on until the inductor current has reset. After a further 100 µs, the device ramps up to the full current limit operation if the output voltage has risen above 0.7V (approximately). Therefore, the start-up time mainly depends on the output capacitor and load current. UNDERVOLTAGE LOCKOUT The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the converter from turning on the switch or rectifier MOSFET under undefined conditions. The TPS6260x device have a UVLO threshold set to 2.05V (typical). Fully functional operation is permitted down to 2.1V input voltage. SHORT-CIRCUIT PROTECTION As soon as the output voltage falls below 0.7V (approximately), the converter current limit is reduced to half of the nominal value. Because the short-circuit protection is enabled during start-up, the device does not deliver more than half of its nominal current limit until the output voltage exceeds 0.7V (approximately). This needs to be considered when a load acting as a current sink is connected to the output of the converter. THERMAL SHUTDOWN As soon as the junction temperature, TJ, exceeds typically 140°C, the device goes into thermal shutdown. In this mode, the P- and N-channel MOSFETs are turned off. The device continues its operation when the junction temperature again falls below typically 130°C. 14 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 APPLICATION INFORMATION INDUCTOR SELECTION The TPS6260x series of step-down converters have been designed to operate with an effective inductance value in the range of 0.3µH to 1.3µH and with output capacitors in the range of 4.7µF to 10µF. The internal compensation is optimized to operate with an output filter of L = 0.47µH and CO = 4.7µF. Larger or smaller inductor values can be used to optimize the performance of the device for specific operation conditions. For more details, see the CHECKING LOOP STABILITY section. The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage ripple and the efficiency. The selected inductor has to be rated for its dc resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI or VO. V V *V DI I O DI + O DI +I ) L L L(MAX) O(MAX) 2 V L ƒ sw I (2) with: fSW = switching frequency (6 MHz typical) L = inductor value ΔIL = peak-to-peak inductor ripple current IL(MAX) = maximum inductor current In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e. quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current. The total losses of the coil consist of both the losses in the DC resistance (R(DC)) and the following frequency-dependent components: • The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies) • Additional losses in the conductor from the skin effect (current displacement at high frequencies) • Magnetic field losses of the neighboring windings (proximity effect) • Radiation losses The following inductor series from different suppliers have been used with the TPS6260x converters. Table 1. List of Inductors MANUFACTURER MURATA HITACHI METALS TOKO SERIES DIMENSIONS LQM21P_J0 2.0 x 1.2 x 1.0 max. height LQM21P_C0 2.0 x 1.2 x 0.55 max. height HSLI-201210AG-R47 2.0 x 1.2 x 1.0 max. height HSLI-201210SW-R85 2.0 x 1.2 x 1.0 max. height JSLI-201610AG-R70 2.0 x 1.6 x 1.0 max. height MDT2012-CX1R0-R 2.0 x 1.2 x 1.0 max. height Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 15 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com OUTPUT CAPACITOR SELECTION The advanced fast-response voltage mode control scheme of the TPS6260x allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage step caused by the output capacitor ESL and the ripple current flowing through the output capacitor impedance. At light loads, the device operates in power-save mode and the output voltage ripple is independent of the output capacitor value. The output voltage ripple is set by the internal comparator thresholds and propagation delays. The typical output voltage ripple is 1.5% of the nominal output voltage VO. INPUT CAPACITOR SELECTION Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is required to prevent large voltage transients that can cause misbehavior of the device or interferences with other circuits in the system. For most applications, a 2.2-µF capacitor is sufficient. Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even damage the part. Additional "bulk" capacitance (electrolytic or tantalum) should in this circumstance be placed between CI and the power source lead to reduce ringing than can occur between the inductance of the power source leads and CI. CHECKING LOOP STABILITY The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals: • Switching node, SW • Inductor current, IL • Output ripple voltage, VO(AC) These are the basic signals that need to be measured when evaluating a switching converter. When the switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be unstable. This is often a result of board layout and/or L-C combination. As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between the application of the load transient and the turn on of the P-channel MOSFET, the output capacitor must supply all of the current required by the load. VO immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR is the effective series resistance of CO. ΔI(LOAD) begins to charge or discharge CO generating a feedback error signal used by the regulator to return VO to its steady-state value. The results are most easily interpreted when the device operates in PWM mode. During this recovery time, VO can be monitored for settling time, overshoot or ringing that helps judge the converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin. Because the damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET rDS(on)) that are temperature dependant, the loop stability analysis has to be done over the input voltage range, load current range, and temperature range. 16 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 TPS62600 TPS62601 www.ti.com ...................................................................................................................................................................................................... SLVS678 – JUNE 2008 LAYOUT CONSIDERATIONS As for all switching power supplies, the layout is an important step in the design. High-speed operation of the TPS6260x devices demand careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation, stability and switching frequency issues as well as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. In order to get an optimum ESL step, the output voltage feedback point (FB) should be taken in the output capacitor path, approximately 1mm away for it. The feed-back line should be routed away from noisy components and traces (e.g. SW line). MODE L VIN CI ENABLE CO GND VOUT Figure 26. Suggested Layout (Top) Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 17 TPS62600 TPS62601 SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependant issues such as thermal coupling, airflow, added heat sinks, and convection surfaces, and the presence of other heat-generating components, affect the power-dissipation limits of a given component Three basic approaches for enhancing thermal performance are listed below: • Improving the power dissipation capability of the PCB design • Improving the thermal coupling of the component to the PCB • Introducing airflow in the system The maximum recommended junction temperature (TJ) of the TPS6260x devices is 125°C. The thermal resistance of the 6-pin CSP package (YFF-6) is RθJA = 125°C/W. Regulator operation is specified to a maximum ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 320 mW. TJ(MAX) - TA 125°C - 85°C PD(MAX) = = = 320mW RqJA 125°C/W (3) PACKAGE SUMMARY CHIP SCALE PACKAGE (BOTTOM VIEW) D A2 A1 B2 B1 CHIP SCALE PACKAGE (TOP VIEW) YMSCC LLLL A1 C2 C1 Code: E • YM — Year Month date Code • S — Assembly site code • CC— Chip code • LLLL — Lot trace code CHIP SCALE PACKAGE DIMENSIONS The TPS6260x device is available in an 6-bump chip scale package (YFF, NanoFree™). The package dimensions are given as: • D = 1.290 ±0.05 mm • E = 0.916 ±0.05 mm 18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS62600 TPS62601 PACKAGE OPTION ADDENDUM www.ti.com 30-Jun-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS62600YFFR ACTIVE DSBGA YFF 6 3000 Green (RoHS & no Sb/Br) SnAgCu Level-1-260C-UNLIM TPS62600YFFT ACTIVE DSBGA YFF 6 250 Green (RoHS & no Sb/Br) SnAgCu Level-1-260C-UNLIM TPS62601YFFR ACTIVE DSBGA YFF 6 3000 Green (RoHS & no Sb/Br) SnAgCu Level-1-260C-UNLIM TPS62601YFFT ACTIVE DSBGA YFF 6 250 SnAgCu Level-1-260C-UNLIM Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID RF/IF and ZigBee® Solutions amplifier.ti.com dataconverter.ti.com dsp.ti.com www.ti.com/clocks interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com www.ti-rfid.com www.ti.com/lprf Applications Audio Automotive Broadband Digital Control Medical Military Optical Networking Security Telephony Video & Imaging Wireless www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/medical www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2008, Texas Instruments Incorporated