TCA4311A www.ti.com SCPS226 – JANUARY 2011 HOT SWAPPABLE 2-WIRE BUS BUFFERS Check for Samples: TCA4311A FEATURES 1 • • • • • • • Operating Power-Supply Voltage Range of 2.7-V to 5.5-V Supports Bidirectional Data Transfer of I2C Bus Signals SDA and SCL Lines Are Buffered Which Increases Fanout 1-V Precharge on All SDA and SCL Lines Prevents Corruption During Live Board Insertion and Removal From Backplane SDA and SCL Input Lines Are Isolated From Outputs Accommodates Standard Mode and Fast Mode I2C Devices Improved Noise Immunity • • • • • • • • Applications Include Hot Board Insertion and Bus Extension Low ICC Chip Disable of <1 mA READY Open-Drain Output Supports Clock Stretching, Arbitration, and Synchronization Powered-Off High-Impedance I2C Pins Open-Drain I2C Pins Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 8000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) D OR DGK PACKAGES (TOP VIEW) EN SCLOUT SCLIN GND 1 2 3 4 8 7 6 5 VCC SDAOUT SDAIN READY DESCRIPTION/ORDERING INFORMATION The TCA4311A is a hot swappable I2C bus buffer that supports I/O card insertion into a live backplane without corruption of the data and clock busses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, this device provides bidirectional buffering, keeping the backplane and card capacitances isolated. During insertion, the SDA and SCL lines are precharged to 1 V to minimize the current required to charge the parasitic capacitance of the chip. When the I2C bus is idle, the TCA4311A can be put into shutdown mode by setting the EN pin low. When EN is high, the TCA4311A resumes normal operation. It also includes an open drain READY output pin, which indicates that the backplane and card sides are connected together. When READY is high, the SDAIN and SCLIN are connected to SDAOUT and SCLOUT. When the two sides are disconnected, READY is low. Both the backplane and card may be powered with supply voltages ranging from 2.7 V to 5.5 V, with no restrictions on which supply voltage is higher. The TCA4311A has standard open-drain I/Os. The size of the pullup resistors to the I/Os depends on the system, but each side of this buffer must have a pullup resistor. The device is designed to work with Standard Mode and Fast Mode I2C devices in addition to SMBus devices. Standard Mode I2C devices only specify 3 mA in a generic I2C system where Standard Mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TCA4311A SCPS226 – JANUARY 2011 www.ti.com Table 1. ORDERING INFORMATION PACKAGE (1) TA SOIC – D –40°C to 85°C MSOP – DGK (1) (2) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube TCA4311AD PREVIEW Tape and reel TCA4311ADR PREVIEW Tape and reel TCA4311ADGKR 6KS Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. TERMINAL FUNCTIONS SOIC (D) OR MSOP (DGK) PACKAGE 2 DESCRIPTION PIN NUMBER NAME 1 EN 2 SCLOUT 3 SCLIN 4 GND 5 READY Connection flag/rise-time accelerator control. READY is low when either EN is low or the start-up sequence described in the operation section has not been completed. READY goes high when EN is high and start-up is complete. Connect a 10-kΩ resistor from this pin to VCC to provide the pull up. 6 SDAIN Serial data input. Connect this pin to the SDA bus on the backplane. 7 SDAOUT 8 VCC Active-high chip enable pin. If EN is low, the TCA4311A is in a low current (<1 mA) mode. It also disables the rise-time accelerators, disables the bus precharge circuitry, drives READY low, isolates SDAIN from SDAOUT and isolates SCLIN from SCLOUT. EN should be high (at VCC) for normal operation. Connect EN to VCC if this feature is not being used. Serial clock output. Connect this pin to the SCL bus on the card. Serial clock input. Connect this pin to the SCL bus on the backplane. Supply ground Serial data output. Connect this pin to the SDA bus on the card. Supply power. Main input power supply from backplane. This is the supply voltage for the devices on the backplane I2C busses. Connect pullup resistors from SDAIN and SCLIN (and also from SDAOUT and SCLOUT) to this pin. Place a bypass capacitor of at least 0.01 mF close to this pin for best results. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A TCA4311A www.ti.com SCPS226 – JANUARY 2011 BLOCK DIAGRAM 2-Wire Bus Buffer and Hot Swap Controller 2 mA 2 mA Slew Rate Dectector Slew Rate Dectector 8 VCC Backplane-To-Card Connection SDAIN 6 CONNECT 74 SDAOUT CONNECT CONNECT ENABLE 100 k RCH1 100 k RCH3 1V Precharge 100 k RCH2 100 k RCH4 2 mA 2 mA Slew Rate Dectector Slew Rate Detector Backplane-To-Card Connection SCLIN 3 2 SCLOUT CONNECT CONNECT + – + + – – Stop Bit and Bus Idle 0.5 µA + 0.55 VCC/ 0.45 VCC UVLO ENABLE 1 VCC – 1 V 5 READY – 20 pF CONNECT 95 µs Delay, Rising Only RD QB S 0.5 pF 4 GND CONNECT Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A 3 TCA4311A SCPS226 – JANUARY 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VCC Supply voltage range 2 (2) MIN MAX –0.5 7 UNIT V V VI/O I C bus voltage range SDAIN, SCLIN, SDAOUT, SCLOUT –0.3 7 VI Input voltage range (2) EN –0.3 7 IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ICC Continuous current through VCC or GND ±100 mA qJA Package thermal impedance (3) Tstg Storage temperature range (1) (2) (3) D package 97 DGK package 172 –65 150 V °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage IOL Low-level output current TA Operating free-air temperature 4 MIN MAX 2.7 5.5 0.7 × VCC 5.5 2 5.5 SDA and SCL inputs –0.5 0.3 × VCC EN input –0.5 0.8 SDA and SCL inputs EN input VCC = 3 V 3 VCC = 4.5 V 3 –40 Submit Documentation Feedback 85 UNIT V V V mA °C Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A TCA4311A www.ti.com SCPS226 – JANUARY 2011 ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Power Supply VCC Positive supply voltage ICC Supply current 2.7 ISD Supply current in shutdown VEN = 0 V mode VCC = 5.5 V, VSDAIN = VSCLIN = 0 V 5.5 5.1 7 0.1 V mA mA Start-Up Circuitry VPRE Precharge voltage tIDLE Bus idle time SDA, SCL floating 0.8 1 1.2 V 50 95 150 ms VEN EN threshold voltage VDIS Disable threshold voltage EN Pin 0.5 × VCC 0.9 × VCC V IEN EN input current EN from 0 V to VCC ±1 mA tEN Enable time 95 ms tDIS Disable time (EN to READY) 30 ns tSTOP SDAIN to READY delay after STOP 1.2 ms tREADY SCLOUT/SDAOUT to READY 0.8 ms IOFF READY OFF state leakage current ±0.1 mA VOL READY output low voltage 0.1 × VCC 0.5 × VCC ±0.1 IPULLUP = 3 mA V 0.4 V Rise-Time Accelerators IPULLUPAC Transient boosted pull-up current Positive transition on SDA, SCL, VCC = 2.7 V, 1 2 10 kΩ to VCC on SDA, SCL, VCC = 3.3 V, (1) 0 100 mA Input-Output Connection VOS Input-output offset voltage CIN Digital input capacitance VOL Output low voltage, input = 0V SDA, SCL pins, ISINK = 3 mA, II Input leakage current SDA, SCL pins = VCC = 5.5 V (1) 0 175 mV 10 pF 0.4 V ±5 mA The connection circuitry always regulates its output to a higher voltage than its input. The magnitude of this offset voltage as a function of the pullup resistor and VCC voltage is shown in the Typical Performance Characteristics section. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A 5 TCA4311A SCPS226 – JANUARY 2011 www.ti.com OPERATION Start-Up When the TCA4311A first receives power on its VCC pin, either during power-up or during live insertion, it starts in an undervoltage lockout (UVLO) state, ignoring any activity on the SDA and SCL pins until VCC rises above 2.5 V. During this time, the 1 V precharge circuitry is also active and forces 1 V through 100-kΩ nominal resistors to the SDA and SCL pins. Because the I/O card is being plugged into a live backplane, the voltage on the backplane SDA and SCL busses may be anywhere between 0 V and VCC. Precharging the SCL and SDA pins to 1 V minimizes the worst-case voltage differential these pins will see at the moment of connection, therefore minimizing the amount of disturbance caused by the I/O card. Once the TCA4311A comes out of UVLO, it assumes that SDAIN and SCLIN have been inserted into a live system and that SDAOUT and SCLOUT are being powered up at the same time as itself. Therefore, it looks for either a stop bit or bus idle condition on the backplane side to indicate the completion of a data transaction. When either one occurs, the part also verifies that both the SDAOUT and SCLOUT voltages are high. When all of these conditions are met, the input-to-output connection circuitry is activated, joining the SDA and SCL busses on the I/O card with those on the backplane, and the rise time accelerators are enabled. Connection Circuitry Once the connection circuitry is activated, the functionality of the SDAIN and SDAOUT pins is identical. A low forced on either pin at any time results in both pin voltages being low. For proper operation, logic low input voltages should be no higher than 0.4 V with respect to the ground pin voltage of the TCA4311A. SDAIN and SDAOUT enter a logic high state only when all devices on both SDAIN and SDAOUT release high. The same is true for SCLIN and SCLOUT. This important feature ensures that clock stretching, clock synchronization, arbitration and the acknowledge protocol always work, regardless of how the devices in the system are tied to the TCA4311A. Another key feature of the connection circuitry is that it provides bidirectional buffering, keeping the backplane and card capacitances isolated. Because of this isolation, the waveforms on the backplane busses look slightly different than the corresponding card bus waveforms, as described here. Input to Output Offset Voltage When a logic low voltage, VLOW1, is driven on any of the TCA4311A's data or clock pins, the TCA4311A regulates the voltage on the other side of the chip (call it VLOW2) to a slightly higher voltage, as directed by the following equation: VLOW2 = VLOW1 + 75 mV + (VCC/R) × 100 where R is the bus pullup resistance in ohms (Ω). For example, if a device is forcing SDAOUT to 10 mV where VCC = 3.3 V and the pullup resistor R on SDAIN is 10 kΩ, then the voltage on SDAIN = 10 + 75 + (3.3/10000) × 100 = 118 mV. See the Typical Performance Characteristics section for curves showing the offset voltage as a function of VCC and R. Propagation Delays During a rising edge, the rise-time on each side is determined by the combined pullup current of the TCA4311A boost current and the bus resistor and the equivalent capacitance on the line. If the pullup currents are the same, a difference in rise-time occurs which is directly proportional to the difference in capacitance between the two sides. This effect is displayed in Figure 1 for VCC = 3.3 V and a 10-kΩ pullup resistor on each side (50 pF on one side and 150 pF on the other). Since the output side has less capacitance than the input, it rises faster and the effective tPLH is negative. There is a finite propagation delay, tPHL, through the connection circuitry for falling waveforms. Figure 2 shows the falling edge waveforms for the same VCC, pullup resistors and equivalent capacitance conditions as used in Figure 1. An external NMOS device pulls down the voltage on the side with 150 pF capacitance; the TCA4311A pulls down the voltage on the opposite side, with a delay of 55 ns. This delay is always positive and is a function of supply voltage, temperature and the pullup resistors and equivalent bus capacitances on both sides of the bus. The Typical Performance Characteristics section shows tPHL as a function of temperature and voltage for 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A TCA4311A www.ti.com SCPS226 – JANUARY 2011 10-kΩ pullup resistors and 100 pF equivalent capacitance on both sides of the part. By comparison with Figure 2, the VCC = 3.3 V curve shows that increasing the capacitance from 50 pF to 100 pF results in a tPHL increase from 55 ns to 75 ns. Larger output capacitances translate to longer delays (up to 150 ns). Users must quantify the difference in propagation times for a rising edge versus a falling edge in their systems and adjust setup and hold times accordingly. 3.5 3.5 3.0 3.0 VXSDAOUT 2.5 2.5 2.0 2.0 (V) (V) Delay: 72.258 1.5 1.0 1.5 1.0 VXSDAIN 0.5 0.5 VXSDAIN VXSDAOUT 0.0 –0.5 52.0 0.0 52.025 52.075 52.1 52.125 52.15 52.175 –0.5 54.0 54.2 t (s) 54.4 54.6 54.8 55.0 55.2 55.4 55.6 55.8 56.0 t (s) Figure 1. Input-Output Connection tPLH Figure 2. Input-Output Connection tPHL Rise-Time Accelerators Once connection has been established, rise-time accelerator circuits on all four SDA and SCL pins are activated. These allow the user to choose weaker DC pullup currents on the bus, reducing power consumption while still meeting system rise-time requirements. During positive bus transitions, the TCA4311A switches in 2 mA (typical) of current to quickly slew the SDA and SCL lines once their DC voltages exceed 0.6 V. Using a general rule of 20 pF of capacitance for every device on the bus (10 pF for the device and 10 pF for interconnect), choose a pullup current so that the bus will rise on its own at a rate of at least 1.25 V/ms to guarantee activation of the accelerators. For example, assume an SMBus system with VCC = 3 V, a 10-kΩ pullup resistor and equivalent bus capacitance of 200 pF. The rise-time of an SMBus system is calculated from (VIL(MAX) – 0.15 V) to (VIH(MIN) + 0.15 V), or 0.65 V to 2.25 V. It takes an RC circuit 0.92 time constants to traverse this voltage for a 3 V supply; in this case, 0.92 × (10 kΩ × 200 pF) = 1.84 ms. Thus, the system exceeds the maximum allowed rise-time of 1 ms by 84%. However, using the rise-time accelerators, which are activated at a DC threshold of below 0.65 V, the worst-case rise-time is: (2.25 V – 0.65 V) × 200 pF/1 mA = 320 ns, which meets the 1 ms rise-time requirement. READY Digital Output This pin provides a digital flag which is low when either EN is low or the start-up sequence described earlier in this section has not been completed. READY goes high when EN is high and start-up is complete. The pin is driven by an open drain pull-down capable of sinking 3 mA while holding 0.4 V on the pin. Connect a resistor of 10 kΩ to VCC to provide the pullup. EN Low Current Disable Grounding the EN pin disconnects the backplane side from the card side, disables the rise-time accelerators, drives READY low, disables the bus precharge circuitry and puts the part in a near-zero current state. When the pin voltage is driven all the way to VCC, the part waits for data transactions on both the backplane and card sides to be complete (as described in the Start-Up section) before reconnecting the two sides. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A 7 TCA4311A SCPS226 – JANUARY 2011 www.ti.com Resistor Pull-Up Value Selection The system pullup resistors must be strong enough to provide a positive slew rate of 1.25 V/ms on the SDA and SCL pins, in order to activate the boost pullup currents during rising edges. Choose maximum resistor value R using the formula: R ≤ (VCC(MIN) – 0.6) (800,000) / C where R is the pullup resistor value in ohms, VCC(MIN) is the minimum VCC voltage and C is the equivalent bus capacitance in picofarads (pF). In addition, regardless of the bus capacitance, always choose R ≤ 16 kΩ for VCC = 5.5 V maximum, R ≤ 24 kΩ for VCC = 3.6 V maximum. The start-up circuitry requires logic high voltages on SDAOUT and SCLOUT to connect the backplane to the card, and these pullup values are needed to overcome the precharge voltage. Systems With Disparate Supply Voltages In large 2-wire systems, the VCC voltages seen by devices at various points in the system can differ by a few hundred millivolts or more. This situation is well modeled by a series resistor in the VCC line, as shown in Figure 15. For proper operation of the TCA4311A, make sure that VCC(BUS) ≥ VCC(TCA4311A) – 0.5 V. 8 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A TCA4311A www.ti.com SCPS226 – JANUARY 2011 TYPICAL PERFORMANCE CHARACTERISTICS 100 18 95 16 5V 2.7 V 90 14 85 12 IPULLUPAC (mA) tPHL 80 3.3 V 75 10 3V 8 70 6 65 2.5 V 5.5 V 2.7 V 4 60 2 55 0 50 –40 25 Temperature, TA (°C) 0 –25 –50 85 25 50 75 100 Temperature (°C) Figure 3. Input/Output tPLH vs Temperature Figure 4. IPULLUPAC vs Temperature 3.5 3.5 3.0 3.0 VXSDAOUT 2.5 2.5 2.0 2.0 (V) (V) Delay: 72.258 1.5 1.0 1.5 1.0 VXSDAIN 0.5 0.5 VXSDAIN VXSDAOUT 0.0 –0.5 52.0 0.0 52.025 52.075 52.1 52.125 52.15 52.175 –0.5 54.0 54.2 t (s) 54.4 54.6 54.8 55.0 55.2 55.4 55.6 55.8 56.0 t (s) Figure 5. Figure 6. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A 9 TCA4311A SCPS226 – JANUARY 2011 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) 350 300 250 200 150 Voffset5V 100 Voffset33V 50 0 0 10,000 20,000 30,000 40,000 Figure 7. 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A TCA4311A www.ti.com SCPS226 – JANUARY 2011 PARAMETER MEASUREMENT INFORMATION VCC VCC Pulse Generator VI D.U.T. RL VO 10 kΩ CL RT 100 pF RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to the output impedance Z0 of the pulse generators. Figure 8. Test Circuitry for Switching Times SDAn/SCLn ten ENABLE tdis tidle(READY) READY Figure 9. Timing for ten, tidle(READY), and tdis SDAIN SCLIN SCLOUT SDAOUT ten ENABLE tstp(READY) READY Figure 10. tstp(READY) That Can Occur After ten Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A 11 TCA4311A SCPS226 – JANUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) SCLIN, SDAIN SCLOUT, SDAOUT ten tidle(READY) ENABLE tstp(READY) READY Figure 11. tstp(READY) That Can Occur After ten and tidle(READY) 12 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A TCA4311A www.ti.com SCPS226 – JANUARY 2011 APPLICATION INFORMATION Live Insertion and Capacitance Buffering Application Figure 12 through Figure 13 illustrate the usage of the TCA4311A in applications that take advantage of both its hot swap controlling and capacitance buffering features. In all of these applications, note that if the I/O cards were plugged directly into the backplane, all of the backplane and card capacitances would add directly together, making rise- and fall-time requirements difficult to meet. Placing a TCA4311A on the edge of each card, however, isolates the card capacitance from the backplane. For a given I/O card, the TCA4311A drives the capacitance of everything on the card and the backplane must drive only the capacitance of the TCA4311A, which is less than 10 pF. Figure 12 shows the TCA4311A in a CompactPCI™ configuration. Connect VCC and EN to the output of one of the CompactPCI power supply Hot Swap circuits. Use a pullup resistor to EN for a card side enable/disable. VCC is monitored by a filtered UVLO circuit. With the VCC voltage powering up after all other pins have established connection, the UVLO circuit ensures that the backplane and card data and clock busses are not connected until the transients associated with live insertion have settled. Owing to their small capacitance, the SDAIN and SCLIN pins cause minimal disturbance on the backplane busses when they make contact with the connector. Backplane Backplane Connector Power Supply Hot Swap R1 10 k BD_SEL SDA SCL R2 10 k Staggered Connector VCC I/O Peripheral Card 1 R3 10 k SDAIN R5 10 k R6 10 k SDAOUT CARD_SDA TCA4311 SCLOUT CARD_SCL SCLIN Staggered Connector R4 10 k VCC EN Power Supply Hot Swap C1 0.01 µF Card Enable/Disable READY GND I/O Peripheral Card 2 R7 10 k C3 0.01 µF Card Enable/Disable R9 10 k R10 10 k VCC SDAOUT CARD2_SDA TCA4311 SCLOUT CARD2_SCL EN SDAIN R8 10 k SCLIN READY GND • • • Staggered Connector Power Supply Hot Swap I/O Peripheral Card N R11 10 k C5 0.01 µF Card Enable/Disable EN SDAIN SCLIN R12 10 k R13 10 k R14 10 k VCC SDAOUT CARDN_SDA TCA4311 SCLOUT CARDN_SCL GND READY Figure 12. Inserting Multiple I/O Cards into a Live Backplane Using the TCA4311A in a CompactPCI System Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A 13 TCA4311A SCPS226 – JANUARY 2011 www.ti.com Figure 13 shows the TCA4311A in a PCI application, where all of the pins have the same length. In this case, connect an RC series circuit on the I/O card between VCC and EN. An RC product of 10 ms provides a filter to prevent the TCA4311A from becoming activated until the transients associated with live insertion have settled. Backplane Backplane Connector I/O Periperal Card 1 VCC R1 10 k R2 10 k C1 0.01 µF R3 100 k EN SDAIN SDA SCLIN SCL R5 10 k R6 10k VCC SDAOUT CARD_SDA TCA4311 SCLOUT CARD_SCL READY GND C2 0.1 µF R4 10 k I/O Peripheral Card 2 C3 0.01 µF R7 100 k EN SDAIN SCLIN C4 0.1µF R8 10 k R9 10 k R10 10 k VCC SDAOUT CARD2_SDA TCA4311 SCLOUT CARD2_SCL GND READY • • • Figure 13. Inserting Multiple I/O Cards into a Live Backplane Using the TCA4311A in a PCI System Repeater/Bus Extender Application Users who wish to connect two 2-wire systems separated by a distance can do so by connecting two TCA4311A back-to-back, as shown in Figure 14. The I2C specification allows for 400 pF maximum bus capacitance, severely limiting the length of the bus. The SMBus specification places no restriction on bus capacitance, but the limited impedances of devices connected to the bus require systems to remain small if rise- and fall-time specifications are to be met. The strong pullup and pulldown impedances of the TCA4311A are capable of meeting rise- and fall-time specifications for one nanofarad of capacitance, thus allowing much more interconnect distance. In this situation, the differential ground voltage between the two systems may limit the allowed distance, because a valid logic low voltage with respect to the ground at one end of the system may violate the allowed VOL specification with respect to the ground at the other end. In addition, the connection circuitry offset voltages of the back-to-back TCA4311A add together, directly contributing to the same problem. 14 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A TCA4311A www.ti.com SCPS226 – JANUARY 2011 2-Wire System 2 2-Wire System 1 VCC = 5 V VCC C1 0.01 µF R1 10 k R4 10 k C2 0.01 µF R5 10 k TCA4311 R2 R3 5.1 k 5.1 k R6 10 k R7 10 k TCA4311 VCC R8 10 k VCC EN SDAOUT SDAOUT EN SDA1 SDAIN SCLOUT SCLOUT SDAIN SDA1 SCL1 To Other System 1 Devices SCLIN READY READY SCLIN SCL1 To Other System 2 Devices GND GND Long Distance Bus Figure 14. Repeater/Bus Extender Application RDROP VCC (TCA4311) VCC (BUS) R1 10 k C2 0.01 µF R2 10 k EN SDA SDAIN SCL SCLIN R3 10 k R4 10 k R5 10 k VCC SDAOUT SDA2 TCA4311 SCLOUT SCL2 READY GND Figure 15. System With Disparate VCC Voltages VCC 3.3 V R1 10 k SCLIN Input – Output Connection tPLH C1 0.01 µF R2 10 k R3 10 k 8 3 2 R4 10 k 3.5 3.5 3.0 3.0 VXSDAOUT SCLOUT 2.5 2.5 2.0 2.0 SDAIN 7 (V) 6 (V) Delay: 72.258 1.5 1.5 SDAOUT 1.0 1.0 VXSDAIN 0.5 0.5 VXSDAIN 1 TCA4311 EN GND READY 5 4 VXSDAOUT 0.0 –0.5 52.0 0.0 52.025 52.075 52.1 t (s) 52.125 52.15 52.175 –0.5 54.0 54.2 54.4 54.6 54.8 55.0 55.2 55.4 55.6 55.8 56.0 t (s) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TCA4311A 15 PACKAGE OPTION ADDENDUM www.ti.com 6-Jan-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish Call TI MSL Peak Temp (3) Samples (Requires Login) TCA4311AD PREVIEW SOIC D 8 50 TBD Call TI TCA4311ADGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TCA4311ADR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Mar-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TCA4311ADGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TCA4311ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Mar-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TCA4311ADGKR MSOP DGK 8 2500 358.0 335.0 35.0 TCA4311ADR SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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