RFMD RF2132PCBA

RF2132
2
LINEAR POWER AMPLIFIER
Typical Applications
• 4.8V AMPS Cellular Handsets
• Driver Amplifier in Cellular Base Stations
• 4.8V CDMA/AMPS Handsets
• Portable Battery-Powered Equipment
2
Product Description
-A-
The RF2132 is a high power, high efficiency linear amplifier IC. The device is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT)
process, and has been designed for use as the final RF
amplifier in dual-mode 4-cell CDMA/AMPS handheld digital cellular equipment, spread-spectrum systems, and
other applications in the 800MHz to 950MHz band. The
device is self-contained with 50Ω input and the output
can be easily matched to obtain optimum power, efficiency, and linearity characteristics over varying supply
and control voltages.
Optimum Technology Matching® Applied
Si Bi-CMOS
ü
GaAs HBT
GaAs MESFET
SiGe HBT
Si CMOS
VCC 1
16 GND
0.009
0.004
0.158
0.150
0.021
0.014
0.069
0.064
0.392
0.386
0.244
0.230
0.050
0.060
0.054
8° MAX
0° MIN
0.035
0.016
Si BJT
POWER AMPLIFIERS
• 4.8V JCDMA/TACS Handsets
0.010
0.008
Package Style: Standard Batwing
Features
• Single 4.2V to 5.0V Supply
• Up to 29 dBm Linear Output Power
NC 2
15 RF OUT
RF IN 3
14 RF OUT
• 45% Linear Efficiency
GND 4
13 GND
• On-board Power Down Mode
GND 5
12 GND
• 800MHz to 950MHz Operation
GND 6
GND 7
PC 8
BIAS
11 RF OUT
10 RF OUT
9 GND
Functional Block Diagram
Rev B9 010417
• 29dB Gain With Analog Gain Control
Ordering Information
RF2132
RF2132 PCBA
Linear Power Amplifier
Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
2-109
RF2132
Absolute Maximum Ratings
Parameter
POWER AMPLIFIERS
2
Supply Voltage (No RF)
Supply Voltage (POUT<32dBm)
Power Control Voltage (VPC)
DC Supply Current
Input RF Power
Output Load VSWR
Storage Temperature
Junction Temperature
Parameter
Rating
Unit
-0.5 to +8.0
-0.5 to +5.0
-0.5 to +5.0 or VCC
800
+12
10:1
-40 to +150
200
VDC
VDC
V
mA
dBm
Typ.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
°C
°C
Specification
Min.
Caution! ESD sensitive device.
Max.
Unit
T=25 °C, VCC =4.8V, VPC =4.0V,
Freq=824MHz to 849MHz
Overall
Usable Frequency Range
Linear Gain
Total Linear Efficiency
Efficiency at Max Output
OFF Isolation
Second Harmonic
Maximum Linear Output Power
Adjacent Channel Power Rejection @ 885 kHz
Adjacent Channel Power Rejection @ 1.98 MHz
Maximum CW Output Power
Operating Case Temperature
Ambient Operating Temperature
Junction to Case Thermal Resistance
Input VSWR
Output Load VSWR
Condition
800
27
40
50
23
31.5
-30
-30
824 to 849
29
45
55
27
-30
28.5
-46
950
31
29
-44
dBc
-58
-56
dBc
110
100
dBm
°C
°C
°C/W
32
85
MHz
dB
%
%
dB
dBc
VPC =0V,PIN =+6dBm
Including Second Harmonic Trap
IS-95A CDMA Modulation
Pout = 28 dBm
ACPR can be improved by trading off efficiency.
Pout = 28 dBm
Pout = 31 dBm, Efficiency = 55%
<2:1
10:1
No oscillations
Power Down
Turn On/Off Time
Total Current
VPC “OFF” Voltage
VPC “ON” Voltage
0.2
3.6
4.0
100
10
0.5
Vcc
ns
µA
V
V
4.8
40
15
5.0
100
20
V
mA
mA
“OFF” State
Power Supply
Power Supply Voltage
Idle Current
Current into VPC pin
2-110
4.2
Operating voltage
VPC =4.0V
“ON” State
Rev B9 010417
RF2132
Function
VCC1
2
3
NC
RF IN
4
GND
5
6
GND
GND
7
8
GND
PC
9
10
11
12
13
14
15
16
GND
RF OUT
RF OUT
GND
GND
RF OUT
RF OUT
GND
Rev B9 010417
Description
Interface Schematic
Power supply for the driver stage, and interstage matching. Shunt
inductance is required on this pin, which can be achieved by an inductor to VCC, with a decoupling capacitor on the VCC side. The value of
the inductor is frequency dependent; 3.3nH is required for 830MHz,
and 1.2nH for 950MHz. Instead of an inductor, a high impedance
microstrip line can be used.
Not Connected.
RF input. This is a 50Ω input, but the actual input impedance depends
on the interstage matching network connected to pin 1. An external DC
blocking capacitor is required if this port is connected to a DC path to
ground or a DC voltage.
Ground connection. Keep traces physically short and connect immediately to the ground plane for best performance.
Same as pin 4.
VCC
RF IN
From Bias
Stages
2
See pin 1.
POWER AMPLIFIERS
Pin
1
Ground for stage 1. Keep traces physically short and connect immediately to ground plane for best performance. This ground should be isolated from the batwing and other ground contacts. See evaluation
board layout.
Same as pin 6.
Power Control. When this pin is "low", all circuits are shut off. A "low" is
typically 0.5V or less at room temperature. During normal operation
this pin is the power control. Control range varies from about 2V for
0dBm to VCC for +31dBm RF output power. The maximum power that
can be achieved depends on the actual output matching. PC should
never exceed 5.0V or VCC, whichever is the lowest.
PC
To RF
Transistors
Same as pin 4.
RF Output and power supply for the output stage. The four output pins
are combined, and bias voltage for the final stage is provided through
these pins. The external path must be kept symmetric until combined to
ensure stability. An external matching network is required to provide the
optimum load impedance; see the application schematics for details.
Same as pin 10.
RF OUT
From Bias
Stages
See pin 10.
Same as pin 4.
Same as pin 4.
Same as pin 10.
See pin 10.
Same as pin 10.
See pin 10.
Same as pin 4.
2-111
RF2132
Application Schematic
VCC
1 nF
Vcc = 4.8 V
Vpc = 4.0 V
POWER AMPLIFIERS
2
100 pF
1.8 nH
100 pF
1
16
2
15
3
14
4
13
5
12
6.8 nH
100 pF
RF IN
3 pF
18 kΩ
6
11
100 pF
3.3 nH
BIAS
VPC
RF OUT
7
10
8
9
12 pF
4.3 pF
1 nF
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
Power supply filtering/bypassing for V cc
Vcc = 4.8 V
Vpc = 4.0 V
P1-1
C1
100 nF
C6
100 pF
C8
33 pF
J1
Adds bias to the first
amplifier stage for
improved linearity
R1
18 kΩ
1
16
2
15
3
14
4
13
5
12
8
C13
1 nF
P1
P1-1
P1-3
6
P1-3
C4
1 nF
C5
100 pF
7
C12
3.3 µF
C3
1 µF
L1
1.8 nH
Interstage tuning (L1) for
centering output frequency
RF IN
C2
11 µF
C14
100 pF
BIAS
L2
6.8 nH
2
GND
3
PC
Harmonic trap: C7 series resonates with
internal bondwires of pins 14 and 15 at
2f0 to effectively short out 2nd harmonic
for optimum gain and efficiency
L3
3.3 nH
C9
100 pF
RF OUT
J2
10
9
VCC
Bias inductor for the
amplifier output stage
C7
3 pF
11
1
C10
12 pF
C11
4.3 pF
Matching network for
optimum load impedance
Power supply filtering/bypassing for V PC
2-112
Rev B9 010417
RF2132
Evaluation Board Layout
2” x 2”
POWER AMPLIFIERS
2
Rev B9 010417
2-113
RF2132
RF2132 Evaluation Board
Vcc = 4.8 V, Vpc = 4.0 V, Frequency = 836 MHz, IS-95A CDMA
90
350
80
ACPR 1.98 MHz
300
ACPR 885 kHz
250
70
60
200
50
Current
40
150
Current (mA)
ACPR (-dBc), Efficiency (%)
POWER AMPLIFIERS
2
30
100
20
Total Efficiency
50
10
0
0
28
26
24
22
20
18
16
14
12
10
Pout (dBm)
2-114
Rev B9 010417