RF2486 8 PCS LOW NOISE AMPLIFIER/MIXER Typical Applications • CDMA/TDMA/DCS1900 PCS Systems • Micro-Cell PCS Base Stations • PHS 1500/WLAN 2400 Systems • Portable Battery-Powered Equipment • General Purpose Downconverter Product Description 0.157 0.150 1 0.012 0.008 0.344 0.337 0.025 Si BJT üSi Bi-CMOS GaAs HBT GaAs MESFET SiGe HBT Si CMOS 0.0688 0.0532 0.2440 0.2284 8 8°MAX 0°MIN 0.050 0.016 Optimum Technology Matching® Applied 0.0098 0.0040 0.0098 0.0075 Package Style: SSOP-24 Features 24 NC • Complete Receiver Front-End VCC1 2 23 GND9 • High Dynamic Range VCC2 3 22 VCC4 GND1 4 21 GND8 NC 1 LNA IN 5 20 LNA OUT GND2 6 19 GND7 GND3 7 18 MIX RF IN NC 8 16 IF- VCC3 10 15 IF+ LO IN 12 14 GND5 13 LO BUFF OUT Functional Block Diagram Rev A7 010717 • Single 3.6V Power Supply • External LNA IP3 Adjustment • 1500MHz to 2500MHz Operation 17 GND6 GND4 9 LO BUFF EN 11 FRONT-ENDS The RF2486 is a monolithic integrated receiver front-end for PCS, PHS, and WLAN applications. The IC contains all of the required components to implement the RF functions of the receiver front-end except for the passive filtering and LO generation. It contains an LNA (low-noise amplifiers), a double-balanced Gilbert cell mixer, a balanced IF output, an LO isolation buffer amplifier, and an LO output buffer amplifier for providing the buffered LO signal as an output. The IC is designed to operate from a single 3.6V power supply. Ordering Information RF2486 PCS Low Noise Amplifier/Mixer RF2486 PCBA-L Fully Assembled Evaluation Board 1.96GHz RF2486 PCBA-H Fully Assembled Evaluation Board 2.4GHz RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 8-105 RF2486 Absolute Maximum Ratings Parameter Supply Voltage Input LO and RF Levels Ambient Operating Temperature Storage Temperature Parameter Rating Unit -0.5 to 5.5 +6 -40 to +85 -40 to +150 VDC dBm °C °C Specification Min. Typ. Max. Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Unit T = 25°C, VCC =3.6V, RF=1959MHz, LO=1749MHz @ +1 dBm Overall RF Frequency Range LO Frequency Range IF Frequency Range 1500 1200 DC 2500 2500 500 MHz MHz MHz 28 dB dBm dB Cascaded Performance Cascade Conversion Gain Cascade Input IP3 Cascade Noise Figure 1kΩ balanced load, 2.5dB Image Filter Loss. 24 -17 27 -16 3.6 First Section (LNA) FRONT-ENDS 8 Condition Noise Figure Input VSWR 1.8 1.5:1 Input IP3 Gain Reverse Isolation Output VSWR dB 2.0:1 +4 dBm +8.5 13.5 23 <1.5:1 dBm dB dB 10 1.5:1 -5 16 1 dB Second Section (Mixer) Noise Figure Input VSWR Input IP3 Conversion Gain Output Impedance Single Sideband The LNA section may be left unused. Power is not connected to pin 1. The performance is then as specified for the Second Section (Mixer). dBm dB kΩ Input is internally matched for optimum noise figure from a 50Ω source. IP3 may be increased 10dB by connecting pin 22 to VCC through the matching inductor. The LNA’s current then increases by 10mA. Other in-between IP3 versus ICC trade-offs may be made. See pin description for pin 20. R2=Open R2=Short With 1kΩ balanced load. Single Sideband Balanced LO Input LO Input Range LO Output Level -3 -7 LO to RF (Mix In) Rejection LO to IF1, IF2 Rejection LO Input VSWR -3 -22 30 20 1.5:1 +3 +1 -14 dBm dBm dBm dB dB Buffer On, +1dBm input Buffer Off, +1dBm input Single ended Power Supply Voltage Current Consumption 8-106 2.7 3.6 7 52 48 5.0 V mA mA mA LNA only LNA + Mixer, LO Buffer On LNA + Mixer, LO Buffer Off Rev A7 010717 RF2486 Function NC VCC1 3 VCC2 4 GND1 5 LNA IN 6 7 GND2 GND3 8 9 10 NC GND4 VCC3 11 LO BUFF EN 12 LO IN 13 LO BUFF OUT 14 GND5 15 IF+ 16 17 IFGND6 18 MIX RF IN 19 GND7 Rev A7 010717 Description Interface Schematic No connection. This pin may be grounded (recommended) or left open. Supply voltage for the mixer and RF buffer amplifier. External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Supply voltage for the LNA. External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Ground connection for the LNA. For best performance, keep traces physically short and connect immediately to ground plane. RF input pin for the LNA. This pin is internally matched for minimum noise figure (NOT for minimum VSWR), given a 50Ω source impedance. This pin is not internally DC-blocked. 150 Ω VCC1 VCC4 BIAS LNA IN Same as pin 4. Ground connection for the RF buffer amplifier. For best performance, keep traces physically short and connect immediately to ground plane. No connection. This pin may be grounded (recommended) or left open. Same as pin 7. Supply voltage for both LO buffer amplifiers. External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Enable pin for the LO output buffer amplifier. This is a digitally controlled input. A logic "high" (≥3.1V) turns the buffer amplifier on, and the current consumption increases by 3mA (with -2dBm LO input). A logic "low" (≤0.5V) turns the buffer amplifier off. Mixer LO input pin. This pin is internally DC-blocked and matched to 50Ω. Optional buffered LO output. This pin is internally DC-blocked and matched to 50Ω. The buffer amplifier is switched on or off by the voltage level at pin 11. Ground connection for both LO buffer amplifiers. For best performance, keep traces physically short and connect immediately to ground plane. Open-collector IF output pin. This is a balanced output. The output impedance is set by an internal 1000Ω resistor to pin 16. Thus the differential IF output impedance is 1000Ω. The resistor sets the operating impedance, but an external choke or matching inductor to VCC must be supplied in order to bias this output. This inductor is typically incorporated in the matching network between the output and IF filter. Because this pin is biased to VCC, a DC blocking capacitor must be used if the IF filter input has a DC path to ground. Same as pin 15, except complementary output. 8 7.5 kΩ LO BUFF EN FRONT-ENDS Pin 1 2 IF- IF+ 1 kΩ See pin 15. Ground connection for the mixer. For best performance, keep traces physically short and connect immediately to ground plane. Mixer RF input pin. This pin is internally DC-blocked and matched to 50Ω. Same as pin 17. 8-107 RF2486 Pin 20 Function LNA OUT 21 22 GND8 VCC4 23 24 GND9 NC Description Interface Schematic LNA output pin. This is an open-collector output. This pin is typically connected to pin 22 through a bias/matching inductor. This inductor, in conjunction with a series blocking/matching capacitor, forms a matching network to the 50Ω image filter and provides bias (see application schematic). The LNA’s IP3 may be increased 10dB by connecting pin 20 to VCC through the inductor. The LNA’s current then increases by 10mA. Other in-between IP3 versus ICC trade-offs may be made by connecting resistance values between VCC and the matching inductor. The two reference points for consideration are with 150Ω used, which is what connection to pin 22 achieves, the input IP3 is +5.5dBm and the LNA ICC is 5mA. Using no resistance, the input IP3 is +15.5 dBm and the LNA ICC is 15 mA. Desired operating points in between these values may be roughly interpolated. Same as pin 17. LNA OUT Output supply voltage for the LNA output (pin 20). This pin is typically connected to pin 20 through a bias/matching inductor (see application schematic). External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Same as pin 17. See pin 2. No connection. This pin may be grounded (recommended) or left open. Application Schematic 1.96GHz, 210MHz IF 8 FRONT-ENDS See evaluation board R2 1 VCC 1 nF 22 pF VCC 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 22 pF 1.8 nH 2 pF LNA OUT 22 pF 22 pF LNA2 IN SAW Filter 22 pF MIX IN VCC 1 nF 22 pF IF SAW Filter 470 nH 100 pF 1 2 1 kΩ BUF ENBL 1 nF 22 pF 470 nH 470 nH 100 pF 1 nF VCC 22 pF 4.7 µF LO IN 2.7 nH 8-108 LO OUT Rev A7 010717 RF2486 Evaluation Board Schematic 1.96GHz, 210MHz IF (Download Bill of Materials from www.rfmd.com.) VCC R 2* SAT VCC C 10 1 nF J1 L N A 2 IN C 18 22 pF 50 Ω µstrip C5 2 2 pF 1 24 2 23 3 22 4 21 5 20 6 19 VCC C6 1 nF R1 1 kΩ J2 LO IN 50 Ω µstrip L1 2.7 n H F L1* C2* 22 pF **S ee N o te s** 50 Ω µs trip J5 M IX E R IN 18 8 17 9 16 10 15 11 14 12 13 J6 LNA OUT C 2a 22 p F C8 5 pF T1 C 16 10 0 pF L5 22 0 nH C 11 1.0 pF J4 IF O U T L4 4 7 nH TOKO BUFF EN C14 1 nF C 1a 22 pF 50 Ω µstrip C1* 22 pF 50 Ω µs trip 7 C 12 22 pF **S e e N otes ** C4 1 .5 pF 50 Ω µstrip **S ee N ote s** C3 2 2 pF C7 2 2 pF 50 Ω µstrip 2 486400 - C 17 10 0 pF L3 47 0 nH L2 47 0 nH 50 Ω µs trip J3 LO OUT 8 VCC G nd C9 2 2 pF VCC + C 15 4.7 u F P1 B U F F E R E N A B LE *C om p on ents n ot no rm a lly p op ula ted. NO TE S: C 1 1 selecte d to fine tu ne L 4 for IF ou tput m a tch a t 210 M H z. R 2 is no rm ally n ot po pu late d. F or ap plica tion s req uiring a dd itio nal LN A IP 3, see the d ata s hee t fo r rec om m end ed resistanc e va lue s. C 1 a an d C 2a a re no rm ally n ot po pulate d. If C 1a an d C 2 a a re po pulated , the L N A a nd m ixe r can b e tes te d in de pen de ntly . In th is c ase , C 1 a nd C 2 s hou ld b e re m ov ed. To use the p art w ith o nbo ard filter, d o no t p op ula te C 1a, a nd C 2a . U se C 1 and C 2 ins tead . Th is w ill allow ca sca ded ope ratio n o nly . Rev A7 010717 1 2 VCC FRONT-ENDS C 13 1 nF 3 8-109 RF2486 Evaluation Board Schematic 2.4GHz, 280MHz IF (Download Bill of Materials from www.rfmd.com.) VCC R2* SAT VCC C10 1 nF J1 LNA2 IN C5 22 pF 1 24 2 23 3 C3 22 pF C4 2.0 pF 4 21 5 20 6 19 7 VCC R1 1 kΩ BUFF EN 8 C14 1 nF J2 LO IN C7 22 pF 50 Ω µstrip **See Notes** 50 Ω µstrip J6 LNA OUT C1* 22 pF L1 1.8 nH FL1* C2* 22 pF 50 Ω µstrip C6 1 nF C1a 22 pF 22 50 Ω µstrip C12 22 pF 50 Ω µstrip **See Notes** 50 Ω µstrip J5 MIXER IN 18 8 17 9 16 10 15 11 14 12 13 C2a 22 pF C16 100 pF C8 6 pF T1 TOKO L5 180 nH C11 1.0 pF J4 IF OUT L4 22 nH C17 100 pF L3 470 nH L2 470 nH 2486401- J3 LO OUT FRONT-ENDS 50 Ω µstrip VCC C13 1 nF C9 22 pF VCC C15 + 4.7 uF Gnd *Components not normally populated. NOTES: C11 selected to Fine Tune L4 for IF Output Match at 280 MHz. R2 is normally not populated. For applications requiring additional LNA IP3, see the datasheet for recommended resistance values. C1a and C2a are normally not populated. If C1a and C2a are populated, the LNA and mixer can be tested independently. In this case, C1 and C2 should be removed. To use the part with onboard filter, do not populate C1a, and C2a. Use C1 and C2 instead. This will allow cascaded operation only. 8-110 P1 P1-1 P1-3 1 BUFFER ENABLE 2 GND 3 VCC CON3 Rev A7 010717 RF2486 Evaluation Board Layout 1.96GHz Board Size 3.0” x 3.0” Board Thickness 0.075.6”, Board Material FR-4, Multi-Layer (8 mils between Layers 1 and 2, 31 mils between Layers 2 and 3, 1 ounce copper all layers) FRONT-ENDS 8 Rev A7 010717 8-111 RF2486 Evaluation Board Layout 2.4GHz Board Size 3.0” x 3.0” FRONT-ENDS 8 8-112 Rev A7 010717