RF2915 11 433/868/915MHZ FSK/ASK/OOK TRANSCEIVER Typical Applications • Wireless Meter Reading • Wireless Data Transceiver • Keyless Entry Systems • Wireless Security Systems • 433MHz/868MHz/915MHz ISM Band • Battery-Powered Portable Devices Product Description -A- Optimum Technology Matching® Applied Si CMOS TX ENABL 1 RESNTR+ SiGe HBT VCO OUT Si Bi-CMOS DATA OUT GaAs MESFET LVLADJ GaAs HBT RX ENABL ü Si BJT 32 31 29 26 25 CONTROL LOGIC PA TX OUT 2 RX IN 4 LNA 13 14 15 16 IF1 OUT 12 CBP1- 11 IF1 IN 10 CPB1+ 8 RSSI MIX IN 0.50 0.22 + 0.05 1.40 + 0.05 5.00 + 0.10 sq. Dimensions in mm. 7° MAX 0° MIN 0.60 + 0.15 0.10 0.127 Package Style: LQFP-32_5x5 11 Features • Fully Monolithic Integrated Transceiver • 2.4V to 5.0V Supply Voltage 24 RESNTR- • Narrowband and Wideband FSK 23 MOD IN • 300MHz to 1000MHz Frequency Range 21 DEMOD IN 22 IF2 OUT 19 CBP2- 18 CBP2+ 17 IF2 IN • 10dB Cascaded Noise Figure • 10mW Output Power With Power Control Linear RSSI VBG 6 MIX OUT+ LNA OUT 0.15 0.05 Functional Block Diagram Rev A7 001011 Ordering Information RF2915 RF2915 PCBA-L RF2915 PCBA-M RF2915 PCBA-H 433/868/915MHz FSK/ASK/OOK Transceiver Fully Assembled Evaluation Board (433MHZ) Fully Assembled Evaluation Board (868MHZ) Fully Assembled Evaluation Board (915MHz) RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 11-111 TRANSCEIVERS The RF2915 is a monolithic integrated circuit intended for use as a low cost FM transceiver. The device is provided in 32-lead plastic TQFP packaging and is designed to be used with a PLL IC to provide a fully functional FM transceiver. The chip is intended for digital (ASK, FSK, OOK) applications in the North American 915MHz ISM band and European 433MHz/868MHz ISM band. The integrated VCO has a buffered output to feed the RF signal back to the PLL IC to form the frequency synthesizer. Internal decoding of the RX ENABL and TX ENABL lines allow for half-duplex operation as well as turning on the VCO to give the synthesizer time to settle and complete power down mode. 7.00 + 0.20 sq. RF2915 Absolute Maximum Ratings Parameter Ratings Unit Supply Voltage Control Voltages Input RF Level Output Load VSWR Operating Ambient Temperature Storage Temperature -0.5 to +5.5 -0.5 to +5.0 +10 50:1 -40 to +85 -40 to +150 VDC VDC dBm Parameter °C °C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Specification Min. Typ. Max. Unit 300 to 1000 MHz 300 to 1000 50 -20 -72 -98 MHz Ω dBm dBc/Hz dBc/Hz Condition T=25 °C, VCC =3.6V, Freq=915MHz Overall RF Frequency Range VCO and PLL Section VCO Frequency Range VCO OUT Impedance VCO OUT Level VCO/PLL Phase Noise Freq=915MHz 10kHz offset, Loop BW=5kHz 100kHz offset, Loop BW=5kHz Transmit Section Max Modulation Frequency Min Modulation Frequency Maximum Power Level Power Control Range Power Control Sensitivity Max FM Deviation TRANSCEIVERS 11 Antenna Port Impedance Antenna Port VSWR Modulation Input Impedance Harmonics Spurious 2 MHz Set by loop filter bandwidth +7 +8.5 0 +3 6 12 10 200 dBm dBm dB dB/V kHz 50 Ω 1.5:1 4 -38 kΩ dBc dBc 300 to 1000 35 23 10 -31 -26 -99 -55 0.5 to 2.5 22.5 80 MHz dB dB dB dBm dBm dBm dBm V mV/dB dB Freq=433MHz Freq=915MHz Instantaneous frequency deviation is inversely proportional with the modulation voltage. Dependent upon external circuitry. TX ENABL=“1”, RX ENABL=“0” TX Mode Freq=915MHz, with eval board filter Compliant to Part 15.249 and I-ETS 300 220 Overall Receive Section Frequency Range Cascaded Voltage Gain Cascaded Noise Figure Cascaded Input IP3 RX Sensitivity LO Leakage RSSI DC Output Range RSSI Sensitivity RSSI Dynamic Range 11-112 -95 70 Freq=433MHz Freq=915MHz Freq=433MHz Freq=915MHz IF BW =180kHz, Freq=915MHz, S/N=8dB Freq=915MHz RLOAD =51kΩ Rev A7 001011 RF2915 Parameter Specification Min. Typ. Max. Unit 23 16 4.8 5.5 -27 -20 -37 -30 50 dB dB dB dB dBm dBm dBm dBm Ω Condition LNA Voltage Gain Noise Figure Input IP3 Input P1dB Antenna Port Impedance Antenna Port VSWR Output Impedance 1.5:1 Open Collector Ω 8 7 10 17 -21 -17 -31 -28 dB dB dB dB dBm dBm dBm dBm VPP Mixer Conversion Voltage Gain Noise Figure (SSB) Input IP3 Input P1dB Maximum Output Voltage 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz RX ENABL=“1”, TX ENABL=“0” RX Mode 433MHz/915MHz Single-ended configuration 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz Balanced First IF Section IF Frequency Range Voltage Gain Noise Figure IF1 Input Impedance IF1 Output Impedance 0.1 10.7 34 13 330 330 25 10.7 60 330 1 10 1 25 MHz dB dB Ω Ω IF=10.7MHz, ZL =330Ω Second IF Section Rev A7 001011 0.1 500 0.3 VCC -0.3 MHz dB Ω kΩ kΩ MΩ kHz V 11 IF=10.7MHz At IF2 OUT pin 3 dB Bandwidth, ZLOAD=1MΩ || 3pF ZLOAD=1MΩ || 3pF; Output voltage is proportional with the instantaneous frequency deviation. 11-113 TRANSCEIVERS IF Frequency Range Voltage Gain IF2 Input Impedance IF2 Output Impedance Demod Input Impedance Data Output Impedance Data Output Bandwidth Data Output Level RF2915 Parameter Specification Min. Typ. Max. Unit Condition Power Down Control Logical Controls “ON” Logical Controls “OFF” Control Input Impedance Turn On Time 2.0 1 V V Ω ms 1 ms 100 µs 1.0 25k Turn Off Time RX to TX and TX to RX Time Voltage supplied to the input Voltage supplied to the input Turn on/off times are dependent upon PLL loop parameters. Turn on/off times are dependent upon PLL loop parameters. Power Supply Voltage Current Consumption 18 4.8 4.4 3.6 2.7 to 5.0 V V 2.4 V 22 6.1 5.6 3.6 27.4 7.2 6.8 1 mA mA mA µA mA Specifications Operating limits Temperature range -40°C to +85°C Operating limits Temperature range +10°C to +40°C TX Mode, LVLADJ=3.6V TX Mode, LVLADJ=0V RX Mode Power Down Mode PLL Only Mode TRANSCEIVERS 11 11-114 Rev A7 001011 RF2915 Pin 1 2 Function TX ENABL TX OUT Description Interface Schematic Enables the transmitter circuits. TX ENABL>2.0V powers up all transmitter functions. TX ENABL<1.0V turns off all transmitter functions except the PLL functions. 20 kΩ TX ENABL 40 kΩ RF output pin for the transmitter electronics. TX OUT output impedance is a low impedance when the transmitter is enabled. TX OUT is a high impedance when the transmitter is disabled. VCC 20 TX OUT 3 GND2 4 RX IN Ground connection for the 40 dB IF limiting amplifier and Tx PA functions. Keep traces physically short and connect immediately to ground plane for best performance. RF input pin for the receiver electronics. RX IN input impedance is a low impedance when the transmitter is enabled. RX IN is a high impedance when the receiver is disabled. RX IN 500 GND1 6 LNA OUT 7 8 GND3 MIX IN 9 GND5 10 MIX OUT 11 VREF IF 12 RSSI Ground connection for RF receiver functions. Keep traces physically short and connect immediately to ground plane for best performance. Output pin for the receiver RF low noise amplifier. This pin is an open collector output and requires an external pull up coil to provide bias and tune the LNA output. A capacitor in series with this output can be used to match the LNA to 50Ω impedance image filters. Same as pin 3. VCC RF input to the RF Mixer. An LC matching network between LNA OUT and MIX IN can be used to connect the LNA output to the RF mixer input in applications where an image filter is not needed or desired. MIX IN GND5 11 GND5 is the ground connection shared by the input stage of the transmit power amplifier and the receiver RF mixer. IF output from the RF mixer. Interfaces directly to 10.7MHz ceramic IF filters as shown in the application schematic. A pull-up inductor and series matching capacitor should be used to present a 330Ω termination impedance to the ceramic filter. Alternately, an IF tank can be used to tailor the IF frequency and bandwidth to meet the needs of a given application. DC voltage reference for the IF limiting amplifiers. A 10nF capacitor from this pin to ground is required. A DC voltage proportional to the received signal strength is output from this pin. The output voltage range is 0.5V to 2.3V and increases with increasing signal strength. LNA OUT MIX OUT 15 pF GND5 15 pF GND5 . VCC RSSI 13 IF1 IN IF input to the 40dB limiting amplifier strip. A 10nF DC blocking capacitor is required on this input. IF1 BP+ 60 kΩ 330 IF1 BP60 kΩ 330 IF1 IN Rev A7 001011 11-115 TRANSCEIVERS 5 RF2915 Pin 14 Function IF1 BP+ 15 IF1 BP- 16 IF1 OUT 17 IF2 IN Description Interface Schematic DC feedback node for the 40dB limiting amplifier strip. A 10nF bypass capacitor from this pin to ground is required. Same as pin 14. See pin 13. See pin 13. IF output from the 40dB limiting amplifier. The IF1 OUT output presents a nominal 330 Ω output resistance and interfaces directly to 10.7MHz ceramic filters. IF1 OUT IF input to the 60dB limiting amplifier strip. A 10nF DC blocking capacitor is required on this input. The IF2 IN input presents a nominal 330 Ω input resistance and interfaces directly to 10.7MHz ceramic filters. IF2 BP+ 60 kΩ IF2 BP60 kΩ 330 330 IF2 IN 18 IF2 BP+ 19 20 IF2 BPGND6 21 DEMOD IN 22 IF2 OUT TRANSCEIVERS 11 23 MOD IN 24 RESNTR+ DC feedback node for the 60dB limiting amplifier strip. A 10nF bypass capacitor from this pin to ground is required. Same as pin 18. Ground connection for 60dB IF limiting amplifier. Keep traces physically short and connect immediately to ground plane for best performance. This pin is the input to the FM demodulator. This pin is NOT AC-coupled. Therefore, a DC blocking capacitor is required on this pin to avoid shorting the demodulator input with the LC tank. A ceramic discriminator or DC blocked LC tank resonant at the IF should be connected to this pin. See pin 17. See pin 17. VCC 10 kΩ DEMOD IN IF output from the 60dB limiting amplifier strip. This pin is intended to be connected to pin 21 through a 5pF capacitor and an FM discriminator circuit. IF2 OUT FM analog or digital modulation can be imparted to the VCO through See pin 24. this pin. The VCO varies in accordance to the voltage level presented to this pin. To set the deviation to a desired level, a voltage divider referenced to VCC is the recommended. This deviation is also dependent upon the overall capacitance of the external resonant circuit. This port is used to supply DC voltage to the VCO as well as to tune the RESNTR+ center frequency of the VCO. Equal value inductors should be connected to this pin and pin 25 although a small imbalance can be used to tune in the proper frequency range. RESNTR- 4 kΩ MOD IN 25 26 RESNTRVCO OUT See RESNTR+ description. See pin 24. This pin is used is supply a buffered VCO output to go to the PLL chip. This pin has a DC bias and needs to be AC-coupled. VCO OUT 27 11-116 GND4 GND4 is the ground shared on chip by the VCO, prescaler, and PLL electronics. Rev A7 001011 RF2915 Function VCC1 29 DATA OUT 30 VCC3 31 LVL ADJ Description Interface Schematic This pin is used to supply DC bias to the LNA, Mixer, first IF amplifier and Bandgap reference. A RF bypass capacitor should be connected directly to this pin and returned to ground. A 22 pF capacitor is recommended for 915MHz applications. A 68pF capacitor is recommended for 433MHz applications. Demodulated data output from the demodulator. Output levels on this are TTL/CMOS compatible. The magnitude of the load impedance is intended to be 1MΩ or greater. When using a RF2915 transmitter and receiver back to back a data inversion will occur with low side LO injection. DATA OUT This pin is used to supply DC bias and colletor current to the transmitter PA. It also supplies voltage to the 2nd IF amplifier, Demodulator and data slicer. A RF bypass capacitor should be connected directly to this pin and returned to ground. A 22 pF capacitor is recommended for 915MHz applications. A 68pF capacitor is recommended for 433MHz applications. This pin is used to vary the transmitter output power. An output level adjustment range greater than 12dB is provided through analog voltage control of this pin. DC current of the transmitter power amp is also reduced with output power. NOTE: This pin MUST be low when the transmitter is disabled. 40 kΩ LVL ADJ 400 32 RX ENABL Operation Mode Sleep Mode Transmit Mode Receive Mode PLL Lock Enable pin for the receiver circuits. RX ENABL>2.0V powers up all receiver functions. RX ENABL<1.0V turns off all receiver functions except the PLL functions and the RF mixer. TX ENABL RX ENABL Low High Low High Low Low High High 4 kΩ 50 kΩ RX ENABL Function Entire chip is powered down. Total current consumption is <1µA. * Transmitter, VCO are on. Receiver, VCO are on. * VCO is on. This mode allows time for a synthesizer loop to lock without spending current on the transmitter or receiver. * LVL ADJ pin must be low to disable transmitter. Rev A7 001011 11-117 11 TRANSCEIVERS Pin 28 RF2915 RF2915 Theory of Operation and Application Information The RF2915 is part of a family of low-power RF transceiver IC’s that was developed for wireless data communication devices operating in the European 433MHz to 868MHz ISM band, and 915MHz U.S. ISM band. This IC has been implemented in a 15GHz silicon bipolar process technology that allows low-power transceiver operation in a variety of commercial wireless products. TRANSCEIVERS 11 In its basic form, the RF2915 can be implemented as a two-way half-duplex FSK transceiver with the addition of some crystals, filters, and passive components. The RF2915 is designed to interface with common PLL IC’s to form a multi-channel radio. The receiver IF section is optimized to interface with low-cost 10.7MHz ceramic filters and has a 3dB bandwidth of 25MHz and can still be used (with lower gain) at higher frequencies with other types of filters. The PA output and LNA input are available on separate pins and are designed to be connected together through a DC blocking capacitor. In the transmit mode, the PA will have a 50Ω impedance and the LNA will have a high impedance. In the receive mode, the LNA will have a 50Ω impedance and the PA will have a high impedance. This eliminates the need for a TX/RX switch, and allows for a single RF filter to be used in transmit and receive modes. Separate access to the PA and LNA allows the RF2915 to interface with external components such as a high power PA, lower NF LNA, upconverters, and downconverters, for a variety of implementations. FM/FSK SYSTEMS The MOD IN pin drives an internal varactor for modulating the VCO. This pin can be driven with a voltage level needed to generate the desired deviation. This voltage can be carried on a DC bias to select desired slope (deviation/volt) for FM systems. Or, a resistor divider network referenced to VCC or ground can divide down logic level signals to the appropriate level for a desired deviation in FSK systems. On the receiver demodulator, the DATA OUT pin is generally used as a data slicer providing logic level outputs. However, by lightly loading the output with a resistive load, the bandwidth of the data slicer can be limited, and an analog signal recovered. A resistance value of around 10kΩ to 15kΩ is sufficient. The digital output is generated by a data slicer that is DC-coupled differentially to the demodulator. An on-chip 1.6MHz RC filter is provided at the demodulator output to filter the undesirable 2xIF product. This balanced data slicer has a speed advantage over a conventional adapter 11-118 data slicer where a large capacitor is used to provide DC reference for the bit decision. Since a balanced data slicer does not have to charge a large capacitor, the RF2915 exhibits a very fast response time. For best operation of the on-chip data slicer, FM deviation needs to exceed the carrier frequency error anticipated between the receiver and transmitter with margin. The data slicer itself is a transconductance amplifier, and the DATA OUT pin is capable of driving rail-to-rail output only into a very high impedance and a small capacitance. The amount of capacitance will determine the bandwidth of DATA OUT. In a 3pF load, the bandwidth is in excess of 500kHz. The rail-to-rail output of the data slicer is also limited by the frequency deviation and bandwidth of IF filters. With the 180kHz bandwidth filters on the evaluation boards, the rail-to-rail output is limited to less than 140kHz. Choosing the right IF bandwidth and deviation versus data rate (mod index) is important in evaluating the applicability of the RF2915 for a given data rate. The primary consideration when directly modulating the VCO is the data rate versus PLL bandwidth. The PLL will track out the modulation to the extent of its bandwidth, which distorts the modulating data. Therefore, the lower frequency components of the modulating data should be five to 10 times the loop bandwidth to minimize the distortion. The lower frequency components are generated by long strings of 1’s and 0’s in data stream. By limiting the number of consecutive, same bits, lower frequency components can be set. In addition, the data stream should be balanced to minimize distortion. Using a coding pattern such as Manchester is highly recommended to optimize system performance. The PLL loop bandwidth is important in several system parameters. For example, switching from transmit to receive requires the VCO to retune to another frequency. The switching speed is proportional to the loop bandwidth: the higher the loop bandwidth, the faster the switching times. Phase noise of the VCO is another factor. Phase noise outside the bandwidth is because of the VCO itself, rather than a crystal reference. The design trade-offs must be made here in selecting a PLL loop bandwidth with acceptable phase noise and switching characteristics, as well as minimal distortion of the modulation data. Rev A7 001011 RF2915 APPLICATION AND LAYOUT CONSIDERATIONS Both the RX IN and the TX OUT have a DC bias on them. Therefore, a DC blocking cap is required. If the RF filter has DC blocking characteristics (such as a ceramic dielectric filter), then only one DC blocking cap would be needed to separate the DC of the RX and TX. These are RF signals and care should be taken to run the signal keeping them physically short. Because of the 50Ω/high impedance nature of these two signals, they may be connected together into a single 50Ω device (such as a filter). An external LNA or PA may be used, if desired, but an external RX/TX switch may be required. Rev A7 001011 Loop Voltage 25 VCC 11 24 TRANSCEIVERS For the ASK/OOK receiver demodulator, an external data slicer is required. The RSSI output is used to provide both the filter data and a very low pass filter (relative to the data rate) DC reference to the data slicer. Because the very low pass filter has a slow time constant, a longer preamble may be required to allow for the DC reference to acquire a stable state. Here, as in the case of the FSK transmitter, the data pattern also affects the DC reference and the reliability of the receive data. Again, a coding scheme such as Manchester should be used to improve data integrity. The VCO is a very sensitive block in the system. RF signals feeding back into the VCO (either radiated or coupled by traces) may cause the PLL to become unlocked. The trace(s) for the anode of the tuning varactor should also be kept short. The layout of the resonator and varactor are very important. The capacitor and varactor should be close to the RF2915 pins, and the trace length should be as short as possible. The inductors may be placed further away, and reducing the value of the inductors can compensate any trace inductance. Printed inductors may also be used with careful design. For best results, physical layout should be as symmetrical as possible. Figure 1 is a recommended layout pattern for the VCO components. When using the loop bandwidth lower than 5kHz shown on the evaluation board, better filtering of the VCC at the resonators (and lower VCC noise, as well) will help reduce phase noise of the VCO. A series resistor of 100Ω to 200Ω, and a 1µF or larger capacitor may be used. 26 ASK/OOK SYSTEMS The transmitter of the RF2915 has an output power level adjust (LVL ADJ) that can be used to provide approximately 18dB of power control for amplitude modulation. The RSSI output of the receiver section can be used to recover the modulation. The RSSI output is from a current source, and needs to have a resistor to convert to a voltage. A 51kΩ resistor load typically produces an output of 0.7V to 2.5V. A parallel capacitor is suggested to band limit the signal. For ASK applications, the 18dB range of the LVL ADJ does not produce enough voltage swing in the RSSI for reliable communications. The on/off keying (OOK) is suggested to provide reliable communications. To achieve this, the LVL ADJ and TX ENABL need to be controlled together (please note that LVL ADJ cannot be left high when TX ENABL is low). This will provide an on/off ratio of greater than 50dB. One of the unfortunate consequences of modulating in this manner is VCO pulling by the PA. This results in a spurious output outside the desired transmit band, as the PLL momentarily loses lock and reacquires. This may be avoided by pulse-shaping TX data to slow the change in the VCO load to a pace which the PLL can track with its given loop bandwidth. The loop bandwidth may also be increased to allow it to track faster changes brought about by load pulling. 23 Not to Scale Representative of Size Figure 1. Recommended VCO Layout For the interface between the LNA/mixer, the coupling capacitor should be as close to the RF2915 pins as possible, with the bias inductors further away. Once again, the value of the inductor may be changed to compensate for trace inductance. The output impedance of the LNA is in the order of several kΩ, which makes matching to 50Ω very difficult. If image filtering is desired, a high impedance filter is recommended. 11-119 RF2915 The quad tank of the discriminator may be implemented with ceramic discriminator available from a couple of sources. This design works well for wideband applications where temperature range is limited. The temperature coefficient of ceramic discriminators may be in the order of +50ppm/°C. The alternative to the ceramic discriminator is the LC tank, which provides a broadband discriminator more useful for high data rates. PLL Synthesizer The RF2915 evaluation board uses an LMX2315 PLL IC from National Semiconductor. This PLL IC may be programmed from the software available from National Semiconductor (codeloader at www.national.com/ appinfo/wireless/). An external reference oscillator is required for the PLL IC allowing for the evaluation of different reference frequencies or step sizes. The National Semiconductor software also has a calculator for determining the R and C component values for a given loop bandwidth. TRANSCEIVERS 11 The RF2915 is controlled by RX ENABL and TX ENABL which are decoded to put the RF2915 into one of four states. It may be put into a PLL-only mode with TX ENABL and RX ENABL both high. This condition is used to provide time for the synthesizer to turn on and obtain lock before turning on the receiver or transmitter. Note that LVL ADJ needs to be held low for PLLonly mode. Sometimes, it is desirable to ramp up the power amplifier to minimize load pulling on the VCO. To do this with the RF2915, first put the RF2915 into PLL mode by putting TX ENABL and RX ENABL high. Then, ramp up LVL ADJ to turn on the transmitter and PA. The rate at which LVL ADJ is allowed to ramp up is dependent on the PLL loop bandwidth. VCC pushing also affects the VCO frequency. A good low pass filter on VCC will minimize the VCC pushing effects. 11-120 Rev A7 001011 RF2915 RX ENABL LVL ADJ VCC3 DATA OUT VCC1 GND4 VCO OUT RESNTR- Pin Out 32 31 30 29 28 27 26 25 TX ENABL 1 24 RESNTR+ TX OUT 2 23 MOD IN GND2 3 22 IF2 OUT RX IN 4 21 DEMOD IN GND1 5 20 GND6 9 10 11 12 13 14 15 16 IF1 BP+ IF1 BP- IF1 OUT 17 IF2 IN IF1 IN MIX IN 8 RSSI 18 IF2 BP+ VREF IF GND3 7 MIX OUT 19 IF2 BP- GND5 LNA OUT 6 TRANSCEIVERS 11 Rev A7 001011 11-121 RF2915 915 MHz Application Schematic VCC 10 Ω 10 nF 10 nF 22 pF 22 pF 10 Ω PLL LOOP BANDWIDTH ~10 kHz PLL IC VCC DATA OUT 220 pF 33 pF 22 kΩ 2.2 nF LVL ADJ 10 kΩ VCC 4.7 nH RX ENABL 32 TX ENABL 1 100 pF Control Logic 2 915 MHz SAW 31 30 29 28 27 26 25 Gain Control 3 22 pF 22 1.5 kΩ 5 pF 4 FM Disc. LNA 5 10 Ω 20 10 nF 10 nH 6 10 nF 10 nF 21 100 pF VCC 10 nF 4.7 nH MOD IN 23 PA 100 Ω 4 pF D1 SMV1234 -011 24 19 Linear RSSI 22 pF 7 10 nF 18 10 pF 8 17 Filter 9 11 10 11 12 13 14 15 16 10 nF 10 nF TRANSCEIVERS VCC 10 Ω 8.2 uH 10 nF 22 pF RSSI 11 pF Filter 11-122 51 kΩ 10 pF Rev A7 001011 RF2915 Evaluation Board Schematic (Download Bill of Materials from www.rfmd.com.) J5 REF OSC VCC R1 10 Ω C2 0.1µF C3 0.1µF C1 22 pF C4 22 pF R2 V 10 Ω CC R30* 0Ω VC C50 22 pF R4 100 Ω C LVL ADJ RX ENABL P3-3 L3** 32 31 30 29 28 27 26 25 C81 4.7 µF C42 10 nF C18 0.1 µF VPLL TX ENABL 1 C6 22 pF L1** J2 RF 2 L8/R80** C9** Control Logic C8** 22 4 C19 5 pF 21 U4 CDF107BA0 C15 10 nF C7 22 pF LNA 5 20 L4** 6 VCC R7 10 Ω 19 Linear RSSI 7 R6* N/C C22 22 pF PHS P 4 VP 17 F OUT C47 22 pF R13 1.2 kΩ C47 6.8 nF 16 LMX2315 6 DO 15 FC 14 LE 8 LD 13 DATA C20 10 nF PLL LOOP BW ~5 kHz R60 0Ω 9 NC 12 NC 10 F IN 11 CLK L7* TBD J4 MOD IN R27 12 kΩ C14 10 nF R28 12 kΩ 5 9 9 L5 8.2 µH VCC R9 10 Ω C25 22 pF C26 10 nF R8 3.2 kΩ 10 11 12 13 14 C10 10 nF 15 C12 10 nF F2 SFECV10.7 MS3S-A-TC C24 F1 11 pF SFECV10.7 MS3S-A-TC 16 C27* 10 nF C28* 120 pF 8 R29 12 kΩ 3 7 2 6 1 R24 27 kΩ P5 C13 10 nF R3 51 kΩ 4 P6 DB9 17 C21** RSSI C13 10 pF P4-1 NC 1 P5-2 2 Enable (PLL IC) P5-3 3 Data (PLL IC) P5-4 4 Clock (PLL IC) * Denotes components that are normally depopulated. L6* 2.2 µH ** Component values for the different eval versions: Freq L1 L8/R80 C9 C8 C30 L4 C21 L2/L3 C16 D1 433 MHz 868 MHz 915 MHz 22 nH 8.2 nH 8.2 nH 22 nH jumper jumper 8 pF 4 pF 4 pF 15 pF 4 pF 4 pF 8 pF N/C N/C 47 nH 12 nH 10 nH 33 pF 9 pF 10 pF 15 nH 4.7 nH 8.2 nH 7 pF 5 pF 1.5 pF SMV-1235-011 (Alpha) SMV-1234-011 (Alpha) SMV-1233-011 (Alpha) R25 27 kΩ R26 27 kΩ P1 P1-1 J3 MIX OUT BI SW 7 GND C48 0.1 µF 18 8 C23 10 nF C5 4.7 µF R5 1.5 kΩ C29 4.7 µF 18 5 VCC 23 PA 3 C30** C49* L2** VPLL 19 N C43 10 nF R14 10 kΩ 24 Gain Control 20 PWRD 2 NC 3 OSC OUT C17 22 pF C16** D1** P3-2 PHS R 1 OSC IN X1* 10 MHz J1 RX OUT P2-1 R15 0Ω C41 10 nF NC 5 P3 NC 6 1 GND NC 7 P3-2 2 TX ENABL NC 8 P3-3 3 RX ENABL P3-4 4 NC P3-5 5 NC P1-3 9 NC 10 GND 1 VCC (RF2915) 2 GND 3 VPLL (LMX2315) P2 P2-1 P2-3 1 LVL ADJ 2 GND 3 NC P4 P4-1 1 RSSI 2 GND TRANSCEIVERS 11 Rev A7 001011 11-123 RF2915 Evaluation Board Layout Board Size 3.070" x 3.670" Same board layout is used for the -L, -M, and -H versions TRANSCEIVERS 11 11-124 Rev A7 001011 RF2915 TRANSCEIVERS 11 Rev A7 001011 11-125 RF2915 TRANSCEIVERS 11 11-126 Rev A7 001011 RF2915 TX Power Output and ICC versus Level Adjust at 433MHz, 3.6V VCC 30.0 TX Power Output and ICC versus Level Adjust at 868MHz, 3.6V VCC 5.0 Icc(868) 20.0 -5.0 15.0 -10.0 1.0 1.5 2.0 2.5 3.0 3.5 -5.0 20.0 -10.0 15.0 10.0 -15.0 10.0 5.0 -20.0 4.0 0.5 1.0 1.5 2.0 2.5 3.0 LVL ADJ (V) LVL ADJ (V) TX Power Output and ICC versus Level Adjust at 905MHz, 3.6V VCC Receive Current versus VCC (including LMX2315 IC) 30.0 9.0 Pout(905) Icc (433) Icc(905) Icc (868) 0.0 25.0 8.0 -5.0 20.0 7.0 -10.0 15.0 6.0 -15.0 10.0 5.0 5.0 4.0 -20.0 0.0 5.0 0.0 ICC (mA) RF P 0 (dBm) 5.0 0.5 25.0 ICC (mA) 0.0 -15.0 0.0 RF P 0 (dBm) 25.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 3.5 4.0 Icc (905) ICC (mA) RF P 0 (dBm) Icc(433) 5.0 0.0 30.0 Pout(868) Pout(433) 4.0 11 2.5 3.0 3.5 4.0 4.5 LVL ADJ (V) Supply Voltage (V) RSSI versus RF Input RSSI Output versus Temperature VCC = 2.4V 2.5 3.0 433 MHz 868,905 MHz 2.5 2.0 5.0 5.5 -40°C 10°C 25°C 40°C 85°C RSSI Output (V) RSSI (V) 2.0 1.5 1.5 1.0 1.0 0.5 0.5 0.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 RF Input (dBm) Rev A7 001011 -60.0 -50.0 -40.0 0.0 -130.0 -110.0 -90.0 -70.0 -50.0 -30.0 -10.0 10.0 Received Signal Strength (dBm) 11-127 TRANSCEIVERS 10.0 RF2915 TRANSCEIVERS 11 11-128 Rev A7 001011