SCBS347 − MAY 1994
•
•
•
•
•
•
•
DL PACKAGE
(TOP VIEW)
Member of the Texas Instruments
Widebus Family
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
Typical VOLP (Output Ground Bounce)
< 1 V at VCC = 5 V, TA = 25°C
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes
PCB Layout
High-Drive Outputs (− 32-mA IOH,
64-mA IOL )
Packaged in Plastic 300-mil Shrink
Small-Outline (SSOP) Packages
1OE
1Y1
1Y2
GND
1Y3
1Y4
VCC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
VCC
4Y1
4Y2
GND
4Y3
4Y4
4OE
description
The SN74ABT16241 is a 16-bit buffer and line
driver designed specifically to improve both the
performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
receivers and transmitters. The device can be
used as four 4-bit buffers, two 8-bit buffers, or one
16-bit buffer. This device provides true outputs
and complementary output-enable (OE and OE)
inputs.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
2OE
1A1
1A2
GND
1A3
1A4
VCC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
VCC
4A1
4A2
GND
4A3
4A4
3OE
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of
the driver. OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined
by the current-sourcing capability of the driver.
The SN74ABT16241 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pin
count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN74ABT16241 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
INPUTS
INPUTS
1OE, 4OE
1A, 4A
OUTPUTS
1Y, 4Y
2OE, 3OE
2A, 3A
OUTPUTS
2Y, 3Y
L
H
H
H
H
H
L
L
L
H
L
L
H
X
Z
L
X
Z
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.
Copyright 1994, Texas Instruments Incorporated
!"#$%! & '("")% $& ! *(+,'$%! -$%).
"!-('%& '!!"# %! &*)''$%!& *)" %/) %)"#& ! )0$& &%"(#)%&
&%$-$"- 1$""$%2. "!-('%! *"!')&&3 -!)& !% )')&&$",2 ',(-)
%)&%3 ! $,, *$"$#)%)"&.
• DALLAS, TEXAS 75265
• HOUSTON, TEXAS 77251−1443
POST OFFICE BOX 655303
POST OFFICE BOX 1443
2−1
SCBS347 − MAY 1994
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
2OE
2A1
2A2
2A3
2A4
1
25
3OE
47
2
46
3
44
5
43
6
1Y1
3A1
1Y2
3A2
1Y3
3A3
1Y4
3A4
48
8
40
9
38
11
37
12
2Y1
4A1
2Y2
4A2
2Y3
4A3
2Y4
4A4
13
35
14
33
16
32
17
3Y1
3Y2
3Y3
3Y4
24
4OE
41
36
30
19
29
20
27
22
26
23
4Y1
4Y2
4Y3
4Y4
SPICE block diagram
Node 6
VCC
Node 1
Node 199
Node 100
Node 2
Node 4
ABT16241IN
Node 5
ABT16241OUT
SPICE FUNCTION TABLE
NODE
2−2
1
2
L
H
H
L
NODE
OPERATION
OPERATION
4
5
6
Input
L
H
L
Output
Input
H
L
L
Output
X
Z
H
Hi-Z
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
SCBS347 − MAY 1994
SPICE netlist
*
*
*
*
*
*
*
*
*
ABT16241 SPICE I/O MODEL SUBCIRCUIT
ADVANCED BUS INTERFACE
ADVANCED SYSTEM LOGIC, TEXAS INSTRUMENTS
SUBCIRCUITS:
ABT16241IN, ABT16241OUT
PACKAGE PARASITICS
.LIB ’PKGS.LIB’
PROCESS
.LIB
.LIB
.LIB
SSOP48
MODELS
’EPIC2B.LIB’ NOMINAL_L13
’EPIC2B.LIB’ STRONG_L13
’EPIC2B.LIB’ WEAK_L13
*
*
*
* ABT16241 INPUT SUBCIRCUIT
*
NODES:
INPUT NODE
*
|
INTERNAL OUTPUT NODE
*
|
|
VCC
*
|
|
|
GND
*
|
|
|
|
.SUBCKT ABT16241IN
1
2
199
100
X_PKGIN
1
1001
SSOP48_47
X_PKGVCC
199
1199
SSOP48_07
X_PKGGND
100
1100
SSOP48_04
XABT16241IN
1001 2
1199 1100
ABT16241__IN
.ENDS ABT16241IN
*
* ABT16241 OUTPUT SUBCIRCUIT
*
NODES:
INTERNAL INPUT NODE
*
|
OUTPUT NODE
*
|
|
INTERNAL OE NODE
*
|
|
|
VCC
*
|
|
|
|
GND
*
|
|
|
|
|
.SUBCKT ABT16241OUT
4
5
6
199
100
X_PKGOUT
5
1005
SSOP48_02
X_PKGVCC
199
1199
SSOP48_07
X_PKGGND
100
1100
SSOP48_04
XABT16241OUT
4
1005 6
1199 1100 ABT16241__OUT
.ENDS ABT16241OUT
*
.SUBCKT ABT16241__IN
501
502
599
500
XP1
502
504
506
599
PM
WP=200U
LP=0.8U
XP2
509
502
599
599
PM
WP=20U
LP=0.8U
XP3
506
509
599
599
PM
WP=85U
LP=0.8U
XP4
508
500
599
599
PM
WP=50U
LP=0.8U
XN1
502
504
500
500
NM
WN=220U
LN=0.8U
XN2
509
502
500
500
NM
WN=20U
LN=0.8U
XN4
599
500
508
500
NM
WN=20U
LN=0.8U
QA
599
508
507
Q2_NPN
10
QB
599
507
506
Q5_NPN
60
Q_ESD1
501
500
500
Q7_NPN
200
Q_ESD
504
505
500
Q5_NPN
46
XR1
506
507
507
507
RMOS
WR=4U
RES=6K
RESD1
501
504
50
RESD2
505
500
1K
CBP
501
500
0.3P
CL
502
500
0.2P
.ENDS ABT16241__IN
*
.SUBCKT ABT16241__OUT
601
602
603
699
600
XP1
605
603
699
699
PM
WP=200U
LP=0.8U
XP4
601
603
621
699
PM
WP=40U
LP=0.8U
XP5
613
601
605
699
PM
WP=30U
LP=0.8U
XP10
618
603
699
699
PM
WP=50U
LP=0.8U
XP11
607
612
605
699
PM
WP=60U
LP=0.8U
XN1
607
601
608
600
NM
WN=100U
LN=0.8U
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
2−3
SCBS347 − MAY 1994
SPICE netlist (continued)
XN2
606
619
XN3
608
609
XN4
608
603
XN6
613
603
XN7
602
621
XN8
621
603
XN9
601
622
XN10
619
619
XN11
620
604
XN12
613
601
QM1
616
615
QM2
602
608
QM3
614
613
QD4
614
614
QDR1
615
615
D1
613
614
D2
699
617
XR1
606
605
XR2
607
606
XR3
614
605
R4
616
617
XR10
619
618
XPVREF
670
603
XNVREF
671
671
XRVREF1
604
670
XRVREF2
671
604
XNCLAMP
673
612
DCLAMP1
608
673
DCLAMP2
674
602
XPNOR1
675
609
XPNOR2
612
611
XNNOR1
612
611
XNNOR2
612
609
XP_INV1
609
601
XN_INV1
609
601
XP_INV2
622
603
XN_INV2
622
603
XP_INV3
610
603
XN_INV3
610
603
XP_INV4
611
610
XN_INV4
611
610
CBP
602
600
.ENDS ABT16241__OUT
*
2−4
607
600
600
600
600
600
621
620
602
600
602
600
615
616
613
600
600
600
600
600
600
600
600
600
600
605
606
605
605
606
605
618
699
600
670
604
674
618
699
600
670
604
600
699
675
600
600
699
600
699
600
699
600
699
600
699
699
600
600
699
600
699
600
699
600
699
600
NM
NM
NM
NM
NM
NM
NM
NM
NM
NM
Q9_NPN
Q11_NPN
Q4_NPN
Q2_NPN
Q2_NPN
D1_GDS
D9_GSD
RMOS
RMOS
RMOS
RMOS
PM
NM
RMOS
RMOS
NM
D6_GSD
D6_GSD
PM
PM
NM
NM
PM
NM
PM
NM
PM
NM
PM
NM
•
WN=50U
WN=25U
WN=80U
WN=25U
WN=100U
WN=10U
WN=20U
WN=25U
WN=25U
WN=40U
200
600
15
8
8
156
4700
WR=6U
WR=4U
WR=6U
10
WR=3U
WP=50U
WN=30U
WR=3U
WR=3U
WN=250U
800
800
WP=30U
WP=30U
WN=6U
WN=6U
WP=20U
WN=10U
WP=15U
WN=5U
WP=4U
WN=4U
WP=4U
WN=4U
0.3P
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
LN=0.8U
LN=0.8U
LN=0.8U
LN=0.8U
LN=0.8U
LN=0.8U
LN=0.8U
LN=0.8U
LN=0.8U
LN=0.8U
RES=1K
RES=3K
RES=1K
RES=20K
LP=0.8U
LN=0.8U
RES=20K
RES=1.5K
LN=0.8U
LP=0.8U
LP=0.8U
LN=0.8U
LN=0.8U
LP=0.8U
LN=0.8U
LP=0.8U
LN=0.8U
LP=0.8U
LN=0.8U
LP=0.8U
LN=0.8U
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74ABT16241DGGR
OBSOLETE
TSSOP
DGG
48
TBD
Call TI
Call TI
SN74ABT16241DL
OBSOLETE
SSOP
DL
48
TBD
Call TI
Call TI
SN74ABT16241DLR
OBSOLETE
SSOP
DL
48
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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