UC1886 UC2886 UC3886 Average Current Mode PWM Controller IC FEATURES DESCRIPTION • 10.3V - 20V Operating Range The UC3886 family of PWM controller ICs is designed for DC-to-DC converters with average current mode control. It is designed for use in conjunction with the UC3910 4-bit DAC and Voltage Monitor. The UC3886 drives an external N-channel MOSFET and can be used to power the Intel Pentium® Pro and other high-end microprocessors. • Low Offset Voltage Amplifier • High Bandwidth Current and Voltage Amplifiers • Low Offset Current Sense Amplifier • Undervoltage Lockout • Trimmed 5 Volt Reference • Externally Programmable Oscillator Charge Current • 1.5A Peak Totem Pole Output • Available in 16-pin DIL or SOIC Packages BLOCK DIAGRAM The UC3886 in conjunction with the UC3910 converts 5VDC to an adjustable output ranging from 2.0V to 3.5V in 100mV steps with 35mV DC system accuracy. The oscillator is programmed by the user’s selection of an external resistor and capacitor, and is designed for 300kHz typical operation. The voltage and current amplifiers have 3.5MHz gain-bandwidth product to satisfy high performance system requirements. The internal current sense amplifier permits the use of a low value current sense resistor, minimizing power loss. It has inputs and outputs accessible to allow user-selection of gain-setting resistors, and is internally compensated for a gain of 5 and above. The command voltage input is buffered and provided for use as the reference for the current sense amplifier. The output of the voltage amplifier (input to the current amplifier) is clamped to 1 volt above the command voltage to serve as a current limit. The gate output can be disabled by bringing the CAO/ENBL pin to below 0.8 volts. UDG-95098-2 6/98 UC1886 UC2886 UC3886 CONNECTION DIAGRAM ABSOLUTE MAXIMUM RATINGS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V Output Current CAM, COMMAND, VSENSE, ISN, ISP . . . . . . . . . . . . . ± 1A Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 7V Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . –55°C to +150°C Lead Temperatue (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C DIL-16, SOIC-16 (Top View) J, N, or D Packages Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. ELECTRICAL CHARACTERISTICS Unless otherwise specified, VCC = 12V, VCOMMAND = 3.0V, CT = 1nF, RT = 10k, TA = TJ = 0°C < TA < 70°C for the UC3886. (Note: –25°C < TA < 85°C for the UC2886, and –55°C < TA < 125°C for the UC1886) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 10 15 mA 5 mA 10.3 10.8 V 0.25 0.4 V VCM = 3.0V (UC3886) 4 mV VCM = 3.0V (UC2886, UC1886) 15 mV Overall Supply Current VCC = 11V, Gate Open VCC = 9.3V Undervoltage Lockout Start Threshold 9.7 UVLO Hysteresis Voltage Error Amplifier Input Offset Voltage Input Bias Current VCM = 3.0V Input Offset Current VCM = 3.0V (UC3886) Open Loop Gain 2.5V < VCOMP < 3.5V VCM = 3.0V (UC2886, UC1886) 60 −2 µA 0.01 µA 0.1 µA 85 dB Common-Mode Rejection Ratio 2V < VCOMP < 4V 60 85 dB Power Supply Rejection Ratio 11V < VCC < 15V 60 85 dB Output High Voltage (Clamp) ICOMP = –100µA (UC3886) 3.95 4 ICOMP = –100µA (UC2886, UC1886) 3.9 4.1 V Output Low Voltage (Clamp) ICOMP = 100µA 1.9 2.7 V 4.05 V Output Sink Current VCOMP = 3.7V 0.9 Output Source Current VCOMP = 2.8V –0.15 −0.25 mA mA Gain-Bandwidth Product F = 100kHz 2 3.5 MHz 4.9 5 5.0V Reference Output Voltage IVREF = 1.0mA Total Variation Line, Load, Temperature 5.1 V 5.175 V Line Regulation Load Regulation 11V < VCC < 15V 10 mV 0 < IVREF < 2mA 15 mV −40 mA Short Circuit Current 4.825 –10 2 UC1886 UC2886 UC3886 ELECTRICAL CHARACTERISTICS Unless otherwise specified, VCC = 12V, VCOMMAND = 3.0V, CT = 1nF, RT = 10k, TA = TJ = 0°C < TA < 70°C for the UC3886. (Note: –25°C < TA < 85°C for the UC2886, and –55°C < TA < 125°C for the UC1886) PARAMETER TEST CONDITIONS MIN TYP IBUF = ± 500µA (UC3886) 0.98 1 IBUF = ± 500µA (UC2886, UC1886) 0.95 MAX UNITS Input Buffer Gain 1.02 V/V 1.05 V/V 2 mV Current-Sense Amplifier Input Offset Voltage VCM = 3.0V (UC3886) VCM = 3.0V (UC2886, UC1886) 6 mV Input Bias Current VCM = 3.0V -1 µA Input Offset Current VCM = 3.0V 0.2 µA Open Loop Gain 2V < VISO < 6V CMRR 0V < VCM < 4.5V 60 85 dB PSRR 11V < VCC < 15V 60 85 dB Output High Voltage IISO = –100µA 5 Output Low Voltage IISO = 1mA Output Source Current VISO = 2V Gain-Bandwidth Product F = 100kHz 60 85 dB V 1 −0.2 2 V mA 3.5 MHz Current Amplifier Input Offset Voltage VCM = 3.0V (UC3886) 13 mV VCM = 3.0V (UC2886, UC1886) 18 mV 1 µA Input Bias Current VCM = 3.0V Open Loop Gain 1V < VCAO < 3V CMRR 1.5V < VCM < 4.5V 60 85 dB PSRR 11V < VCC < 15V 60 85 dB Output High Voltage ICAO = –100µA 3 Output Low Voltage ICAO = 100µA 60 85 dB 3.3 V 1 V Output Source Current VCAO =1V −0.1 –0.25 mA Gain-Bandwidth Product F = 100kHz 2 3.5 MHz RT = 10k, CT = 1nF (UC3886) 90 100 RT = 10k, CT = 1nF (UC2886, UC1886) 85 Oscillator Frequency Frequency Change With Voltage 11V > VCC > 15V CT Peak Voltage kHz 115 kHz 1 % 2.6 2.8 1 1.2 V 1.6 1.8 2.0 V 1.6 2.2 V 0.5 V CT Valley Voltage CT Peak-to-Peak Voltage 110 V Output Section Output Low Voltage IGATE = 200mA Output High Voltage IGATE = –200mA Output Low Voltage 5V < VCC < 9V, IGATE = 10mA VCAO < 0.8V, IGATE = 10mA 0.5 V Rise/Fall Time CL = 1nF 150 ns Maximum Duty Cycle (UC3886) 90 % (UC2886, UC1886) 85 % 9 3 10.3 V UC1886 UC2886 UC3886 PIN DESCRIPTIONS GATE: (PWM Output) The output is a 1A totem pole driver. Use a series resistor of at least 5Ω to prevent interaction between the gate impedance and the output driver that might cause excessive overshoot. BUF: (Buffer Output) The voltage on COMMAND pin is buffered and presented to the user here. This voltage is used to provide the operating bias point for the current sense amplifier by connecting a resistor between BUF and ISP. Decouple BUF with 0.01µF or greater to SGND. CAM: (Current Amplifier Minus Input) The average load current feedback from ISO is typically applied through a resistor here. ISN: (Current Sense Amplifier Inverting Input) A resistor to the low side of the average current sense resistor and a resistor to ISO are applied to this pin to make a differential sensing amplifier. CAO/ENBL: (Current Amplifier Output/Chip Enable) The current loop compensation network is connected between CAO/ENBL and CAM, the inverting input of the current amplifier. The voltage at CAO/ENBL is the input to the PWM comparator and regulates the output voltage of the system. The GATE output is disabled (held low) unless the voltage at this pin exceeds 1.0 volts, allowing the PWM to force zero duty cycle when necessary. The user can force this pin below 0.8 volts externally with an open collector, disabling the GATE drive. ISO: (Current Sense Amplifier Output) A feedback resistor to ISN is connected here to make a differential sensing amplifier. The voltage at this pin is equal to (VBUF + A • IAVG • RSENSE) where A is the user determined gain of the differential amplifier, IAVG is the average load current of the system, and RSENSE is the average current sensing resistor. For stability, A must be greater than 5. Set A such that A • ISC • RSENSE = 1.0V where ISC is the user-determined short circuit current limit. COMMAND: (Voltage Amplifier Non-Inverting Input) This input to the voltage amplifier is connected to a command voltage, such as the output of a DAC. This voltage sets the switching regulator output voltage. ISP: (Current Sense Amplifier Non-Inverting Input) A resistor to the high side of the average current sense resistor and a resistor to BUF are connected to this pin to make a differential sensing amplifier. COMP: (Compensation, Voltage Amplifier Output) The system voltage compensation network is applied between COMP and VSENSE. The voltage at COMP is clamped to prevent it from going more than 1V above the COMMAND voltage. This is used to provide an accurate average current limit. The voltage on COMP is also clamped to 0.7V below the voltage on COMMAND. This is done to avoid applying a full charge to capacitors in the compensation network during transients, allowing quick recovery time and little overshoot. PGND: (Power Ground) The PWM output current returns to ground through this pin. This is separated from SGND to avoid on-chip ground noise generated by the output current. CT: (Oscillator Timing Capacitor) A capacitor from CT to SGND along with the resistor on RT, sets the PWM frequency and maximum duty cycle according to these formulas: VCC: (Positive Supply Voltage) This pin supplies power to the chip and to the gate drive output. Decouple to PGND and separately to SGND for best noise immunity. The reference (VREF), GATE output, oscillator, and amplifiers are disabled until VCC exceeds 10.3V. DMAX = 1 RT: (Oscillator Charging Current) This pin is held at 2V. Resistor RT from this pin to SGND sets the oscillator charging current. Use 5k < RT < 100k. SGND: (Signal Ground) For better noise immunity, signal ground is provided at this pin. V 2. 0 RT • 4. 0mA VREF: (Voltage Reference Output) An accurate 5V reference as provided at this pin. The output can deliver 2mA to external circuitry, and is internally short circuit current limited. VREF is disabled if VCC is below UVLO. Bypass 5V REF to SGND with an 0.01µF or larger capacitor for best stability. where DMAX is the maximum operating duty cycle, and RT is in ohms. FOSC = V • ((4. 0mA • RT ) 2 . 0V ) CT • 1. 8V • RT 2 • 4. 0mA 2. 0 VSENSE: (Voltage Sense Input) This input is connected to COMP through a feedback network and to the power supply output through a resistor or a divider network. where FOSC is the UC3886 oscillator switching frequency in Hz, RT is in ohms, and CT is in farads. 4 UC1886 UC2886 UC3886 APPLICATION INFORMATION 1.00 OSCILLATOR 0.98 The UC3886 oscillator is a saw tooth. The rising edge is governed by a current controlled by RT flowing into the capacitor CT. The falling edge of the sawtooth sets the dead time for the output. Selection of RT should be done first, based on desired maximum duty cycle. CT can then be chosen based on the desired frequency, FS, and the value of RT. The design equations are: DMAX FOSC = 1 DMAX 0.96 0.94 0.92 0.90 V 2. 0 0.88 RT • 4. 0mA 2 . 0V • ( (4 . 0 mA • RT ) 2 . 0V ) = CT • 1. 8V • RT 2 • 4. 0mA 0 20 40 60 80 100 120 RT (kΩ) Figure 2. Programming Maximum Duty Cycle with RT FSWITCH (kHz) 1000 100pF 100 220pF 470pF UDG-96022 1nF 10 20 0 Figure 1. Oscillator 100 0.600 The Current Sense Amplifier gain, GCSA, is given by the ratio of R2/R1. The output of the Current Sense Amplifier at the ISO pin is given by RT = 5k 0.500 RT = 100k R2 + VSENSE • R1 TD (us) 0.400 The Current Sense Amplifier gain, GCSA, must be programmed to be greater than or equal to 5.0 (14dB), as this amplifier is not stable with gain below 5.0. The Current Sense Amplifier gain is limited on the high side by its Gain-Bandwidth product of 2.5MHz. Therefore GCSA must be programmed between and 80 Figure 3. Programming Switching Frequency with CT The UC3886 Current Sense Amplifier is used to amplify a differential current sense signal across a low value current sense resistor, RSENSE. This amplifier must be set up as a differential amplifier as shown. GCSA_MIN = 5.0 60 RT (kΩ) Configuring the Current Sense Amplifier VISO = VBUF 40 0.300 0.200 0.100 0.000 100 300 500 700 CT (pF) GCSA_MAX = 2.5MHz/FSWITCH Figure 4. Deadtime vs. CT and RT 5 900 1100 UC1886 UC2886 UC3886 APPLICATION INFORMATION (cont.) Enabling/Disabling the UC3886 Gate Drive The CAO/ENBL pin can be used to Disable the UC3886 gate drive by forcing this pin below 0.8V, as shown. Bringing the voltage below the valley of the PWM oscillator ramp will insure a 0% duty cycle, effectively disabling the gate drive. A low noise open collector signal should be used as an Enable/Disable command. UDG-96024 UDG-96023 Figure 6. Enabling/Disabling the UC3886 Figure 5. Configuring the Current Sense Amplifier TYPICAL APPLICATIONS UDG-96025 Figure 7. The UC3886 Configured in a Buck Regulator 6 UC1886 UC2886 UC3886 TYPICAL APPLICATIONS (cont.) UDG-96021 Figure 8. UC3886 Configured with the UC3910 for a Pentium® Pro DC/DC Converter UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 FAX (603) 424-3460 7 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. 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