IR3Y30M/M1 CCD Signal Processors for B/W CCD Cameras IR3Y30M/M1 DESCRIPTION The IR3Y30M/M1 are bipolar single-chip signal processing ICs with built-in low-pass filter and delay line for B/W video cameras. They realize both downsizing and cost reduction of the finished set. FEATURES • Low power consumption : 265 mW (TYP.) • Wide AGC range : –3 to +29 dB • High speed sample-and-hold circuits : pulse width 15 ns (MIN.) • Signal processing from CCD output to 75 $ video output is possible • Built-in low-pass filter • Built-in comparator for electronic exposure control • Built-in aperture circuit and delay line • Single +5 V power supply • Packages – IR3Y30M : 48-pin QFP (QFP048-P-1010) – IR3Y30M1 : 48-pin QFP (QFP048-P-0707) 0.5 mm pin-pitch COMPARISON TABLE Package Power consumption PD derating ratio Operating temperature IR3Y30M 48-pin QFP (QFP048-P-1010) 725 mW IR3Y30M1 48-pin QFP (QFP048-P-0707) 560 mW 5.8 mW/˚C –30 to +75 ˚C 4.5 mW/˚C –30 to +70 ˚C In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device. 1 IR3Y30M/M1 PIN CONNECTIONS TOP VIEW PGND FCDS FS PVCC CDS OUT CLAMP1 AGC OP IN MAX GAIN AGC OP OUT AGC CTRL VC VREF 48-PIN QFP 48 47 46 45 44 43 42 41 40 39 38 37 CCD IN 1 CLAMP BIAS 2 IRIS GAMMA 3 WINDOW 4 IRIS OUT 5 VCC1 6 GND1 7 EE NR 8 SET NR 9 IRIS IN 10 SET UP 11 EE UP 12 36 AGC OUT 35 LPF ADJ 34 AMP1 IN 33 C1 32 AGC DET 31 GND2 30 GAMMA ADJ 29 KNEE ADJ 28 GAMMA OUT 27 DL ADJ 26 HAPA IN 25 APA CTRL SYNC BLK CLP BCLIP VCC2 VIDEO OUT PEDESTAL WCLIP CLAMP2 AMP2 OUT GAIN CTRL C3 C2 13 14 15 16 17 18 19 20 21 22 23 24 (QFP048-P-1010) (QFP048-P-0707) 2 5V WINDOW CCD 3 SET NR EE NR IRIS OUT 7 6 + GND1 Vcc1 12 EE UP 11 SET UP S/H FS 5V BLK CLP 14 BLK CLP PULSE SEPA + – IRIS COMP + – IRIS GAMMA CLAMP IRIS OP AMP + – BLK WINDOW WINDOW IRIS GAMMA CLAMP BIAS CCD IN 10 IRIS IN 9 8 5 4 3 2 1 48 PGND 5V FCDS FS 47 FCDS 46 + BLK CLP + 16 Vcc2 – BUFF OUT SYNC + 13 18 SYNC 19 WCLIP CLP W CLIP PEDESTAL CLP 20 CLAMP2 CLAMP + AGC – 41 39 MIX 21 + C3 – + – BCLIP BASE CLIP BLK 24 C2 + – DL GND2 30 32 31 KNEE ADJ 26 27 APA CTRL 25 HAPA IN DL ADJ 28 29 GAMMA ADJ GAMMA OUT GAMMA KNEE CLEANING AMP1 C1 33 AGC DET 34 AMP1 IN CLAMP CLP – + APA AMP CLP 22 23 15 GAIN CTRL CLP AMP2 LPF 37 VREF 35 LPF ADJ 36 AGC OUT VREF VC 38 AMP2 OUT AGC CTRL AGC OP MAX GAIN OUT 40 AGC OP AMP H CLIP + – 42 AGC OP IN PEDESTAL SYNC CLAMP VIDEO OUT 17 IRIS AMP + CLP CLAMP1 44 CDS OUT 43 – PVcc 45 + IR3Y30M/M1 BLOCK DIAGRAM IR3Y30M/M1 PIN DESCRIPTION PIN NO. PIN NAME VOLTAGE EQUIVALENT CIRCUIT DESCRIPTION Input for the signal from CCD area VCC1 sensor. 2.5 V bias applied internally. 9k 25 k 1 CCDIN 2.5 V 200 1 25 k 9k GND Feed through level of the input signal is clamped to this pin voltage. VCC1 9k 21 k 2 CLAMP BIAS 2.9 V 2.9 V bias applied internally. Connect capacitor between this pin 200 and GND. 2 29 k 9k GND Gamma adjustment of the exposure VCC1 circuit. This pin is preset to 3.1 V, 25 k and gamma becomes 0.45 at open. 200 3 IRIS GAMMA 3.1 V 6.4 k 3 33.8 k 25 k 25 k GND Window pulse input for the exposure VCC1 18.8 k circuit. Outputs the signal while "H". 1k 4 WINDOW 4 7k 190 µ GND Output for the exposure signal. Connect a resistor between this pin VCC1 20 k 50 and GND. 5 IRIS OUT 2.3 V 1k 5 GND 4 IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE 6 VCC1 7 EQUIVALENT CIRCUIT DESCRIPTION Power supply for analog circuits. GND1 Ground for analog circuits. Comparator output for electronic exposure control. VCC1 50 k 200 8 EE NR 8 GND 9 SET NR 10 IRIS IN 11 SET UP High reference voltage input of the VCC1 comparator for electronic exposure control. 2µ Input of the amplifier for electronic 200 exposure control. This amplifier has 5 times gain. GND Low reference voltage input of the comparator for electronic exposure control. Output of the comparator for electronic exposure control. VCC1 50 k 200 12 EE UP 12 GND Synchronous signal input. VCC1 40 µ 5k 13 SYNC 13 GND 5 IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE EQUIVALENT CIRCUIT VCC1 (pulse for optical black clamp and 40 µ pulse for blanking) 5k 14 DESCRIPTION Composite pulse input. 5k BLK CLP 14 40 µ GND Adjustment for the base clip level in VCC1 the aperture circuit. Eliminates the low-level noise of 40 µ 15 aperture signal. When opened, base clip is canceled. 5k BCLIP 15 GND 16 Power supply for output amplifier circuits. VCC2 Video signal output. VCC2 At 75 $ terminated : 1 Vp-p (Synchronous level 0.3 Vp-p) 100 17 VIDEO OUT 1.5 V 17 GND Blanking level adjustment. 100 mV when opened. VCC2 45 k 18 PEDESTAL 5k 2.5 V 18 100 µ GND 6 IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE EQUIVALENT CIRCUIT DESCRIPTION White clip adjustment. VCC2 120% when opened. 35 k 19 WCLIP 15 k 3.3 V 19 50 µ 100 µ GND Input for encoder circuit. Black level VCC2 of input signal is clamped to 2.3 V. 20 CLAMP2 2.3 V 5k 5k 20 50 µ GND Output for the gain control amplifier. VCC1 50 µ 21 AMP2 OUT 100 1.0 V 100 21 1m GND Controls the output amplitude at pin No. 21. VCC1 22 GAIN CTRL 2.5 V Gain is controlled in the range from 6 to 12 dB. 10 k 39 k It is approximately 10 dB when this pin is open. 1.8 k 22 200 µ 200 µ GND Feedback clamp detector. Connect VCC1 capacitor between this pin and GND. 50 µ 23 C3 1.8 V 23 3p 3p 50 µ 5 k GND 7 IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE EQUIVALENT CIRCUIT DESCRIPTION Feedback clamp detector. Connect VCC1 50 µ 50 µ When the external DL circuit is used, this will be input pin to make the 200 24 C2 1.8 V aperture signal. 3p 24 capacitor between this pin and GND. 50 µ 5k 3p GND Adjustment for the horizontal VCC1 40 µ 25 APA CTRL 1.8 V 30.5 k aperture amount. It is approximately 12 dB when this pin is open. 19.5 k 25 100 µ GND Input for signal from pin 28. This signal is used as a main signal VCC1 when aperture signals are mixed. 200 26 HAPA IN 26 200 µ 100 µ GND Adjustment for built-in delay line. When 200 k$ resistor is connected VCC1 27 DL ADJ 1.2 V 200 between this pin and GND, delay line can be turned off. 4k 27 10 k GND Gamma and knee processed signal VCC1 output. 28 GAMMA OUT 2.3 V 28 220 µ GND 8 IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE EQUIVALENT CIRCUIT DESCRIPTION Knee adjustment. VCC1 120% when opened. 1k 40 k 29 KNEE ADJ 2.8 V 10 k 29 100 µ GND Gamma correction adjustment. VCC1 10 k 30 GAMMA ADJ 40 k 2.0 V 0.7 when opened. 10 k 30 200 µ 100 µ GND 31 GND2 Ground for analog circuits. Signal output for AGC control. VCC1 Connect resistor between this pin 50 µ and GND. 1k 32 AGC DET 2.0 V 32 100 µ GND Feedback clamp detector. Connect VCC1 capacitor between this pin and GND. 25 µ 33 C1 2.0 V 33 1p 50 µ 1p 10 k GND VCC1 10 k 200 34 AMP1 IN 34 1.65 k 170 µ 250 µ GND 9 Input for gamma and knee signal process. IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE EQUIVALENT CIRCUIT DESCRIPTION Adjustment for built-in LPF VCC1 1k 5p 35 characteristic. When connected resistor is 220 k$ or more between 3k this pin and GND, LPF can be LPF ADJ 200 35 turned off. GND AGC signal output. VCC1 100 100 36 AGC OUT 2.3 V 36 400 µ GND Reference voltage. VCC1 200 37 VREF 2.0 V 37 GND Bias for reference voltage. Connect VCC1 capacitor between this pin and GND. 22 k 200 38 VC 2.0 V 38 8k 20 k GND Gain control for AGC amplifier. Be VCC1 sure to input the voltage within the range from 2 to 4 V. 5k 39 AGC CTRL 39 50 µ GND 10 IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE EQUIVALENT CIRCUIT DESCRIPTION Output of the operation at amplifier VCC1 for AGC control. 40 200 AGC OP OUT 40 GND Adjustment for AGC amplifier VCC1 maximum gain. Maximum gain is 18 dB when opened. When applied 41 MAX GAIN 22 k 3.3 V voltage is 0.62 V or less, AGC circuit turns off and the amplifier is 28 k 41 50 µ 200 µ fixed to 0 dB. GND The operational amplifier for AGC control. VCC1 2µ 42 200 AGC OP IN 42 GND Input of AGC amplifier. Black level VCC1 1k 43 CLAMP1 is clamped at 2.0 V. 2.0 V 43 50 µ 1k GND CDS signal output. VCC1 100 100 44 CDS OUT 2.4 V 44 750 µ GND 11 IR3Y30M/M1 PIN NO. PIN NAME VOLTAGE 45 PVCC EQUIVALENT CIRCUIT DESCRIPTION Power supply for pulse circuits. Pulse input for sample-hold. PVCC 100 µ 200 46 FS 46 PGND Pulse input for feed-through level clamp. PVCC 200 µ 200 47 FCDS 47 PGND 48 PGND Ground for pulse circuits. 12 IR3Y30M/M1 FUNCTIONAL OPERATION CDS Circuit Exposure Circuit The feed-through level of the input signal is clamped by the clamp circuit. Then the signal period is sampled and other periods are held by the sample and hold circuit, so that signals can be obtained. Signals which have not been processed by AGC are amplified, suppressed by gamma correction, and then output. Control signals can be generated by inputting the above signals to pin 10 after detecting them. Aperture Circuit The video articulation can be increased by enhancing the signal contour. If the built-in delay line is not used, it can be turned off by using an external resistor of minimum 200 k$ at pin 27. To control the aperture amount, use a base clip. CCD Signal FCDS FS CDS OUT Gamma Output Highlight Clip Circuit Aperture Signal Before the AGC circuit, excessive signals of more than approximately 0.5 Vp-p are clipped. AMP2 Output AGC Amplifier Circuit The amplitude of output signals from the AGC amplifier is externally detected and the gain is controlled with control signals from the AGC operational amplifier. Decreasing voltage at pin 41 to 0.62 V or less causes the amplifier to be fixed to 0 dB. Output Circuit A load of 75 $ can be driven directly. In addition, the pedestal level can be controlled vertically. CAUTIONS • To control the aperture amount, apply base clip by controlling pin 15. • Avoid connecting or disconnecting an external resistor at pin 27 to prevent the malfunction of the built-in delay line. • Use the shortest possible distance to connect the bypass capacitors between the power supply and GND pins. The addition or removal of any external component should be determined by how the existing components are mounted. • This device is electronically sensitive. Handle only at electrostatically safe work stations. LPF Circuit The characteristics can be controlled with an external resistor at pin 35. Increasing the resistor to 220 k$ or more allows signals passing over the LPF to be output. Gamma and Knee Corrections Circuits In order to comply with the characteristics of CRT, the high-bright part is suppressed. Pin 29 and 30 can be used to control this suppression. If voltage at pin 30 is increased to 4 V or more gamma will be 1. 13 IR3Y30M/M1 ABSOLUTE MAXIMUM RATINGS PARAMETER Supply voltage Input voltage Comparator output voltage Power consumption SYMBOL CONDITIONS RATING IR3Y30M VCC1, VCC2 PVCC IR3Y30M1 UNIT 7 V 7 V VIA Except for pins 46 (FS) and 47 (FCDS) VCC V VIP Pins 46 (FS) and 47 (FCDS) –0.2 to PVCC + 0.2 V VSD PD VCC TA ≤ +25 ˚C PD derating ratio Operating temperature Storage temperature (Unless otherwise specified, TA = +25 ˚C) TA > +25 ˚C TOPR TSTG 725 560 V mW 5.8 4.5 mW/˚C –30 to +75 –30 to +70 –55 to +150 ˚C ˚C RATING 4.75 to 5.25 600 (MAX.) UNIT V mVp-p RECOMMENDED OPERATING CONDITIONS PARAMETER Supply voltage H-aperture signal SYMBOL APPLICABLE PINS VCC Pins 6 (VCC1), 16 (VCC2) and 45 (PVCC) VH-AP Pin 26 (HAPA IN) Standard CCD input signal Clamp pulse width VCCD tFS Pin 1 (CCD IN) Pin 46 (FS) 200 (TYP.) 15 (MIN.) mVp-p ns Sample-hold pulse width tFCDS Pin 47 (FCDS) 15 (MIN.) ns 14 IR3Y30M/M1 ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25 ˚C, VCC = 5.0 V, SW conditions/(a), V26 = 2.3 V, V34 = 2.0 V, V39 = 3 V, R27 = 30 k$, R35 = 22 k$) PARAMETER Supply current SYMBOL CONDITIONS ICC1 Measure pin 6 (VCC1). MIN. TYP. 43.0 MAX. 54.5 UNIT mA ICC2 Measure pin 16 (VCC2). 5.7 7.8 mA ICC3 Measure pin 45 (PVCC). 4.3 5.4 mA –30 –25 dB –2 0 2 dB 2.7 2.9 3.1 V 1.0 1.2 CDS Circuit With signal 1 applied to SG1, measure the Low frequency attenuation signal attenuation on TP44. FS = 5 V, FCDS GLF = Signal 2 (FCDS), VA = TP44 amplitude (f = 100 kHz), VB = TP44 amplitude (f = 10 MHz) GLF = 20*LOG (VA/VB) Signal 2 applied to SG1, FS and FCDS, Gain GCDS measure the amplitude on TP44. SG1 = 200 mVp-p, f = 10 MHz Clamp bias VCP/BIAS AGC Operational Amplifier Circuit Low level AOPL High level AOPH V42 = 3 V, Measure the voltage on I40 = +200 µA TP40B. SW40, SW42/(b) V42 = 1 V, I40 = –200 µA V 3.9 4.1 0.40 0.46 0.51 0 0.2 Exposure Operational Amplifier & Comparator Circuits With V10 = 2.3 V, measure the voltage of V9a (TP8 : L/H) and V11a (TP12 : H/L). Operational amplifier gain GOP With V10 = 2.4 V, measure the voltage of V9b (TP8 : L/H) and V11b (TP12 : H/L). V GOP = (V9b-V9a) or (V11b-V11a) SW9, SW10, SW11/(b) Comparator low level IOPL High level IOPH Change the voltage of V9 and V11, and measure the voltage on TP8 and TP12. V10 = 2.3 V SW9, SW10, SW11/(b) V 4.70 4.95 0.4 0.5 AGC Circuit Change the amplitude of signal 3 which is applied to SG43, and measure the amplitude Highlight clip level HCL on TP36 when TP36's output signal is clipped. SW43, SW41/(b), Pulse/CLP, V41 = 0 V, R35 = 220 k$ 15 0.6 Vp-p IR3Y30M/M1 PARAMETER AGC circuit (contd.) AGC maximum gain (1) AGC maximum gain (2) SYMBOL GAMAX1 GAMAX2 AGC minimum gain GAMIN AGCOFF gain GAOFF Output dynamic range CONDITIONS Apply signal 3 to SG43 and SG43 = 20 mVp-p measure the amplitude on TP36. V39 = 4 V, V41 = 5 V GA1 to GA4 = 20*LOG (TP36 amplitude/SG43 V39 = 4 V, SW41/(a) amplitude) SW41, SW43/(b), V39 = 2 V, V41 = 5 V SG43 = 200 mVp-p Pulse/CLP, R35 = 220 k$ V39 = 4 V, V41 = 0 V SG43 = 20 mVp-p SG43 = 400 mVp-p MIN. TYP. MAX. 27 29 31 15.5 18.0 20.5 UNIT dB –6.5 –3.5 –0.5 –2 0 2 0.55 0.75 3.5 4.5 Apply signal 3 to SG43 and measure the amplitude on TP36. DA SG43 = 50 mVp-p, SW41, SW43/(b), Pulse/CLP, V39 = 4 V, V41 = 5 V, Vp-p R35 = 220 k$ Frequency characteristic (1) Apply signal 4 to SG43. Increase the frequency of fA1 SG43 = 10 mVp-p R35 = 22 k$ signal 4 until the frequency V39 = 4 V components of the signal on MHz TP36 are 3 dB lower than Frequency characteristic (2) Frequency characteristic (3) fA2 that at f = 100 kHz, and measure the frequency of signal 4. SW41/(b), Pulse/CLP, V41 = 5 V fA3 SG43 = 200 mVp-p R35 = 220 k$ When measuring case (2), SG43 = 10 mVp-p adjust the V39 such that the amplitude of the output on R35 = 22 k$ 7.0 10.0 –35 –25 dB 0.4 0.6 0.8 V 1.84 1.94 2.04 V 0 0.15 0.30 V –0.30 –0.15 0 V V39 = 4 V f = 9.5 MHz TP36 is 200 mVp-p. Apply signal 3 to SG43, change V41, and AGC ON/OFF switching voltage VAGC measure the voltage of V41 when the gain on TP36 changes from –3.5 to 0 dB. The gain on TP36 : 20*LOG (TP36 amplitude/SG43 amplitude) SG43 = 400 mVp-p, SW43, SW41/(b), Pulse/CLP, V39 = 2 V, R35 = 220 k$ Reference voltage 1 VREF Reference voltage 2 ∆VREF2 Measure the voltage on TP37A. With I37 = +500 µA, measure the change in voltage on TP37B. SW37/(b) With I37 = –500 µA, measure the change in Reference voltage 3 ∆VREF3 voltage on TP37B. SW37/(b) 16 IR3Y30M/M1 PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT 10.5 11.5 12.5 dB 0.25 0.32 0.40 Vp-p 1.5 1.9 2.30 Exposure Circuit Exposure AMP gain GI Gamma output level ‹PRE Apply signal 3 to SG43 and SG43 = 200 mVp-p measure the amplitude on TP5. V3 = 5 V, V4 = 5 V SW3/(a) SG43 = 800 mVp-p Output dynamic range DI SW3, SW4, SW43/(b), Pulse/CLP, BLK Black level BI Measure the voltage on TP5. SW4/(b), Pulse/CLP, BLK, V4 = 0 V 2.15 V3 = 5 V, V4 = 5 V Vp-p 2.45 Black level offset 1 BIOFF1 Measure the voltage on TP5. V4 = 5 V –50 0 50 Black level offset 2 BIOFF2 SW4/(b), Pulse/CLP, BLK V4 = 0 V Apply signal 4 to SG43. Increase the –50 0 50 0.7 1.1 fI characteristic level mV frequency of signal 4 until the frequency components of the signal on TP5 are 3 dB Frequency Window OFF output V lower than that at f = 100 kHz, and measure MHz the frequency of signal 4. SG43 = 200 mVp-p, V4 = 5 V, SW4, SW43/(b), Pulse/CLP, BLK Apply signal 3 to SG43 and measure the OWOFF amplitude on TP5. SG43 = 200 mVp-p, 40 70 mVp-p 1.2 1.4 1.6 V 0.5 1.2 3.0 µA 13 14 15 dB 1.20 1.40 Measure the voltage on TP32. Pulse/CLP, BLK 1.9 2.0 2.1 V Apply signal 3 to SG34 and 310 410 510 mVp-p SW4, SW43/(b), Pulse/CLP, BLK, V4 = 0 V Same as in the window OFF output level Window ON switching voltage VW measurement. Increase V4, and measure V4 when the amplitude of output signal on TP5 is not changed. IW Window input current With V4 = 5 V, measure input current on pin 4. SW4/(b) AMP1 Circuits Apply signal 3 to SG34 and measure the AMP1 gain Output dynamic range Black level GAMP1 DAMP1 BAMP1 amplitude on TP32. SW34/(b), Pulse/CLP, BLK, SG34 = 100 mVp-p, Black level = 2 V Same as in the AMP1 gain measurement. Measure output dynamic range on TP32. Vp-p Gamma & Knee Circuits Gamma gain (1) G‹1 Gamma gain (2) G‹2 Gamma gain (3) G‹3 measure the amplitude on SG34 = 100 mVp-p SG34 = 30 mVp-p TP28. SW34/(b), Pulse/CLP, BLK, Input black level = 2 V SG34 = 200 mVp-p 17 –6.4 dB 1.3 IR3Y30M/M1 PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT 450 510 580 mVp-p –50 0 50 –50 0 50 Gamma & Knee Circuits (contd.) Apply signal 3 to SG34 and measure the Gamma OFF gain G‹OFF (1) CL1 Cleaning offset Frequency characteristic (2) CL2 amplitude on TP28. SW29, SW30, SW34/(b), Pulse/CLP, BLK, SG34 = 100 mVp-p, Black level = 2 V, V29 = 5 V, V30 = 5 V Measure the amplitude of SW30/(a) TP28 between BLK level and SW30/(b), black level. Pulse/CLP, BLK V30 = 5 V Apply signal 4 to SG34. Increase the mV frequency of signal 4 until the frequency components of the signal on TP28 are 3 dB f‹ lower than that at f = 100 kHz, and measure the frequency of signal 4. SW34/(b), 6.0 MHz Pulse/CLP, BLK, SG34 = 100 mVp-p, Black level = 2 V Aperture & AMP2 Circuits Aperture maximum GAPMAX gain Aperture preset gain Aperture minimum gain GAPPRE GAPMIN Apply signal 3 to SG26 and measure the amplitude on TP21. SW26A/(b), Pulse/CLP, BLK, SW25/(b), V25 = 0 V SG26 = 100 mVp-p, Base clip output BCL Delay line output DLOUT SW25/(b), V25 = 5 V SW15/(b), V15 = 0 V SW25/(b), V25 = 5 V Apply signal 3 to SG34 and measure the Black level = 2.3 V amplitude on TP21. SW15, SW23, SW25, SW29, SW30, SW34/(b), Pulse/CLP, BLK, 840 1 130 740 840 940 320 420 520 250 350 450 1 100 1 700 370 440 510 180 230 280 2 000 2 550 mVp-p mVp-p SG34 = 50 mVp-p, Black level = 2 V, V15 = V25 = V29 = V30 = 5 V, V23 = 1.2 V, V26 = 2.3 V AMP2 maximum gain GAMP2MAX Apply signal 3 to SG26 and measure the amplitude on AMP2 minimum gain GAMP2MIN TP21. Pulse/CLP, BLK, Output dynamic range DAMP2 SG26 = 100 mVp-p, V22 = 5 V SG26 = 100 mVp-p, SW15, SW22, SW25, SW26A/(b), V22 = 0 V Input black level = 2.3 V, SG26 = 800 mVp-p, V22 = 5 V V15 = V25 = 0 V Apply signal 4 to SG26. Increase the mVp-p frequency of signal 4 until the frequency Frequency characteristic fAMP2 components of the signal on TP21 are 3 dB lower than that at f = 100 kHz, and measure the frequency of signal 4. SW15, SW25, SW26A/(b), V15 = 0 V, V25 = 0 V, Pulse/CLP, BLK, SG26 = 100 mVp-p, Black level = 2.3 V 18 8.0 MHz IR3Y30M/M1 PARAMETER SYMBOL CONDITIONS Encoder Circuit White clip (1) WC1 Apply signal 3 to SG20 and White clip (2) WC2 measure the amplitude on TP17A. White clip preset WCPRE MIN. SW19/(b), V19 = 5 V SW19/(b), V19 = 0 V 1.9 SW19/(a) Setup preset SUPPRE SW20/(b), Pulse/CLP, BLK Measure the amplitude of SW18/(b), V18 = 5 V TP17A between BLK level SW18/(b), V18 = 0 V and black level. SW18/(a) Pulse/CLP, BLK SYNC level VSYNC Measure the amplitude of TP17A between SYNC level and black level. Setup (1) SUP1 Setup (2) SUP2 TYP. MAX. UNIT 2.0 0.85 0.95 1.75 1.85 1.95 230 280 V –310 –260 –150 –100 –50 530 580 630 mV –1 0 1 dB 2.2 2.5 mV Pulse/CLP, BLK, SYNC Apply signal 3 to SG20 and measure the Gain GOUT amplitude on TP17A. SW20/(b), Pulse/CLP, BLK, SG20 = 1 Vp-p Apply signal 3 to SG20 and measure the Output dynamic range DOUT amplitude of TP17A between SYNC level and white level. SW19, SW20/(b), V19 = 5 V, Vp-p Pulse/CLP, BLK, SYNC Apply signal 4 to SG20. Increase the frequency of signal 4 until the frequency Frequency characteristic fOUT components of the signal on TP17B are 3 dB lower than that at f = 100 kHz, and measure 10 MHz the frequency of signal 4. SG20 = 1 Vp-p, SW17, SW20/(b), Pulse/CLP, BLK, SYNC Apply signal 3 to SG20 and measure the Output voltage VOUT amplitude of TP17B between SYNC level and white level. SG20 = 1.3 Vp-p, SW17, SW20/(b), 0.9 1.0 Vp-p Pulse/CLP, BLK, SYNC Pulse Circuit Clamp threshold voltage Sample-hold threshold voltage Synchronous signal threshold voltage 1.3 VFCDS VFS VSYNC 1.5 Apply voltages to FCDS, FS, SYNC, BLK and CLP and measure the threshold voltage of 2.5 each circuit. Blanking threshold voltage VBLK 1.5 Clamp threshold voltage VCP 3.5 19 V IR3Y30M/M1 Measurement Waveforms Sine wave amplitude : 200 mVp-p Low frequency attenuation : 100 kHz/10 MHz (10 MHz = 0 dB) Signal 1 Signal 2 (Input) 2T T/2 Input level (FCDS) H level T/4 L level H level T/4 (FS) L level T = 1/f f : sampling rate BLK 5V 11 µs 0V Blanking Pulse CLP 5V 3 µs 0V Clamp Pulse SYNC 5V 4.7 µs 0V Sync Pulse WINDOW 0V Window pulse Signal 3 Signal 4 100% 50% 20 IR3Y30M/M1 Test Circuit SG26 ~ SG34 ~ TP32 R35 V30 V34 47 k$ TP36 36 TP37A 35 R27 V29 V26 B V25 TP28 A 0.01 µF 34 33 32 31 30 29 28 27 26 25 37 0.01 µF 24 38 23 39 22 40 21 41 20 0.01 µF 19 V23 0.01 µF TP37B V39 TP40A V41 TP40B V42 42 43 0.01 µF 44 TP44 ~ SG43 0.01 µ + 47 µF 100 $ FS 18 17 16 0.01 µ 15 45 46 V22 TP21 47 14 48 13 V19 TP17B V18 + 56 470 75 $ $ µF TP17A + 47 µF 1 SG1 10 k$ 10 k$ 2 3 4 ~ 5 6 100 k$ + 47 µF 0.01 µF V3 7 8 0.01 µF + V4 TP5 5V Switching Polarity 21 10 11 12 TP8 47 µF (a) (b) 9 TP12 V9 V10 V11 SG20 ~ 10 k$ 100 $ FCDS 0.01 µF V15 CLP BLK SYNC PACKAGES FOR CCD AND CMOS DEVICES PACKAGES (Unit : mm) 48 QFP (QFP048-P-1010) 0.33±0.1 48 13 10.0±0.2 (1.75) (11.5) 24 0.15 37 12 1 (1.75) (1.75) 10.0±0.2 0.85±0.2 1.45±0.2 13.5±0.4 Package base plane 0.1±0.1 48 QFP (QFP048-P-0707) 0.15±0.05 0.2±0.08 48 13 7.0±0.2 7.0±0.2 12 (1.0) (1.0) 0.65±0.2 1.45±0.2 9.0±0.3 0.1±0.1 Package base plane 1 (1.0) 22 0.1 24 0.08 37 8.0±0.2 M (1.0) 25 36 9.0±0.3 0.5TYP. 0.15 (1.75) 25 36 M 0.15±0.05 13.5±0.4 0.75TYP.