SHARP LZ2453

LZ2453A
1/4-type Color CCD Area Sensor
with 410 k Pixels
LZ2453A
DESCRIPTION
PIN CONNECTIONS
The LZ2453A is a 1/4-type (4.5 mm) solid-state
image sensor that consists of PN photo-diodes
and CCDs (charge-coupled devices). With
approximately 410 000 pixels (811 horizontal x 507
vertical), the sensor provides a stable high-resolution
color image.
14-PIN HALF-PITCH WDIP
OD 1
FEATURES
• Number of effective pixels : 768 (H) x 494 (V)
• Number of optical black pixels
– Horizontal : 3 front and 40 rear
– Vertical : 11 front and 2 rear
• Pixel pitch : 4.9 µm (H) x 5.6 µm (V)
• Mg, G, Cy, and Ye complementary color filters
• Low fixed-pattern noise and lag
• No burn-in and no image distortion
• Blooming suppression structure
• Built-in output amplifier
• Built-in overflow drain voltage circuit
• Horizontal shift register clock voltage : 3.6 V (TYP.)
• Variable electronic shutter (1/60 to 1/10 000 s)
• Compatible with NTSC standard
• Package :
14-pin half-pitch WDIP [Plastic]
(WDIP014-P-0400A)
Row space : 10.16 mm
TOP VIEW
14 OS
GND 2
13 GND
OFD 3
12 NC
PW 4
11 ØV1
ØRS 5
10 ØV2
ØH1 6
9 ØV3
ØH2 7
8 ØV4
(WDIP014-P-0400A)
PRECAUTIONS
• The exit pupil position of lens should be more
than 25 mm from the top surface of the CCD.
• Refer to "PRECAUTIONS FOR CCD AREA
SENSORS" for details.
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
LZ2453A
PIN DESCRIPTION
SYMBOL
OD
PIN NAME
Output transistor drain
OS
ØRS
Output signals
ØV1, ØV2, ØV3, ØV4
Vertical shift register clock
ØH1, ØH2
Horizontal shift register clock
Reset transistor clock
OFD
Overflow drain
PW
GND
P-well
Ground
NC
No connection
ABSOLUTE MAXIMUM RATINGS
(TA = +25 ˚C)
SYMBOL
VOD
RATING
0 to +18
UNIT
V
NOTE
VOFD
VØRS
Internal output
–0.3 to +12
V
V
1
Vertical shift register clock voltage
VØV
Horizontal shift register clock voltage
VØH
–11.5 to +17.5
–0.3 to +12
V
V
Voltage difference between P-well and vertical clock
VPW-VØV
–29 to 0
V
Voltage difference between vertical clocks
Storage temperature
VØV-VØV
TSTG
0 to +15
–40 to +85
V
˚C
TOPR
–20 to +70
˚C
PARAMETER
Output transistor drain voltage
Overflow drain voltage
Reset gate clock voltage
Ambient operating temperature
2
NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is
applied below 27 Vp-p.
2. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be
below 28 V.
2
LZ2453A
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Ambient operating temperature
SYMBOL
TOPR
MIN.
TYP.
25.0
MAX.
UNIT
˚C
Output transistor drain voltage
VOD
14.55
15.0
15.45
V
VØOFD
22.5
Overflow drain clock
p-p level
Ground
P-well voltage
GND
VPW
LOW level
Vertical shift
VØV1L, VØV2L
VØV3L, VØV4L
INTERMEDIATE level
HIGH level
VØV3I, VØV4I
VØV1H, VØV3H
Horizontal shift
register clock
LOW level
VØH1L, VØH2L
HIGH level
VØH1H, VØH2H
Reset gate clock
–9.5
VØV1I, VØV2I
register clock
24.5
V
1
VØVL
V
V
2
–8.5
V
0.0
–10.0
–9.0
0.0
V
14.55
15.0
15.45
V
–0.05
3.3
0.0
3.6
0.05
5.5
V
V
LOW level
VØRSL
0.0
VOD – 14.2
V
HIGH level
VØRSH
VOD – 9.7
10.0
V
Vertical shift register clock frequency
Horizontal shift register clock frequency
fØV1, fØV2
fØV3, fØV4
fØH1, fØH2
Reset gate clock frequency
fØRS
NOTE
15.73
kHz
14.32
MHz
14.32
MHz
NOTES :
• Connect NC to GND directly or through a capacitor larger than 0.047 µF.
1. Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE", and do not connect to DC voltage directly.
2. VPW is set below VØVL that is low level of vertical shift register clock, or is used with the same power supply that is connected
to VL of V driver IC.
* To apply power, first connect GND and then turn on VOD. After turning on VOD, turn on PW first and then turn on other powers
and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied.
3
LZ2453A
CHARACTERISTICS (Drive method : Field accumulation)
(TA = +25 ˚C, Operating conditions : The typical values specified in "RECOMMENDED OPERATING CONDITIONS".
Color temperature of light source : 3 200 K, IR cut-off filter (CM-500, 1 mmt) is used.)
PARAMETER
Standard output voltage
SYMBOL
VO
MIN.
TYP.
150
Photo response non-uniformity
Saturation output voltage
PRNU
VSAT
550
700
Dark output voltage
VDARK
0.5
Dark signal non-uniformity
Sensitivity
DSNU
R
MAX.
15
UNIT
mV
NOTE
2
%
3
mV
4
3.0
mV
1, 5
0.5
220
2.0
mV
mV
1, 6
7
–80
–70
1.0
dB
%
8
9
4.0
350
8.0
mA
$
Vector breakup
Line crawling
7.0
3.0
˚, %
%
11
12
Luminance flicker
2.0
%
13
Smear ratio
Image lag
SMR
AI
Blooming suppression ratio
ABL
Output transistor drain current
IOD
Output impedance
RO
160
1 000
10
NOTES :
• Within the recommended operating conditions of VOD,
VOFD of the internal output satisfies with ABL larger than
1 000 times exposure of the standard exposure conditions,
and VSAT larger than 550 mV.
1. TA = +60 ˚C
2. The average output voltage under uniform illumination.
The standard exposure conditions are defined as when
Vo is 150 mV.
3. The image area is divided into 10 x 10 segments under
the standard exposure conditions. Each segment's
voltage is the average output voltage of all pixels within
the segment. PRNU is defined by (Vmax – Vmin)/Vo,
where Vmax and Vmin are the maximum and minimum
values of each segment's voltage respectively.
4. The image area is divided into 10 x 10 segments. Each
segment's voltage is the average output voltage of all
pixels within the segment. VSAT is the minimum
segment's voltage under 10 times exposure of the
standard exposure conditions.
5. The average output voltage under non-exposure
conditions.
6. The image area is divided into 10 x 10 segments under
non-exposure conditions. DSNU is defined by (Vdmax –
Vdmin), where Vdmax and Vdmin are the maximum and
minimum values of each segment's voltage respectively.
7. The average output voltage when a 1 000 lux light
source with a 90% reflector is imaged by a lens of F4,
f50 mm.
8. The sensor is exposed only in the central area of V/10
square with a lens at F4, where V is the vertical image
size. SMR is defined by the ratio of the output voltage
detected during the vertical blanking period to the
maximum output voltage in the V/10 square.
9. The sensor is exposed at the exposure level
corresponding to the standard conditions. AI is defined
by the ratio of the output voltage measured at the 1st
field during the non-exposure period to the standard
output voltage.
10. The sensor is exposed only in the central area of V/10
square, where V is the vertical image size. ABL is
defined by the ratio of the exposure at the standard
conditions to the exposure at a point where blooming is
observed.
11. Observed with a vector scope when the color bar chart
is imaged under the standard exposure conditions.
12. The difference between the average output voltage of the
(Mg + Ye), (G + Cy) line and that of the (Mg + Cy), (G +
Ye) line under the standard exposure conditions.
13. The difference between the average output voltage of
the odd field and that of the even field under the
standard exposure conditions.
4
LZ2453A
PIXEL STRUCTURE
yyyyyyyyy
,,,,,,,,,
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
OPTICAL BLACK
(2 PIXELS)
OPTICAL BLACK
(3 PIXELS)
OPTICAL BLACK
(40 PIXELS)
768 (H) x 494 (V)
1 pin
OPTICAL BLACK
(11 PIXELS)
COLOR FILTER ARRAY
(1, 494)
ODD
field
(768, 494)
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Mg
G
Mg
G
Mg
G
Mg
G
Mg
G
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
G
Mg
G
Mg
G
Mg
G
Mg
G
Mg
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Mg
G
Mg
G
Mg
G
Mg
G
Mg
G
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Mg
G
Mg
G
Mg
G
Mg
G
Mg
G
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
G
Mg
G
Mg
G
Mg
G
Mg
G
Mg
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Cy
Ye
Mg
G
Mg
G
Mg
G
Mg
G
Mg
G
(1, 1)
EVEN
field
(768, 1)
5
LZ2453A
TIMING CHART
VERTICAL TRANSFER TIMING
(ODD FIELD)
525 1
Shutter speed
1/2 000 s
10
HD
VD
ØV1
ØV2
ØV3
ØV4
ØOFD
489 491 493 OB1
+
+
+
+
490 492 494 OB2
OS
OB1 OB3 OB5 OB7 OB9 OB11 2
+
+
+
+
+
+
+
OB2 OB4 OB6 OB8 OB10 1
3
4
+
5
6
+
7
8
+
9
10
+
11
12
+
13
14
+
15
16
+
17
OB2 OB4 OB6 OB8 OB10 1
+
+
+
+
+
+
OB1 OB3 OB5 OB7 OB9 OB11 2
3
+
4
5
+
6
7
+
8
9
+
10
11
+
12
13
+
14
15
+
16
(EVEN FIELD)
263
272
HD
VD
ØV1
ØV2
ØV3
ØV4
ØOFD
488 490 492 494 OB2
+
+
+
+
489 491 492 OB1 OS
HORIZONTAL TRANSFER TIMING
910, 1
91
HD
ØH1
ØH2
ØRS
OS
..768
PRE SCAN (22)
OB (3)
OUTPUT (768) 1πππ
OB (40)
42
74
ØV1
58
90
ØV2
34
82
ØV3
50
98
ØV4
66
ØOFD
6
86
LZ2453A
READOUT TIMING
(ODD FIELD)
HD
1
91
910, 1
336
42 74
ØV1
58 90
ØV2
34
ØV3
42 74
208
82
50
ØV4
404
58 90
644
404
240
91
472
82
50
98
98
(EVEN FIELD)
HD
1
91
910, 1
336
ØV1
42 74
58 90
91
404
208
90
ØV2
ØV3
34
50
82
404
240
472
82
644
98
ØV4
7
98
V2
NC
V4
V3B
V3A
V1B
V1A
VMa
VH
8
13 14 15 16 17 18 19 20 21 22 23 24
1
5
4
3
(*1)
270
pF
2
1
10 11 12 13 14
ØV2
ØV4
VDD
(*1) OFD :
Use the circuit parameter indicated in
this circuit example, and do not connect
to DC voltage directly.
9
LZ2453A
6
ØV3
8
7
ØV1
+5 V
V3X
VH1AX
V1X
V2X
OFDX
VL
2
VMb
LR36685
+
3
POFD
4
ØH2
5
ØH1
6
ØRS
7
PW
8
OFD
9
0.1 µF
GND
12 11 10
100 $
1 M$
CCD
OUT
+
VH3AX
1 000 pF
1 M$
OD
V4X
VH
ØH2
ØRS
ØH1
VL (VPW)
VOD
LZ2453A
SYSTEM CONFIGURATION EXAMPLE
OS
GND
NC
VOFDH
VH3BX
OFDX
V2X
V1X
VH1AX
V3X
GND
+
VH3AX
V4X
VH1BX
+
PACKAGES FOR CCD AND CMOS DEVICES
PACKAGE
(Unit : mm)
14 WDIP (WDIP014-P-0400A)
0.03
9.00±0.10 (◊)
(◊ : Lid's size)
0.50±0.50
CCD
1
0.50±0.50
Glass Lid
CCD
Package
0.03
Cross section A-A'
7
MAX.
Rotation error of die : ¬= 1.0˚
0.80±0.05 (◊)
5.00±0.075
¬
1.27±0.25
A
5.02MAX.
2.55±0.10
5.00±0.075
3.50±0.30 3.35±0.10
10.00±0.10
8
1.39±0.05
9.00±0.10 (◊)
14
Center of effective imaging area
and center of package
1.96±0.05
10.00±0.10
A'
0.30TYP.
0.46TYP.
0.25
0.25±0.10
P-1.27TYP.
+0.5
10.16–0
M
9
PRECAUTIONS FOR CCD AREA SENSORS
PRECAUTIONS FOR CCD AREA SENSORS
(In the case of plastic packages)
– The leads of the package are fixed with
package body (plastic), so stress added to a
lead could cause a crack in the package
body (plastic) in the jointed part of the lead.
1. Package Breakage
In order to prevent the package from being broken,
observe the following instructions :
1) The CCD is a precise optical component and
the package material is ceramic or plastic.
Therefore,
ø Take care not to drop the device when
mounting, handling, or transporting.
ø Avoid giving a shock to the package.
Especially when leads are fixed to the socket
or the circuit board, small shock could break
the package more easily than when the
package isn’t fixed.
2) When applying force for mounting the device or
any other purposes, fix the leads between a
joint and a stand-off, so that no stress will be
given to the jointed part of the lead. In addition,
when applying force, do it at a point below the
stand-off part.
Glass cap
Package
Lead
Fixed
Stand-off
3) When mounting the package on the housing,
be sure that the package is not bent.
– If a bent package is forced into place
between a hard plate or the like, the package may be broken.
4) If any damage or breakage occurs on the surface of the glass cap, its characteristics could
deteriorate.
Therefore,
ø Do not hit the glass cap.
ø Do not give a shock large enough to cause
distortion.
ø Do not scrub or scratch the glass surface.
– Even a soft cloth or applicator, if dry, could
cause dust to scratch the glass.
(In the case of ceramic packages)
– The leads of the package are fixed with low
melting point glass, so stress added to a
lead could cause a crack in the low melting
point glass in the jointed part of the lead.
Low melting point glass
Lead
2. Electrostatic Damage
As compared with general MOS-LSI, CCD has
lower ESD. Therefore, take the following anti-static
measures when handling the CCD :
1) Always discharge static electricity by grounding
the human body and the instrument to be used.
To ground the human body, provide resistance
of about 1 M$ between the human body and
the ground to be on the safe side.
2) When directly handling the device with the
fingers, hold the part without leads and do not
touch any lead.
Fixed
Stand-off
10
PRECAUTIONS FOR CCD AREA SENSORS
ø The contamination on the glass surface
should be wiped off with a clean applicator
soaked in Isopropyl alcohol. Wipe slowly and
gently in one direction only.
– Frequently replace the applicator and do not
use the same applicator to clean more than
one device.
◊ Note : In most cases, dust and contamination
are unavoidable, even before the device
is first used. It is, therefore, recommended
that the above procedures should be
taken to wipe out dust and contamination
before using the device.
3) To avoid generating static electricity,
a. do not scrub the glass surface with cloth or
plastic.
b. do not attach any tape or labels.
c. do not clean the glass surface with dustcleaning tape.
4) When storing or transporting the device, put it in
a container of conductive material.
3. Dust and Contamination
Dust or contamination on the glass surface could
deteriorate the output characteristics or cause a
scar. In order to minimize dust or contamination on
the glass surface, take the following precautions :
1) Handle the CCD in a clean environment such
as a cleaned booth. (The cleanliness level
should be, if possible, class 1 000 at least.)
2) Do not touch the glass surface with the fingers.
If dust or contamination gets on the glass
surface, the following cleaning method is
recommended :
ø Dust from static electricity should be blown
off with an ionized air blower. For antielectrostatic measures, however, ground all
the leads on the device before blowing off
the dust.
4. Other
1) Soldering should be manually performed within
5 seconds at 350 °C maximum at soldering iron.
2) Avoid using or storing the CCD at high temperature or high humidity as it is a precise
optical component. Do not give a mechanical
shock to the CCD.
3) Do not expose the device to strong light. For
the color device, long exposure to strong light
will fade the color of the color filters.
11