PRODUCT INFORMATION ® LZ8519X IrDA Control Peripheral Engine (PE) IrDA Components Group APPLICATIONS: • Network Computer DESCRIPTION FEATURES • All-in-One Embedded Communication Controller (Encoder/ Decoder, IrDA, IrDA Control MAC Layer, HID LLC Layer) • Simple Command given by an ordinary µP enables PE to operate every protocol required for IrDA Control Infrared Wireless Communication • Optimized interface to SHARP IrDA Control Infrared Transceiver (SHARP P/N: GP2W2001YK) • Serial interface (Synchronous Serial Wire) is prepared for the interface between µP and PE. • Low current consumption: ICC = 3 mA (at operation) • Supply Voltage: VDD = 2.7 V - 3.3 V SHARP IrDA Control Peripheral Engine will exchange the information with µP through this serial interface (SS-Wire). Only two attributes, ‘Command’ and ‘Message’, a simple software will be used for information transaction. Other protocol stacks are supported by PE and users can simply minimize design effort and time. The SHARP IrDA Control Peripheral Engine (PE) is an embedded Communication controller, designed to fully support IrDA Control MAC Layer and HID LLC Layer services. It has an optimized interface to SHARP IrDA Control transceiver, and the Serial Interface (Synchronous Serial Wire) for µP. Since IrDA Control MAC layer and HID LLC layer protocol stacks are already built-into PE, one can easily implement IrDA Control Peripherals with SHARP IrDA Control transceiver and PE. GENERAL CHARACTERISTICS SYSTEM BLOCK DIAGRAM REQUIRED FUNCTION FOR IrDA CONTROL MICE APPLICATION SOFTWARE CMD FRESET IrDA CONTROL MICE IMPLEMENTATION Interface Signal with IrBus Transceiver 1 CHIP MICROCONTROLLER MESSAGE IrDA CONTROL MAC LAYER FECNT IRTx PE IRRx1 COMMAND IRRx2 SERIAL SS-WIRE I/F IrDA CONTROL HID LLC LAYER MSG SDI Serial Interface Signal with µP (SS-Wire) SDO SCK X1 X2 RDY Clock Related Signal 8519X-3 IrDA CONTROL INFRARED COMMUNICATION ENGINE SYSTEM DATA FLOW IrDA CONTROL PE MESSAGES COMMANDS IrDA CONTROL PHYSICAL LAYER IrDA CONTROL TRANSCEIVER GP2W2001YK MSG IN1 SDO IN2 RDY IN3 PE 8519X-4 SDI OUT4 SCK OUT5 CMD OUT6 µP for CONTROL 8519X-5 This Product Information is from Prelimary Product Information Issue Date: April 15, 1998. Copyright ©1998, Sharp Electronics Corp. All rights reserved. All tradenames are the registered property of their respective owners. Specifications are subject to change without notice. SMT98176 PRODUCT INFORMATION ® OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN 47 46 45 44 43 42 41 40 39 38 37 BLOCK DIAGRAM 48 48-PIN SOP OPEN 1 36 OPEN FECNT 2 35 RESETB FERESET 3 34 VDD IRRx2 4 33 X2 GND 5 32 X1 IRRx1 6 31 GND GND 7 30 SCK IRTx 8 29 SI VDD 9 28 SO 16 17 18 19 20 21 22 23 24 OPEN OPEN OPEN OPEN OPEN OPEN OPEN VDD RDY OPEN 25 15 12 OPEN MSG GND 14 CMD 26 13 27 11 GND 10 OPEN IRTxBIAS IRTxLPFC INTC TIMER CTC SS-WIRE CPU IrDA CONTROL ROM RAM 8519X-2 8519X-1 PIN DESCRIPTION PIN NAME I/O DESCRIPTION SI Input Serial data input SO Output Serial data output SCK Input Clock signal for serial data MSG Output MSG = H indicates the PE holds messages. µP must issue Get_Message command and read in the message. When PE no longer holds messages, PE outputs MSG = L RDY Output Signal for flow control CMD Input Timing signal for command ID IRTx Output Connected to TXD pinout of Infrared Transceiver (P/N: GP2W2001YK) IRTxBIAS Output N/C IRTxLPFC Output N/C IRRx1 Input Connected to VO pinout of Infrared Transceiver (P/N: GP2W2001YK) IRRx2 Input N/C FECNT Output Connected to SD pinout of Infrared Transceiver (P/N: GP2W2001YK) FERESET Output Connected to RESET pinout of Infrared Transceiver (P/N: GP2W2001YK) RESETB Input Hardware reset signal X1 Input Clock input. Clock of 6 MHz must be input X2 Output NC LZ8519X IrDA Control Peripheral Engine (PE) 2