SLS System Logic Semiconductor SL70D0948 48 OUTPUT LED DRIVER / 9 BIT PWM CONTROLLER SL70D0948 System Logic Semiconductor SLS System Logic Semiconductor CONTENTS INTRODUCTION BLOCK DIAGRAM PIN ASSIGNMENT PIN DESCRIPTION FUNCTION DESCRIPTION SPECIFICAIONS REFERENCE APPLICATIONS SL70D0948 SLS System Logic Semiconductor SL70D0948 INTRODUCTION The SL70D0948 is LED driver / controller IC for LED display panel. This is consisted of 48 channel LED driver , 9Bit PWM controller and 48 bit shift register. Also it is very convenient to application because all display data can transfer by serial method. FEATURES Driver Output Circuits - 48 LED Driver Outputs : N-ch Open Drain MOS Transistor Output - LED Driving Voltage : Max. 16V (When Transistor Off) - LED Driving Current : Max. 90mA - LED Driving Current Control - Outputs are 9bit PWM controlled Data Interface - 48bit Shift Register for 9bit data input - 9bit parallel data format selectable PWM controller - 9bit PWM control ( 512 Gray scale ) - 3bit Brightness / 4bit Brightness input selectable Package Type - 100 pin MQFP STROBE CE2 9 DIN 9bit 9 9 9 9 DIN8 DIN0 9 9 9bit Data Register (48) 9 9bit Data Register (47) 9 9bit Data Register (46) 9 SHCLK BRD0 9bit Data Register (3) BRD1 PWM Generator (48) PWM Generator (47) PWM Generator (46) PWM Generator (3) PWM Generator (2) PWM Generator (1) PWCLK 9bit Data Register (2) BRD2 9bit Data Register (1) BRMODE LED Driver (48) LED Driver (47) LED Driver (46) LED Driver (3) LED Driver (2) LED Driver (1) Driver Output Control OE 9 bit PWM Counter LED48 LED47 LED46 LED3 LED2 LED1 SLS System Logic Semiconductor SL70D0948 BLOCK DIAGRAM 9 /C E 1 /R E S E T 9 DOUT8 4 8 bit x9bit Shift Register DOUT 9bit DOUT0 SLS System Logic Semiconductor SL70D0948 PIN ASSIGNMENT(MQFP) VDD GND VDD VDD GND BRD2 BRD1 GND BRD0 LED19 LED20 LED21 LED22 LED23 GND LED24 LED25 LED26 LED27 LED28 LED29 GND LED30 NC SHCLK VDD /R E S E T GND GND LED18 LED31 LED17 SL70D0948 LED32 LED33 LED15 LED14 LED35 LED13 LED36 GND GND LED12 LED37 LED11 System Logic Semiconductor LED39 LED40 LED41 LED42 LED10 LED9 LED8 LED7 GND DOUT6 DOUT5 DOUT4 DOUT3 DOUT2 DOUT1 DOUT0 GND LED6 LED5 LED4 LED3 LED2 LED1 GND LED48 LED47 LED46 LED45 LED44 LED43 GND DIN0 DIN2 DIN3 DOUT7 DIN4 DIN8 DIN5 DOUT8 DIN6 GND VDD DIN7 GND 1 50 LED16 LED34 LED38 100 GND OEB BRMODE VDD PWCLK STROBE DIN1 81 51 CE2 /CE1 80 30 31 SLS System Logic Semiconductor SL70D0948 PIN DESCRIPTION PIN No. (MQFP) PIN NAME 49,52,53,54,78,99 VDD 9, 16, 23, 33, 34, 41, 48, 59, 65, 72,74 /R E S E T Reset input terminal (Low active). Data input terminals for 9bit R, G, B data. DIN8 ~ DIN0 6, 7, 8 Shift register accepts R, G, B data from these terminals. (at rising edge of SHCLK) 32, 31, 30, 29, 28, 27, All GND terminals must be connected to GND level. Do not left any GND terminal to NC. 100, 1, 2, 3, 4, 5, 5 V Power supply terminal. GND terminals for LED Drivers and control logic. GND 84, 91, 98 83 FUNCTION DOUT8 ~ DOUT0 Output terminals of shift register output data for next DIN8 ~ DIN0 terminals. 26, 25, 24 82 SHCLK 81 STROBE Shift register clock input terminal. Strobe signal input terminal. At rising edge of strobe signal, 48 channels of 9 bit data registers copy R, G, B data from shift register. 80 /C E 1 79 CE2 Chip enable signal input terminal (Low active). Chip enable signal input terminal (High active). T h e d e v i c e a c c e p t s S H C L K a n d S T R O B E w h e n / C E 1 = “L ” a n d C E 2 = “H ”. Output enable signal input terminal. 76 OEB T h e d e v i c e o u t p u t s d a t a w h e n O E B = “L ”. W h e n O E B = “H ” all R, G, B output terminals hold high-impedance state. 77 PWCLK 75 BRMODE 56, 57, 58 BRD2 ~ BRD0 PWM generator reference clock input terminal. Brightness control mode input terminal. Brightness control data input terminal. SLS System Logic Semiconductor PIN DESCRIPTION SL70D0948 (continued) PIN No. (MQFP) PIN NAME 51,55 GND 50 NC FUNCTION Reserved Pin. Must be tied to GND. No Connection 17, 18, 19, 20, 21, 22,35 , 36, 37, 38, 39, 40, 42, 43, 44, 45 46, 47, 60, 61 62, 63, 64, 65 67, 68, 69, 70, 71, 72, 85, 86 87, 88, 89, 90 92, 93, 94, 95 96, 97, 10, 11 12, 13, 14, 15 LED1 ~ 48 LED driver output terminals. SLS System Logic Semiconductor SL70D0948 FUNCTION DESCRIPTION SYSTEM INTERFACE Chip Enable Input The chip enable pins are /CE1 and CE2. The SL70D0948 can enable chip by /CE1=0, and CE2=1. If the SL70D0948 is enable then it can receive signal that DIN,SHCLK and STROBE. Output Enable Input The SL70D0948 has output enable pin (OEB). If the OEB = 1, all output are off and if OEB = 0 then all output pins are PWM output. Data Input / Output The SL70D0948 has 9bit data input pins (DIN[8:0]) and 9bit data output pins (DOUT[8:0]). The output data is out after 48 times SHCLK from input data. If DOUT[8:0] pins are connected to next device DIN[8:0] pins, the first device 48bit input data can shift the next device 48bit input data by SHCLK. It can transfer display data to serial method so it makes device to connect directly. The 9bit LED input data are MSB first inputted. The 9bit input data are inputted 9bit LED1 and next 9bit LED2 and next 9bit LED3 … LED48 input data by SHCLK. SLS System Logic Semiconductor SL70D0948 INPUT TIMING DIAGRAM DATA INPUT LED45 DIN8~DIN0 LED46 LED47 LED48 LED1 LED2 SHCLK STROBE Data Register DATA (internal) Data Register(1) LED1[8:0] Data Register(2) LED2[8:0] Data Register(3) LED3[8:0] Data Register(4) LED4[8:0] Data Register(5) LED5[8:0] Data Register(46) LED46[8:0] Data Register(47) LED47[8:0] Data Register(48) LED48[8:0] DOUT TIMING DIAGRAM DATA INPUT DIN8~DIN0 SHCLK LED43[8:0] LED44[8:0] LED45[8:0] LED46[8:0] LED47[8:0] LED48[8:0] 1 2 3 4 5 6 49 50 51 52 53 54 DATA OUTPUT SHCLK (After 48 clocks) DOUT8~DOUT6 LED43[8:0] LED44[8:0] LED45[8:0] LED46[8:0] LED47[8:0] SLS System Logic Semiconductor SL70D0948 PWM OUTPUT WAVEFORM OUTPUT DRIVER PWCLK 8 clock = 1 T B R M O D E = 0 , B R D [ 2 : 0 ] = ( 1 1 1 )2 OUTPUT DRIVER PWCLK 8 clock = 1 T BRMODE = 0, BRD[2:0] = (0 0 0) 2 OUTPUT DRIVER PWCLK 16 clock = 1 T BRMODE = 1, BRD[2:0] = (111) 2 OUTPUT DRIVER PWCLK 9 clock = 9/16 T 16 clock = 1 T BRMODE = 1, BRD[2:0] = (0 0 0) 2 SLS System Logic Semiconductor SL70D0948 PWM OUTPUT TIMING DIAGRAM OUTPUT DRIVER 511 T 511 T DATA = (1FF)1 6 256 T 256 T OUTPUT DRIVER 511 T 511 T D A T A = ( 1 0 0 )1 6 1 T 1 T OUTPUT DRIVER 511 T 511 T D A T A = ( 0 0 1 )1 6 SLS System Logic Semiconductor SL70D0948 SPECIFICATIONS o M A X I M U M R A T I N G S ( T a = 25 C ) CHARACTERISTIC SYMBOL RATING UNIT VDD 0 ~ 7.0 V Output Voltage (LED1 ~ LED48) VOUT -0.5 ~ 17 V Output Current (LED1 ~ LED48) IO U T 90 mA V IN -0.4 ~ V D D + 0.4 V IG N D 1440 mA SHCLK FS R 15 MHz PWCLK FPWM 20 MHz PD 1.78 W TOPR -40 ~85 Supply Voltage Input Voltage GND terminal Current Clock Frequency Power Dissipation Operating Temperature Storage Temperature TSTG o o -55 ~ 150 C C o RECOMMANDED OPERATING CONDITION (Ta = 25 C) CHARACTERISTIC SYMBOL CONDITION MIN. TYP. MAX. UNIT VDD - 4.5 5.0 5.5 V VOUT - - - 15.0 V IO U T - - - 88 H - - - -1.0 IO L - - - 1.0 V IN - 0 - VDD V DIN Data Setup Time tD S U - 50 - - ns DIN Data Hold Time tD H L D - 20 - - ns tS S U - 50 - - ns tS H L D - 20 - - ns tW H - 30 - - ns tW L - 30 - - ns SHCLK FS R - - - 10 MHz PWCLK FPWM - - - 15 MHz PD - - - 1.78 W Supply Voltage Output Voltage (LED1~48) LED1~ 48 Output Current IO Input Voltage STROBE Setup Time STROBE Hold Time Pulse Width SHCLK, PWCLK, STROBE Clock Frequency Power Dissipation mA SHCLK SLS System Logic Semiconductor SL70D0948 o S W I T C H I N G C H A R A C T E R I S T I C S ( Ta = 25 C) CHARACTERISTIC SYMBOL CONDITION SHCLK-DOUT MIN. TYP. MAX. - 20 50 - 50 100 - 50 100 UNIT Propagation Delay Time STROBE tP L H ns ( “L ” t o “H ”) OE SHCLK FSRMAX 10 15 20 PWCLK FPWMAX 15 20 30 STROBE FSTMAX 10 15 20 - 10 20 - 10 20 - 10 20 - 15 30 Maximum Clock MHz Frequency Pulse PWCLK tW H tW L Width = 5.0V VOUT = 0.4V SHCLK Minimum VDD STROBE VCON = V DD V IH = VDD V IL = GND FPWM = 10MHz IO U T = 40mA Data Set Up Time tD S U Data Hold Time tD H L D - 10 15 Maximum Clock Rise Time tR - - 10 Maximum Clock Fall Time tF - - 10 ns ns us Maximum Output Rise Time tO R - 50 100 Maximum Output Fall Time tO F - 100 200 ns TIMING WAVE FORM DIN[8:0] DIN8~DIN0 tD S U tD H L D tW L SHCLK tW H 0.1V D D tR tF tS S U tS H L D 0.9V D D STROBE tP L H DOUT8~DOUT0 DOUT[8:0] tP L H LED1 ~ LED48 OUTPUT SLS System Logic Semiconductor SL70D0948 PACKAGE INFORMATION 100 PIN MQFP (14 x 20 Body) 24.15 23.65 20.1 14.1 13.9 18.15 17.65 19.9 3.10 M A X 0.38 0.22 0.65 0~78 0.36 0.23 0.10 0.13 1.03 0.73 1.95 SLS System Logic Semiconductor SL70D0948 REFERENCE APPLICATIONS Power Line Connection VDD GND VDD VDD GND BRD2 BRD1 GND BRD0 LED19 LED20 LED21 LED22 LED23 GND LED24 LED25 LED26 LED27 LED28 LED29 GND LED30 GND OEB BRMODE VDD PWCLK CE2 /CE1 VDD STROBE NC SHCLK VDD /RESET GND GND LED18 LED31 LED17 SL70D0948 LED32 LED33 LED16 LED15 LED34 LED14 LED35 LED13 LED36 GND GND LED12 LED37 LED11 LED38 LED10 System Logic Semiconductor LED39 LED40 LED41 LED9 LED8 LED7 LED42 GND DOUT6 DOUT5 DOUT4 DOUT3 DOUT2 DOUT1 DOUT0 GND LED6 LED5 LED4 LED3 LED2 LED1 GND LED48 LED47 LED46 LED45 LED44 LED43 GND DIN0 DIN1 DIN3 DIN2 DOUT7 DIN4 DIN8 DIN5 DOUT8 DIN6 GND VDD DIN7 GND GND SLS System Logic Semiconductor REFERENCE APPLICATIONS SL70D0948 (continued) STROBE VDD GND VDD VDD GND BRD2 BRD1 GND BRD0 LED19 LED20 LED21 LED22 LED23 GND LED24 LED25 LED26 LED27 LED28 LED29 GND LED30 GND BRMODE OEB VDD OEB PWCLK VDD CE2 /CE1 CE PWCLK Data & Control Signal Connection STROBE NC SHCLK SHCLK VDD /R E S E T /RESET GND GND LED18 LED31 LED17 SL70D0948 LED32 LED33 LED16 LED15 LED34 LED14 LED35 LED13 LED36 GND GND LED12 LED37 LED11 LED38 LED10 System Logic Semiconductor LED39 LED40 LED41 LED9 LED8 LED7 LED42 DOUT6 DOUT5 DOUT4 OUT4 OUT5 OUT6 DOUT3 DOUT2 DOUT1 DOUT0 OUT0 OUT1 OUT2 OUT3 GND LED6 LED5 LED4 LED3 LED2 LED1 GND LED48 LED47 LED46 LED45 LED44 LED43 GND DIN0 DIN1 DIN2 IN5 IN4 IN3 IN2 IN1 IN0 DIN3 OUT7 DIN4 DOUT7 DIN5 OUT8 DIN8 DIN6 DOUT8 DIN7 GND VDD IN7 IN6 IN8 GND GND Application Ex 1. BRMODE = 0 : The brightness is controlled by 8 steps such as 8/8 ~ 1/8. GND SHCLK Oscillator STROBE SHCLK DIN[8:0] 5 ~ 20 M H z 9bit Data STROBE SHCLK DIN[8:0] STROBE PWCLK DOUT[8:0] 9bit Data SL70D0948 Data & Control Signal Connection PWCLK DOUT[8:0] 9bit Data SL70D0948 LED Driver Outputs LED Driver Outputs SHCLK DIN[8:0] STROBE PWCLK DOUT[8:0] 9bit Data SL70D0948 LED Driver Outputs 48 Pins 48 Pins 48 Pins Next Device REFERENCE APPLICATIONS 5 1 2 Gray Scale 9 bit Data Controller 48 L E D s 48 L E D s 48 L E D s Power Power Power SLS System Logic Semiconductor SL70D0948 (continued)