SONIX SN6B400

SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ GENERAL DESCRIPTIONS
SN6B000 is a 8-bit micro controller series with hi-density LCD driver. Combined
with one or more SN6BS00 (64-segment drivers), SN6B000 can form one 1024/
2048/ 4096/ 6144/ 8192 dots LCD system. A dual-tone melody and a voice
synthesizer are included in SN6B000. Also, a 7-bit current-type DAC and the
PWM circuit are built in SN6B000, so that makes users easily choose a speaker
(DA), or a buzzer (PWM) for their applications. SN6B000 only contains 32 COM
signals of LCD. All segment signals are provided by SN6BS00. Several
different types of LCD applications can be implemented by suitably combining
SN6B000 and SN6BS00. SN6B000 not only contains internal mask ROM itself
(128K words, MC mode), but also possesses the interface to access external
ROM (maximum 512K words, MP mode). A memory chip, SN6B400 consists of
256K-word mask ROM and is available to work with SN6B000 to accomplish the
whole micro-processor system.
Dots
1024
2048
4096
6144
8192
Configuration
1 SN6B000 + l SN6BS00
1 SN6B000 + l SN6BS00
1 SN6B000 + 2 SN6BS00
1 SN6B000 + 3 SN6BS00
1 SN6B000 + 4 SN6BS00
COM
16
32
32
32
32
1
SEG
64
64
128
192
256
December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ FEATURES
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ROM space: 512K words (=219*16=220*8); Program Space: 256K*16
MC mode:128K words in SN6B000
−
MP mode: along with SN6B400 to 256K words
−
RAM Size:
256 bytes in SN6B000
−
4*256 bytes in SN6BS00 (2*256 bytes LCD RAM, 2*256 bytes normal
−
RAM)
I/O Port : There are Port0 and Port1 (total 16 pins I/O)
All ports are I/O-type and P0.7 can be modulated with a carry signal
−
Each port can be set as “H”, ”L”, floating, and high-resistance “H”
−
(150K@5V )
Every port can wake up chip when chip is in power-down mode
−
60 instructions
8 levels stack buffer supports interrupt and call subroutine
System Clock:
2MHz RC oscillator
−
2M/ 4M(3.58M) crystal
−
Low speed clock: Register option, 32768 crystal or RC
Three different operation modes can be selected:
Normal mode (both High/Low osc. On).
−
Slow mode
(High osc. Off, Low osc. On).
−
Stop mode
(both High and Low osc. Off).
−
LCD: 1/16 duty (for 1024) or 1/32 duty, frame rate=64 or 128 Hz.
A voltage regulator and double voltage circuit is included in SN6BS000
8 interrupt sources :
5 internal interrupts: T0, TC0, TC1, TW, SPEECH (non-maskable).
−
3 external interrupts: INTP0.0 ~ INTP0.2
−
ISR entry location: Reset: 0000, SPEECH: 0018h, and the others: 0008h
−
Voice:
Built-in voice synthesizer
−
Sampling rate from 4K to 40Khz
−
Dual tone melody with 4 octaves
−
7-bit DA converter (maximum 3mA)
−
PWM output for Buzzer
−
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ PIN ASSIGNMENT
SN6B000
Pin Name
C0~C31
VLC1, VLC4,
VLC5
VLCDR
P/C
A0~A19
D0~D7
CE1B
VO/ BUZ1
BUZ2
OSC/XIN
I/O
Descriptions
Internal
Pull-low
O Common 0 ~ 31
I LCD Bias
I
I
O
I/O
O
O
O
XOUT
CKSEL
O
I
LXIN
LXOUT
P0, P1
XCE_0
XCE_1
XCE_2
XCE_3
XD7~XD0
I
O
I/O
O
O
O
O
I/O
LCD Bias
Micro-processor/Micro-controller
Address Bus for ROM
Data Bus for ROM
Chip Enable of External ROM.
Voice out, 7-bit DA / PWM output
PWM output
High speed Clock input:
CKSEL=L, RC oscillator
CKSEL=H, Crystal
High Speed clock output
High speed clock selection
( 0:2M RC oscillator, 1: Crystal)
Low speed clock input
Low speed clock output
I/O Ports
Chip Enable of SN6BS00 0
Chip Enable of SN6BS00 1
Chip Enable of SN6BS00 2
Chip Enable of SN6BS00 3
Data Bus to Slave Driver
XA9~XA0
WR
FRAME
CL
M
SYNC
TEST
RESETB
VDD
GND
O
O
O
O
O
O
I
I
I
I
Address Bus to Slave Driver
Read Write signal
Frame Synchronous Signal
Display Synchronous Signal
Alternating signal for LCD
Phase 1 synchronous pin.
Test Pin
Reset Pin
Positive power supply
Negative power supply
3
√
√
√
December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
SN6BS00:
Pin Name
S0~S63
VLCDR, VLC2, VLC3,
VLC5
VREG
VPS
VO1, VO2
XA0~XA9
XD0~XD7
XCE
WR
FRAME
CL
M
VDD
GND
SN6B400:
Pin Name
VDD
CEB
SYNC
D7~D0
A18~A0
VSS
I/O
I
I
I
O
I
I
I/O
Descriptions
O Segment 0 ~ 63
I LCD Bias
O
I
I
I
I/O
I
I
I
I
I
I
I
Voltage Pumper
Voltage Pumper
Voltage Pumper
Address Bus
Data Bus
Chip Enable
Read Write signal
Frame Synchronous Signal
Display Synchronous Signal
Alternating signal for LCD
Positive power supply
Negative power supply
Function Description
Positive power supply
Chip Enable. (Active Low)
Clock Pin
Data Output
Address Input
Negative power supply.
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ ABSOLUTE MAXIMUM RATINGS
(All of the voltages referenced to Vss)
Supply voltage (Vdd)
- 0.3V ~ 6.0V
Input in voltage (Vin) Vss
- 0.2V ~ Vdd + 0.2V
Operating ambient temperature (Topr)
0°C ~ + 70°C
Storage ambient temperature (Tstor)
-30°C ~ + 125°C
Power consumption (Pc)
500 mW
„ ELECTRICAL CHARACTERISTICS
SN6B000
PARAMETER
SYM.
DESCRIPTION
Operating voltage
Vdd
Operating current
IddH Vdd = 5.0V, I/O pin unload, normal
MIN.
TYP.
MAX. UNIT
3.9
-
5.1
V
-
1
-
mA
-
15
-
uA
-
-
1
uA
V
mode
Idds Vdd = 5.0V,I/O pin unload, slow
mode
Istby Vdd = 5.0V,I/O pin unload, stop
mode
Reset, TEST pin
ViH
0.7Vdd
-
-
input voltage
ViL
-
-
0.3Vss
-
-
1
uA
ViH
0.8Vdd
-
-
V
ViL
-
-
0.2Vss
I/P port pull-up resistor
Rup Vin = Vss
-
150
-
KΩ
I/P port input leakage
Ilekg Pull-up resistor disable, Vin = Vdd
-
-
1
uA
IoH
Vop = Vdd - 0.5V
1
2
-
mA
IoL
Vop = Vss + 0.5V
2
4
-
mA
Reset, TEST leakage
ILekg Vin = Vdd
current
I/P port input voltage
current
Port0,1 output source
Current
Port0,1 output sink
Current
LCD supply voltage
Vlcd
-
-
6.5
V
LCD frame frequency
Flcd
-
64/128
-
Hz
Vo output Current
Ivo
-
3
4
mA
-
60
-
mA
-
60
-
mA
1/fcpu
-
-
S
-
2
-
MHz
BU1,BU2 Driving
Current
BU1,BU2 Sinking
Current
INTP0 trigger pulse
width
Oscillator frequency
DA output current
IdBU PWM driving current ability.
VBU1/BU2=2.5V
IsBU PWM sinking current ability.
VBU1/BU2=2.5V
Tint01 P0.0 ~ P0.2 Interrupt request pulse
width
fHxosc Rosc=300KΩ
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
SN6BS00
(All of voltages referenced to Vss, Vdd = 5.0V, [email protected], ambient temperature is 25°C unless
otherwise note.)
PARAMETER
SYM.
Operating voltage
Vdd
Operating current
Standby Current
DESCRIPTION
MIN. TYP. MAX. UNIT
3.9
-
5.1
V
IddH LCD pin unload, Voltage-doubler ON
-
3
-
mA
Istby LCD pin unload, Voltage-doubler
-
-
1
uA
Output Voltage of VREG VOREG VDD=3.9V
-
5.4
-
V
VDD=4.5V
-
5.9
-
V
VDD=5.1V
-
6.2
-
V
OFF,
No Data Access from SN6B000.
SN6B400
(All of voltages referenced to Vss, Vdd = 5.0V, [email protected], ambient temperature is 25°C unless
otherwise note.)
PARAMETER
SYM.
DESCRIPTION
MIN. TYP. MAX. UNIT
Operating voltage
Vdd
3.6
-
5.1
V
Operating current
IddH
-
400
-
uA
Standby Current
Istby CEB=5V
-
-
1
uA
Access time
Tac Loading=10pf, VDD = 3.6V~5V
-
-
300
nS
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ APPLICATION CIRCUIT
Š
MC mode with 2048-dot (64 seg X 32 com, 1/7 bias) LCD
−
−
−
Clock: RC type (CPU frequency: 2MHZ)
No low speed clock
Speaker voice output
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
Š
MP mode with SN6B400 and 2048-dot (64seg X 32com, 1/7 bias)
LCD
−
−
−
Clock: 3.58MHZ crystal (CPU frequency: 3.58MHZ)
32768 low speed clock
Buzzer voice output
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
Š
MP mode with SN6B400 and 4096-dot (128seg X 32com, 1/7 bias)
LCD
−
Clock: 3.58MHZ (CPU frequency: 3.58MHZ)
−
32768 low speed clock
−
Speaker voice output
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ BONDING PAD
SN6B000
Note : The substrate MUST be connected to Vss in PCB layout.
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
SN6BS00
Note : The substrate MUST be connected to Vss in PCB layout.
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
SN6B400
Note : The substrate MUST be connected to Vss in PCB layout.
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December 20, 2000
SN6B000
Hi-Density LCD Driver with 8-bit Controller
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December 20, 2000