CXA1390AQ/AR S/H and AGC for CCD Camera Description The CXA1390AQ/AR are CCD camera's signal processing ICs which extract signals from the CCD output. These bipolar ICs perform correlated double sampling. AGC, color separation, high luminance detection and others. Additionary, these ICs are not affected by irregular pulses which occure during the CCD shutter mode. CXA1390AQ 48 pin QFP (Plastic) Featuers • Pin compatible upgraded version of CXA1390Q/R which can be swapped out while using same peripheral chips • Almost completely corrects irregular pulses and their negative affects • Correlated double sampling function alllows for the suppression of low band noise in the CCD output • AGC amplifier, which has High S/N ratio and wide gain control range, enhances the camera sensitivity • Output for iris adjustment. High luminance detection output • Usage of Vg (regulator) output allows for the formation of IRIS and AGC LOOP which are not affected by supply voltage functation Operating Conditions Supply voltage VCC 4.75 to 5.25 CXA1390AR 48 pin LQFP (Plastic) Application S/H and AGC for CCD camera Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VCC 12 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 600 (QFP) mW 950 (VQFP) ∗ mW ∗ (40mm × 40mm, t = 0.8mm with a mounted glass epoxy substrate) V IRIS GC IRIS LEVEL DET CLP GND IRIS CLP IRIS OUT VG OUT W ND PBLK CLP1 23 22 21 20 19 18 17 16 15 14 13 VG V CC2 24 25 AGC CONT SH XSHP SH XSHP SH 33 SH PBLK CLP4 COM PBLK XSP3 XSP2 MODE SW MAX 44 45 46 47 48 XSH2 V CC1 43 F1 CLP DATA IN 42 F2 CLP 41 CS OUT 9 CS CCD GC 8 CS CCD SL 7 CS CLP 6 F3 OUT 5 F2 OUT 4 F1 OUT 3 GY OUT 2 DC OUT 1 XSH1 GATE PBLK F3 CLP 40 CLP BLK LPF FSH1 39 CLP1 GND 38 CLP BLK XSP1 37 CLP1 LPF XSP1 PG IN CLP4 36 CLP4 XSHD COM XSHD XSHP SH SH XSHD 35 SH 10 CLP BLK LPF XSP2 34 CSAGC SL CLP GC GC XSP3 SH XSHP SLICE OR CLP1 W ND 31 AGC MAX 32 AGC SEL GC CLP1 AGC OP OUT 30 SLICE CLP1 CLP OP OP IN + 28 OP IN – 29 W ND PBLK W ND PBLK AGC OUT 27 12 11 CSAGC GC CLP BLK W ND BLK AGC CLP 26 CLP1 CLP DET LEVEL DET OUT Block Diagram and Pin Configuration (Top View) Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E90941A78 CXA1390AQ/AR Pin Description and Standard Pin voltage PIn No. Symbol 1 XSH1 34 XSHP 35 XSHD 40 XSP3 41 XSP2 42 XSP1 48 XSH2 (VCC = 5V) Equivalent circuit Voltage 1 Description 200 34 35 H: 4V and above L: 1V and below 130 High speed pulse input pin for S/H (active at L) 40 41 42 200 48 1k 2 DC OUT 1.8 to 2.1V DC output pin of f1 to f3 output black level 2 180µA 3 GY OUT 4 F1 OUT 5 F2 OUT 6 F3 OUT 27 AGC OUT 7 CS CLP 2.6 to 3.3V 18 IRIS CLP 2.0 to 2.6V 20 DET CLP 1.9 to 2.6V 26 AGC CLP 2.3 to 2.8V 26 45 F3 CLP 2.0 to 2.6V 45 46 F2 CLP 2.0 to 2.6V 47 F1 CLP 2.0 to 2.6V 10 CS OUT 1.7 to 2.2V 300 3 4 Black level 1.8 to 2.1V Signal output pin 5 6 360µA 27 7 18 20 130 Capacitor connecting pin for clamp 46 47 Signal output pin 300 10 17 IRIS OUT 1.7 to 2.0V 17 200µA 24 DET OUT 1.7 to 2.0V –2– 24 Signal output pin Vcc fluctuations effect is minor on DC level CXA1390AQ/AR PIn No. Symbol 8 CS CCD SL Level adjustment pin of high luminance detection pin of the input signal 9 CS CCD GC Gain adjustment pin of input signal high luminance part 11 CSAGC GC Equivalent circuit Voltage Description Gain adjustment pin of high luminance port after AGC 8 9 12 Level adjustment pin of high luminance detection after AGC 11 CSAGC SL 12 21 IRIS LEVEL (Test mode at 0V) 130 Adjustment pin of IRIS output weighting (Active at WND = L) 21 22 25 Gain adjustment pin of IRIS output 22 IRIS GC 25 DET LEVEL Adjustment pin of DET output weighting (Active at WND = L) 31 AGC CONT AGC amplifier gain adjustment pin 32 AGC MAX AGC amplifier MAX gain adjustment pin 13 CLP1 CLP1 pulse input pin Active at H (OPB clamp) 31 32 130 13 14 14 Pre BLK pulse input pin Active at L P BLK H: 4V and above L: 1V and below 15 Window pulse input pin Active at L WND 130 15 36 36 CLP4 16 VG OUT CLP4 pulse input pin Active at H 2.6 to 3.1V 16 100µA 28 OP IN + 130 28 Regulator output pin (Used for the formation of AGC and IRIS loop) Operation amplifier non inverted input pin 1 to 3.3V 29 OP IN – 130 29 –3– Operation amplifier inverted input pin CXA1390AQ/AR PIn No. Symbol Equivalent circuit Voltage Description 500µA 30 30 OP OUT H: 4.2V and above L: 1.2V and below Output pin 3.6V 33 AGC SEL VCC: Low Gain mode GND: High Gain mode 3.3V 50k 33 AGC amplifier gain selection pin 100µA 37 38 PG IN DATA IN Black level 2.7 to 3.2V 37 CCD signal input pin 38 8.5k 44 44 FSHI 130 1.4 to 1.8V –4– Adjustment pin for color separation S/H follow up speed (Normally used OPEN) CXA1390AQ/AR Electrical Characteristics Item Current consumption (Ta = 25°C, VCC = 5.0V) Symbol Conditions ID CONT Min. ACON Min. AGC OUT/DATA IN AGC CONT = 1.5V AGC MAX = 5V AGC SEL = 0V CONT Max. ACON Max. AGC OUT/DATA IN AGC CONT = 4.5V AGC MAX = 5V AGC SEL = 0V Max. Min. MAX Min. AGC OUT/DATA IN AGC CONT = 4.5V AGC MAX = 1.5V AGC SEL = 0V Gain shift GSHI AGC OUT (SEL = 5V) /AGC OUT (SEL = 0V) BLK offset ∆BLK Color Gain separation BLK offset AGC Min. Typ. Max. Unit 32 48 65 mA 6 8 dB 30 32 17 20 dB –5 –4 –3 dB Note 1) –10 0 +10 mV f Gain Color separation output/AGC OUT (f1, f2, f3) –0.5 0 +0.5 dB f ∆BLK Note 1) –10 0 +10 mV 1.8 1.95 2.1 V +0.5 dB DC OUT DC Gate Gain GY GY OUT/AGC OUT –0.5 0 Gain Cont Max. IR Max. IRIS OUT/DATA IN IRIS GC = 5V WND = 5V 18 22 Gain Cont Min. IR Min. IRIS OUT/DATA IN IRIS GC = 1.5V WND = 5V Window Level Max. IRW Max. Gain Cont Max. ratio (attenuation) IRIS GC = 1.5V IRIS LEVEL = 5V WND = 0V Window Level Min. IRW Min. Gain Cont Max. ratio (attenuation) IRIS GC = 1.5V IRIS LEVEL = 1.5V WND = 0V Gain DET G DET OUT/AGC OUT WND = 5V –2 Window Level Max. DET Max. DET OUT/AGC OUT DET LEVEL = 5V WND = 0V –2 Window Level Min. DET Min. Level Max. ratio DET LEVEL = 1.5V WND = 0V IRIS DET dB –5– 4 –1 dB 8 dB dB 0 –14 dB –1 +0.5 dB –1 +0.5 dB –13 dB CXA1390AQ/AR Item Conditions Min. Typ. 13 16 CSC Max. CSOUT differential/ DATA IN differential CS CCD SL = 4.1V CS CCD GC = 5V PBLK = 0V CSC Min. CSOUT differential/ DATA IN differential CS CCD SL = 4.1V CS CCD GC = 1.5V PBLK = 0V Max. SLICE CSC Max. SL Input conversion slice level CS CCD SL = 1.5V Note 1) Min. SLICE CSC Min. SL Input conversion slice level CS CCD SL = 5V Note 1) CSA Max. CS OUT DATA IN = 0.2Vpp CS AGC GC = 5V CS AGC SL = 4.2V CS CCD GC = 1.5V CS CCD SL = 1.5V Note 2) CSA Min. CS OUT differential/ AGC OUTdifferential CS AGC GC = 1.5V CS AGC SL = 4.2V CS CCD GC = 1.5V CS CCD SL = 1.5V Note 2) Max. SLICE CSA Max. SL AGC OUT conversion CS AGC SL = 1.5V Note 3) Min. SLICE CSA Min. SL AGC OUT conversion CS AGC SL = 5V Note 3) 0.06 TEST DATA IN = 0.5Vpp CS CCD GC = 0V Note 4) 0.5 H level OPH OP IN + = 2.1V OP IN – = 2.0V L level OPL OP IN + = 2.0V OP IN – = 2.1V Vg At no load Max. Gain Min. Gain CS CCD Max. Gain CS Min. Gain AGC TEST mode OPAmp Symbol Vg OUT –6– –1 Max. dB 1 0.7 dB V 40 100 mV Vpp 0.5 –1 1 1.2 dB V 0.1 V Vpp 4.2 2.6 Unit V 0.9 1.2 V 2.85 3.1 V CXA1390AQ/AR Note 1) Indicates the specification Output signal BLK input 5 0 Note 2) Voltage between DATA IN input black level and the high luminance level determined by CS CCD SL pin voltage. DATA IN Black level High luminance level Indicates the specification CS OUT Note 3) Voltage between the black level at AGC OUT and the high luminance level determined by CS AGC SL pin voltage. High luminance level AGC OUT CS OUT Black level Indicates the specification Note 4) S/H output DATA IN input can be monitored by turning CS CCD GC (Pin 9) to 0V. –7– CXA1390AQ/AR Test Circuit VCC 5V (3V) (3V) (3V) 0.1 IRIS GC IRIS LEVEL DET CLP GND IRIS CLP IRIS OUT VG OUT W ND PBLK CLP1 22 21 20 19 18 17 16 15 14 13 VG V CC2 23 CLP4 CLP4 COM 41 42 43 44 XSP1 GND FSH1 DATA IN PG IN 40 V CC1 39 MODE SW CLP BLK PBLK XSP1 38 CLP1 LPF XSP2 37 CLP BLK PBLK XSP2 SH CLP1 LPF XSP3 CLP4 36 OR PBLK 10 CS OUT 9 CS CCD GC (3V) 8 CS CCD SL (3V) 7 CS CLP 6 F3 OUT 5 F2 OUT 4 F1 OUT 3 GY OUT 2 DC OUT 1 XSH1 45 GATE 46 47 48 XSH2 XSHP XSHD 35 CLP4 SH XSHD COM SH XSHP XSHD SH SH 34 XSHP XSHP 33 SH AGC SEL (0V) (3V) CLP BLK LPF XSP3 SH (5V) (3V ) 0.1 F1 CLP SH AGC MAX 32 F3 CLP 31 CSAGC SL CLP CLP1 AGC AGC CONT (1.5V) GC CLP1 CLP OP OP OUT 30 SLICE MAX OP IN – 29 (2V) GC GC OP IN + 28 SLICE F2 CLP W ND PBLK W ND W ND BLK AGC OUT 27 12 11 CSAGC GC W ND PBLK CLP1 CLP1 AGC CLP 26 CLP BLK 25 0.1 (2V) CLP2 24 CLP DET LEVEL (3V) 0.1 DET OUT 10µ (3V) 0.1 0.1 0.1 IN 0.1 0.1 10µ VCC 5V Note 1) Capacitor unit value at µF. Note 2) Voltage in parentheses are those not specified in the Electrical Characteristics Test Conditions. Note 3) indicates a test pin. (For both AC and DC) –8– CXA1390AQ/AR Timing Diagram for Testing Equivalent to black DATA IN input Differs with every test 5V CLP 1 0 5V CLP 4 1H 2µsec 2µsec 0 Output signal level Output waveform AGC OUT IRIS OUT F1 to F3 OUT GY OUT DET OUT CS OUT –9– CXA1390AQ/AR Standard Control Characteristics (VCC = 5V, Ta = 25°C) AGC amplifier gain control characteristics AGC maximum control characteristics dB dB (AGC Max. = 5V) (AGC CONT = 5V) 30 30 25 20 20 15 10 5 10 0 1 2 3 4 5 5 V 0 1 AGC CONT voltage 2 3 4 5 V AGC maximum voltage IRIS WINDOW control characteristics (Weighting characteristics) IRIS gain control characteristics dB dB (WND = 0V) Gain control characteristics when IRIS LEVEL=5V is set at 0dB 25 0 20 –5 15 –10 10 –15 5 –20 0 0 1 2 3 4 5 V 1 IRIS GC voltage DET WINDOW control characteristics (Weighting characteristics) dB (WND = 0V) Gain control characteristics when DET LEVEL = 5V is set at 0dB 0 –5 –10 –15 –20 1 2 3 4 DET LEVEL voltage 2 3 4 IRIS LEVEL voltage 5 V – 10 – 5 V CXA1390AQ/AR CS CCD gain control characteristics CS CCD slice control characteristics V dB (High luminance detection level control) Input conversion value 0 20 Note 1-a Note 1-b 0.2 15 0.4 10 0.6 5 0.8 0 0 1 2 3 4 5 1.0 V 0 1 CS CCD GC voltage 2 3 4 5 V CS CCD SL voltage CS AGC gain control characteristics CS AGC slice control characteristics dB V 20 1.6 Note 2-b Note 2-a 1.2 15 0.8 10 0.4 5 0 (High luminance detection level control after AGC) Input conversion value 0 1 2 3 4 5 1 V 2 3 4 5 V CS AGC SL voltage CS AGC GC voltage Note 1-a, 1-b Note 2-a, 2-b (2) DATA IN CS OUT SLICE GCA (1) AGC CS OUT SLICE GCA (1) (3) CS CCD SL (2) COLOR SEPARATION CS CCD GC (3) CS AGC SL CS AGC GC Detection level (1) Detection level (2) (3) Black level Note 1-b Voltage indicated at CS CCD slice control characteristics (1) Note 2-b Voltage indicated at CS AGC slice control characteristics Black level Note 1-a Characteristics indicated at CS CCD gain control characteristics =ratio of 3 and 2 (dB) – 11 – (2) (3) Note 2-a Characteristics indicated at CS AGC slice control characteristics =ratio of 3 and 2 (dB) CXA1390AQ/AR Supply voltage Characteristics Standard Design Documentation (Ta = 25°C) AGC amplifier gain control characteristics AGC maximum control characteristics dB dB 5.25V 5.25V 5V (AGC CONT = VCC) (AGC Max. = VCC) 30 5V 30 4.75V 25 4.75V 20 20 15 10 10 5 0 1 2 3 4 5 (× VCC ) 5 5 0 1 2 3 4 5 AGC maximum voltage AGC CONT voltage (× VCC ) 5 IRIS WINDOW control characeristics (Weighting characteristics) IRIS gain control characteristics dB dB 25 WND = 0V Gain control characteristics when IRIS LEVEL = Vcc is set at 0dB 5.25V 5V 4.75V 20 0 5.25V 5V –5 15 4.75V –10 10 –15 5 –20 0 0 1 2 3 4 5 × VCC 5 1 IRIS GC volage dB WND=0V Gain control characteristics when DET LEVEL=Vcc is set at 0dB 5V 5.25V 4.75V –5 –10 –15 –20 1 3 4 IRIS LEVEL voltage DET WINDOW control (Weighting characteristics) 0 2 2 3 4 DET LEVEL voltage 5 (× VCC ) 5 – 12 – 5 (× VCC ) 5 CXA1390AQ/AR CS CCD gain control characteristics CS CCD slice control characteristics V dB (High luminance detection level control) Input conversion value Note 1-a 20 0 5.25V 5V 4.75V 15 Note 1-b 5V 5.25V 0.2 4.75V 0.4 10 0.6 5 0.8 0 0 1 2 3 4 5 (× 1.0 VCC ) 5 0 1 CS CCD GC voltage 2 3 4 5 (× VCC ) 5 CS CCD SL voltage CS AGC slice control characteristics CS AGC gain control characteristics V dB Note 2-a 20 Note 2-b 1.6 5.25V 5V 1.2 4.75V 15 0.8 4.75V 10 0.4 5 0 5V (High luminance detection level control after AGC) Input conversion value 5.25V 0 1 2 3 4 5 CS AGC GC voltage (× VCC ) 5 Note 1-a, 1-b 1 2 3 Note 2-a, 2-b GCA (1) AGC CS OUT SLICE GCA (1) (3) CS CCD SL (2) COLOR SEPARATION CS OUT SLICE (× VCC ) 5 5 CS AGC SL voltage (2) DATA IN 4 CS CCD GC (3) CS AGC SL CS AGC GC Detection level (1) Detection level (2) (3) Black level Note 1-b Voltage indicated at CS CCD slice control characteristics (1) Note 2-b Voltage indicated at CS AGC slice control characteristics Black level Note 1-a Characteristics indicated at CS CCD gain control characteristics =ratio of 3 and 2 (dB) – 13 – (2) (3) Note 2-a Characteristics indicated at CS AGC slice control characteristics =ratio of 3 and 2 (dB) CXA1390AQ/AR Standard Design Documentation Temperature Characteristics (VCC = 5V) AGC maximum control characteristics AGC amplifier gain control characteristics dB dB –20°C –20°C 25°C 25°C (AGC Max. = VCC) 30 (AGC CONT = VCC) 30 75°C 75°C 25 20 20 15 10 10 5 5 0 1 2 3 4 5 0 V 1 2 3 4 5 V AGC maximum voltage AGC CONT voltage IRIS WINDOW control characteristics (Weighting characteristics) IRIS gain control characteristics dB dB 25 –20°C 25°C 75°C 20 0 (WND = 0V) Gain control characteristics when IRIS LEVEL = VCC, Ta=25°C is set at 0dB. 25°C –20°C 75°C –5 15 –10 10 –15 5 –20 0 0 1 2 3 4 5 1 V IRIS GC voltage DET WINDOW control (Weighting characteristics) dB (WND = 0V) Gain control characteristics when DET LEVEL = VCC, Ta = 25°C is set at 0dB. 0 25°C –20°C 75°C –5 –10 –15 –20 1 2 3 4 IRIS LEVEL voltage 2 3 4 DET LEVEL voltage 5 V – 14 – 5 V CXA1390AQ/AR CS CCD gain control characteristics CS CCD slice control characteristics V dB (High luminance detection level control) Input conversion value Note 1-a 0 20 –20°C 25°C 75°C 15 Note 1-b –20°C 25°C 75°C 0.2 0.4 10 0.6 5 0.8 0 1.0 0 1 2 3 4 5 V 0 1 CS CCD GC voltage CS AGC gain control characteristics dB 2 3 4 V 5 CS CCD SL voltage CS AGC slice control characteristics V Note 2-a Note 2-b –20°C 1.6 20 25°C 75°C 1.2 15 0.8 10 0.4 5 0 75°C (High luminance detection level control after AGC) Input conversion value 25°C –20°C 0 1 2 3 4 5 V 1 CS AGC GC voltage 2 3 Note 1-a, 1-b Note 2-a, 2-b (2) DATA IN GCA (1) AGC CS OUT SLICE GCA (1) (3) CS CCD SL V 5 (2) COLOR SEPARATION CS OUT SLICE 4 CS AGC SL voltage CS CCD GC (3) CS AGC SL CS AGC GC Detection level (1) Detection level (2) (3) Black level Note 1-b Voltage indicated at CS CCD slice control characteristics (1) Note 2-b Voltage indicated at CS AGC slice control characteristics Black level (2) Note 1-a Characteristics indicated at CS CCD gain control characteristics =ratio of 3 and 2 (dB) (3) – 15 – Note 2-a Characteristics indicated at CS AGC slice control characteristics =ratio of 3 and 2 (dB) 5V AGC-CONT AGC-MAX AGC-SEL XSHP XSHD CLP4 39 V CC 1 2 XSH1 1 3 GY-OUT XSHP XSHD CLP4 XSP2 XSP1 XSH1 XSH2 48 XSH2 DC-OUT 47 F1-CLP 46 F2-CLP 45 F3-CLP 44 FSHI 43 GND 42 XSP1 41 XSP2 40 XSP3 F1-OUT TG CLP1 8 9 BFG CLP2 ID PBLK 7 6 5 LPF DL 4 F2-OUT 38 DATA-IN F3-OUT CXA1390AQ/AR OPIN-N CS-CLP 37 PG-IN 25 DET- 24 OUT V CC 2 23 10 DETECTOR 5V 11 12 CLP1 13 PBLK 14 WND 15 VG-OUT 16 BLK BF SYNC LALT SG CONT 4fSC LPF 64 YH-IN 63 YGAM- 62 V CC IHDL 2 61 LPF-ADJ3 60 LPF-ADJ2 IRIS-OUT 17 LPF-ADJ1 59 IRIS-CLP 18 4 8 YR YG YB VAP-GAIN MPX1-CLP 9 10 11 12 15 14 VAP-CLP CXA1391 Q/R VAP-SLICE 13 38 37 39 40 41 43 42 44 CONTROLLER FOR TITLER CR CG CB DL 7 6 5 3 1 57 Y2-GAIN DET-CLP 20 58 GND 56 DLY2-IN GND 19 55 DLY1-IN 54 Y1-GAIN OUT 53 DLY1-OUT IRIS-GC 22 WND 5V YOCLP S1-IN 52 DLY0- 45 46 47 48 49 50 MPX2-CLP R-GAIN CS-CLP 51 S2-IN YHCLP DLYH-IN IRIS-LEVEL 21 CS-AGC-GC OP-OUT CS-CCD-SL 26 CS-AGCSL OPIN-P CS-CCD-GC AGC-OUT CS-OUT AGC-CLP DETLEVEL 27 16 17 18 19 13 14 10 11 12 R-Y 20 OUT B-Y HUE 21 R-Y HUE 22 VCS-GAIN 23 CS-OUT 24 YL-OUT 25 GND 26 CGAM-CONT 27 WB-R 28 WB-G 29 WB-B 30 C- 32 SLICE WB-DC 31 33 34 36 35 B-CLP CS-IN 28 DLC1-IN DLYH-CLP YH-OUT1 ID B-MTX CLP4 29 C1-GAIN DLYH-OUT YH-OUT2 B-GAIN CLP2 31 30 R-MIX DLCO-OUT TP B-CONT DLYH-GAIN R-CONT VAP-OUT G-CLP R-Y GAIN R-CLP B-Y GAIN 32 9 15 16 8 7 6 5 CXA1393AN/AM 17 18 19 4 3 2 CLP 48 B-Y 1 20 21 22 23 24 LPF 2 1 47 B-Y IN 46 B-LEVEL 45 CLP2 44 CLP4 43 AGND 42 YL-YH IN 41 YL-YH CLP 40 YH-IN 39 YH-CLP 3 5V 38 NOISE-SLICE 37 YTBLK 4 7 6 5 CXA1392Q/R 5V 8 9 WC 24 VIDEO-OUT 21 SETUP- 23 CLP V-OUT 22 25 26 10 11 12 MODE 13 CS-AGC 14 CS-Y 15 C-OUT 16 AV CC 17 C-IN 18 DGND 19 CHROMA-OUT 20 27 28 29 31 30 32 33 34 35 36 R-Y IN 33 R-Y CLP 34 4FSC C LEVEL B-Y OUT DL DV CC 35 CLP4 LALT 36 W/B CONTROLLER DR-OUT DY-OUT NC IHDL DB-IN CT-BLK DB-OUT DR-IN YT-BLK SHPLEVEL DLE BFG IHDL YR-IN GND DY-CLP DLD SHP-CLP1 Y-LEVEL NC IHDL YB-IN CG-IN SHP-CLP2 BF CCD YT-GC CB-IN DY-IN SHP-OUT CT-GC CR-IN YG-IN FADER-MODE HYSCONT TH-CONT COMP-IN COMPOUT – 16 – V CC SETUP FADER-SIG FSC-OUT SYNC SYNC-LEVEL CBLK CTBLK CXA1390 Series System Diagram (The title insertion function can be removed by doing away with CXA1393AN) BPF 5V C Vid Y CXA1390AQ/AR CXA1390AQ/AR Package Outline Unit: mm CXA1390AQ 48PIN QFP (PLASTIC) 15.3 ± 0.4 + 0.1 0.15 – 0.05 + 0.4 12.0 – 0.1 36 25 0.15 24 48 13 13.5 37 12 + 0.15 0.3 – 0.1 0.8 ± 0.12 M 0.9 ± 0.2 1 + 0.2 0.1 – 0.1 + 0.35 2.2 – 0.15 PACKAGE STRUCTURE SONY CODE QFP-48P-L04 EIAJ CODE ∗QFP048-P-1212-B JEDEC CODE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER / PALLADIUM PLATING LEAD MATERIAL COPPER / 42 ALLOY PACKAGE WEIGHT 0.7g CXA1390AR 48PIN LQFP (PLASTIC) 9.0 ± 0.2 7.0 ± 0.1 36 37 24 48 13 (8.0) 25 A (0.22) 0.5 ± 0.2 ∗ 12 1 + 0.05 0.127 – 0.02 0.5 ± 0.08 + 0.2 1.5 – 0.1 + 0.08 0.18 – 0.03 0.1 0° to 10° 0.5 ± 0.2 0.1 ± 0.1 NOTE: Dimension “∗” does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY / PHENOL RESIN SOLDER PLATING SONY CODE LQFP-48P-L01 LEAD TREATMENT EIAJ CODE ∗QFP048-P-0707-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 0.2g JEDEC CODE – 17 –