CXA1720Q Read/Write Amplifier (with Built-in Filters) for FDDs For the availability of this product, please contact the sales office. Description The CXA1720Q is an IC for use with floppy disk drives, and contains a Read circuit (with built-in filters), Write circuit, Erase circuit, and supply voltage detection circuit, all into a single chip. 32 pin QFP (Plastic) Features • Single 5 V power supply. • Filter system can be switched among four modes: 1M/2M, and inner track/outer track. This allows for a significant reduction in the number of external parts such as differentiator constants, low-pass filters, and switches. (Compared with conventional Sony products, the number of parts has been reduced by one-half.) • Filter characteristics can be customized. • Low pre-amplifier input conversion noise voltage of 2.0 nV/ √ Hz (typ.) keeps Read data output jitter to a minimum. The pre-amplifier voltage gain can be selected as either 100× or 200×. • Supply voltage detection circuit prohibits error writing during power ON/OFF or abnormal voltage. • Power consumption is kept down to 115 mW (typ.) and this IC is suitable for use with battery-driven FDDs. • Built in Time constant capacitors for monostable multivibrator Nos. 1 and 2. (The pulse width for monostable multivibrator No. 2 is fixed.) • Power saving function reduces power consumption when the IC is not in use. When in power saving mode (5 mW typ.), only the power supply ON/OFF detector functions. • The Write driver has a built-in reset circuit. When the mode is switched from Read mode to Write mode, the Write current flows from head 0A if head side 0 is selected and from head 1A if head side 1 is selected. HIGH GAIN PREAMP OUT VREF FILTER OUT A 23 HEAD 1A 24 HEAD 1B HEAD 0A Block Diagram and Pin Configuration HEAD 0B • The monostable multivibrator No. 1 pulse width switching function for the time domain filter permits switching between 1M and 2M mode. • Write current switching function permits switching of the Write current among four modes: 1M/2M and inner track/outer track. (Filter inner track/outer track switching is separate.) 22 21 20 19 18 17 W/C 1 25 SET FILTER 16 OUT B PREAMP FILTER DIFF+LPF (BPF) W/C 1 COMP 26 15 COMP IN B W/C 2 SET 27 14 COMP IN A WRITE DRIVER D.GND 29 13 A.GND COMP W/C 2 COMP 28 ERASE DRIVER 12 MMVA FILTER 11 SET ERASE OUT 1 31 TIME DOMAIN FILTER ERASE OUT 0 30 CONTROL LOGIC POWER MONITOR POWER 32 SAVE 10 Vcc 6 7 SIDE 1 READ DATA 5 HIGH DENSITY 8 FILTER CONTROL WRITE DATA 4 ERASE GATE 3 WRITE GATE 2 WRITE CURRENT 1 POWER ON 9 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E93717-TE CXA1720Q Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta=25 °C) • Supply voltage • Digital signal input pin (note) input voltage • Power ON output applied voltage • Erase output applied voltage • Head 0A, 0B, 1A, 1B applied voltage • Power ON output sink current • Erase output sink current • Operating temperature • Storage temperature • Allowable power dissipation VCC Topr Tstg PD 7 V –0.5 to VCC+0.3 V VCC+0.3 V VCC+0.3 V 15 V 7 mA 30 mA –20 to +75 °C –65 to +150 °C 500 mW Supply Voltage Range VCC 4.4 to 6.0 V Note) WRITE DATA, WRITE CURRENT, WRITE GATE, ERASE GATE SIDE1, FILTER CONTROL, HIGH DENSITY, HIGH GAIN, POWER SAVE —2— CXA1720Q Pin Description Pin No. 1 (Ta=25 °C, VCC=5 V) Symbol Pin voltage POWER ON — Equivalent circuit Description Vcc 100k Reduced voltage detection output. This is an open collector that outputs a low signal when VCC is below the specified value. 1 A.GND 2 WRITE DATA — Vcc Write data input. This pin is a Schmitt-type input and is triggered when the logical voltage goes from high to low. 1k 2 2.3V 3 READ DATA A.GND — 140 Read data output. This pin is active when the logical voltage of the Write gate signal and the Erase gate signal is high. Vcc 3 D.GND 4 5 6 7 WRITE CURRENT WRITE GATE ERASE GATE SIDE1 — — — — Vcc 100k 8 FILTER CONTROL — 8 4 9 5 20 6 1k 2.1V 7 9 HIGH DENSITY — 20 HIGH GAIN — A.GND —3— Write current control. The Write current is increased when the logical voltage is low. Write gate signal input. The Write system is active when the logical voltage is low. Erase gate signal input. The Erase system is active when the logical voltage is low. Head side switching signal input. The HEAD1 system is active when the logical voltage is low, and the HEAD0 system is active when the logical voltage is high, but only when the logical voltage for the Write gate and the Erase gate is high. Filter inner track/outer track mode control. Inner track mode is selected when the logical voltage is low. Filter, time domain filter and Write current 1M/2M mode control. 2M mode is selected when the logical voltage is low. Pre-amplifier voltage gain selection. Gain of 100x is selected when the logical voltage is high; gain of 200x is selected when the logical voltage is low. CXA1720Q Pin No. 10 11 Symbol Pin voltage VCC FILTER SET — 3.8 V Equivalent circuit Description Vcc 1k 1.2V 147 11 Power supply (5 V) connection. Connection for filter cut-off frequency setting resistor. Connect the filter cut-off frequency setting resistor RF between this pin and VCC to set the cutoff frequency. A.GND 12 MMVA 0.5 V Vcc 147 Time domain filter monostable multivibrator No. 1 pulse width setting pin. Connect the monostable multivibrator No. 1 pulse width setting resistor RA between this pin and A.GND. 12 1.2V A.GND 13 14 A. GND COMP IN A — 3.3 V Vcc 10k Analog system GND connection. Comparator differential inputs. 16k 10k 14 147 15 COMP IN B 3.3 V 15 147 60µ 16 FILTER OUT B 3.3 V A.GND Vcc 140 140 16 17 FILTER OUT A 3.3 V 17 500µ 500µ A.GND —4— Filter differential outputs. CXA1720Q Pin No. 18 Symbol Pin voltage VREF 2.8 V Equivalent circuit Description Connection for internal reference voltage decoupling capacitor. Connect the decoupling capacitor CREF between this pin and A.GND. Vcc 500 18 120µ 19 PREAMP OUT A.GND 2.8 V Pre-amplifier output. Vcc 140 19 320µ 21 HEAD 1B — 22 HEAD 1A — 23 HEAD 0B — 24 HEAD 0A — A.GND Connection for magnetic head input/output. Connect the recording/playback magnetic head to these pins, and connect the center tap to V CC. When the logical voltage for Pin 7 (SIDE1) is low, the HEAD1 system is active; when the logical voltage is high, the HEAD0 system is active. 24 23 22 21 A.GND 25 W/C1SET Vcc 1.2V 147 25 27 147 27 Connection for 1M write current setting resistor. Connect the Write current setting resistor R W1 between this pin and VCC to set the Write current. W/C2SET Connection for 2M Write current setting resistor. Connect the Write current setting resistor R W2 between this pin and VCC to set the Write current. A.GND 26 W/C1 COMP — 28 W/C2 COMP — Vcc 26 28 A.GND —5— Connection for 1M Write current compensation resistor. Connect the Write current compensation resistor RWC1 between this pin and Pin 25 (W/C1SET) to set the amount of increase in the Write current. Connection for 2M Write current compensation resistor. Connect the Write current compensation resistor RWC2 between this pin and Pin 27 (W/C2SET) to set the amount of increase in the Write current. CXA1720Q Pin No. 29 30 Symbol Pin voltage D. GND ERASE OUT0 — — ERASE OUT1 — Equivalent circuit Description Digital system GND connection. Erase current output for the HEAD0 system. Vcc 30 31 Erase current output for the HEAD1 system. 31 D.GND 32 POWER SAVE — Vcc 162k 1k 32 2.1V A.GND —6— Power saving signal input. When the logical voltage is low, the IC is in power saving mode. In power saving mode, only the power supply ON/OFF detection function operates. CXA1720Q Electrical Characteristics Current Consumption Item Current consumption for Read Current consumption for Write/Erase Current consumption for Power saving (Ta=25 °C, VCC=V) Symbol ICCR ICCWE ICCPS Conditions VCC=5 V WG=“H” VCC=5 V WG=“L”, EG=“L” VCC=5 V PS=“L” Measure- Measurement ment circuit point Min. Typ. Max. — — 13.0 23.0 33.0 — — 8.0 14.0 20.0 — — 0.9 1.8 Power Supply Monitoring System Item Power supply ON/OFF detector threshold voltage Power ON output saturation voltage Unit mA (Ta=25 °C) Symbol Conditions VTH VSP Measure- Measurement ment circuit point — — Min. Typ. Max. 3.5 3.9 4.3 Unit V VCC=3.5 V — I=1 mA — 0.5 Read System Item Pre-amplifier voltage gain SIDE0∗ Pre-amplifier voltage gain SIDE1∗ Pre-amplifier frequency response SIDE0∗ Pre-amplifier frequency response SIDE1∗ Symbol GV0 GV1 BW0 SW4=a, b 1 G 1 G 1 G SW4=a, b Typ. Max. Unit 38.1/ 44.1 40/46 41.6/ 47.6 dB AV/AV0=–3 dB SW4=a, b AV/AV1=–3 dB BW1 5 MHz SW4=a, b SW1, 5=b Bandwidth=400 Hz EN0 to 1 MHz Vi=0, SW4=b Bandwidth=400 Hz Pre-amplifier input conversion SIDE1 Min. SW1, 5=b SIDE0 noise voltage Measure- Measurement ment circuit point f=100 kHz f=100 kHz Pre-amplifier input conversion noise voltage Conditions EN1 to 1 MHz SW4=b Vi=0, SW1, 5=b ∗ When SW4 = a: Vi = 10 mVp-p When SW4 = b: Vi = 5 mVp-p —7— 2.0 2.9 µVrms CXA1720Q Read System (Ta=25 °C, VCC=5 V) Item Pre-amplifier output offset voltage (vs. VREF) Pre-amplifier output voltage amplitude∗∗ Filter differential output offset voltage Filter differential output voltage amplitude Time domain filter monostable multivibrator No. 1 pulse width precision Symbol Measure- Measurement ment circuit point Min. Typ. Max. Unit +500 mV Vi=0 VOFSP SW4=a, b, 1 F, G –500 1 G 1.8 1 D, E –100 1 D, E 2.8 SW1, 5=a, b f=100 kHz VOP SW4=a, b, Vp-p SW1, 5=a, b VOFSF Vi=0 VOF f=100 kHz Vi=60 mVp-p ETM1 RA=27 kΩ ETM1’ Refer to Fig. 1 Time domain filter monostable multivibrator No. 2 pulse width Conditions T2 (fixed) RA=27 kΩ Refer to Fig. 1 1 B, C A 1 A +100 Vp-p –10 260 mV 400 +10 % 540 ns 0.5 V Read data output low voltage VOL IOL=2 mA 1 A Read data output high voltage VOH IOH=–0.4 mA 1 A Read data output∗∗∗ rise time TR 1 A 100 ns Read data output∗∗∗ fall time TF 1 A 100 ns 1 A 1 % RL=2 kΩ CL=20 pF RL=2 kΩ CL=20 pF 2.8 V Vi=0.25 mVp-p to Peak shift∗∗∗∗ PS 10 mVp-p f=62.5 kHz Refer to Fig. 1 ∗∗ When SW4 = a: Vi = 60 mVp-p When SW4 = b: Vi = 30 mVp-p ∗∗∗ Read data output between 0.5 V to 2.4 V ∗∗∗∗ For Vi = 0.25 mVp-p to 5m Vp-p: SW4 = b (pre-amplifier voltage gain: 46 dB) For Vi = 0.5 mVp-p to 10 mVp-p: SW4 = a (pre-amplifier voltage gain: 40 dB) —8— CXA1720Q Comparator input (Measurement points B and C) Read data output (Measurement point A) 1.4V T1 T2 TA TB Fig. 1 Monostable multivibrator Nos. 1 and 2 pulse width precision and peak shift measurement conditions • Monostable multivibrator No. 1 pulse width precision When HD = high: ETM1 = ( 2.45T µS –1) × 100 (%) 1 When HD is low: ETM1' = ( 1.25T µS –1) × 100 (%) 1 • Monostable multivibrator No. 2 pulse width = T2 • Peak shift PS = 1 2 TA–TB × 100 (%) TA+TB —9— CXA1720Q Read System (Filters) Item 1M/ (Ta=25 °C, VCC=5 V) Symbol Peak frequency FO1 Peak voltage gain∗∗∗∗∗ GP1 outer Conditions Vi=3mVp-p HG=“L” HD=“H” FC=“H” Refer to Fig. 2 at fO1 Measure- Measurement ment circuit point 1 1 D, E G D, E Min. Typ. Max. Unit 153.0 170.0 187.0 kHz 3.6 5.5 7.1 Refer to Fig. 2 track Frequency response (1) Frequency response (2) G11 G12 at 1 3 fO1 Refer to Fig. 2 at 3fO1 1 D, E –7.6 –7.1 –6.6 1 D, E –25.0 –23.1 –21.5 1 D, E 163.8 182.0 200.2 3.6 5.5 7.1 dB Vi=3mVp-p Peak frequency fO2 HG=“:L” kHz HD=“H” FC=“L” 1M/ Peak voltage gain∗∗∗∗∗ GP2 inner track Frequency response (1) G21 G22 Peak frequency fO3 Peak voltage gain∗∗∗∗∗ GP3 track Frequency response (1) G31 outer 2M at fO2 1 G D, E Refer to Fig. 2 Frequency response (2) 2M/ Refer to Fig. 2 at 1 fO2 3 Refer to Fig. 2 at 3fO2 Vi=3mVp-p HG=“L” HD=“L” FC=“H” Refer to Fig. 2 at fO3 1 D, E –7.6 –7.1 –6.6 1 D, E –25.0 –23.1 –21.5 1 D, E 288.0 320.0 352.0 3.6 5.5 7.1 1 G D, E dB kHz Refer to Fig. 2 Frequency response (2) G32 Peak frequency fO4 Peak voltage gain∗∗∗∗∗ GP4 inner at 1 3 fO3 Refer to Fig. 2 at 3fO3 Vi=3mVp-p HG=“L” HD=“L” FC=“L” Refer to Fig. 2 at fO4 1 D, E –7.6 –7.1 –6.6 1 D, E –25.0 –23.1 –21.5 1 D, E 310.5 345.0 379.5 5.3 7.2 8.8 1 G D, E dB kHz Refer to Fig. 2 track Frequency response (1) Frequency response (2) G41 G42 at 1 3 fO4 Refer to Fig. 2 at 3fO4 ∗∗∗∗∗ GPN = 20Log10 (VFilterout/VPreout) VFilterout: Filter differential output voltage (N=1 to 4) —10— 1 D, E –8.6 –8.1 –7.6 1 D, E –36.2 –34.3 –32.7 dB CXA1720Q (dB) GPN G1N G2N 1 f0 3 f0 3f0 (N=1 to 4) Fig. 2 Filter frequency response measurement conditions —11— f(Hz) CXA1720Q Write/Erase System Item (Ta=25 °C, VCC=5 V) Symbol Write current output precision∗ EW Write current output unbalance DW Write current compensation current precision∗∗ Measure- Measurement ment circuit point Conditions WG=“L” RW=4.3 kΩ WG=“L” RW=4.3 kΩ Min. Typ. Max. Unit 2 LKJI –7 +7 2 LKJI –1 +1 2 LKJI –10 +10 2 LKJI 10 µA 2 L’K’J’I’ 1 V 2 MN 10 µA 2 M’N’ 500 mV Max. Unit % WG=“L” RW=4.3 kΩ EWC RWC=12 kΩ Head I/O pin leak current for Write Head I/O pin saturation voltage for Write Leak current for Erase current switch Output saturation voltage for Erase current switch ILKW WG=“L” WG=“L” VSW SW1=6 ILKE EG=“L” EG=“L” VSE I=30 mA SW2=b ( 2.70I mA ∗ Write current output precision EW = ∗∗ Write current compensation current precision EWC = IW: WRITE CURRENT = “H” W ) –1 × 100 (%) I ’–I –1) × 100 (%) ( 0.90 mA W W IW’: WRITE CURRENT = “L” Logic Input Block Item Symbol Conditions Measure- Measurement ment circuit point Digital low input voltage VLD 2 Digital high input voltage VHD 2 Schmitt-type digital low input voltage Schmitt-type digital high input voltage Digital low input current Digital high input current BCDE BCDE FGHP 2 A VHSD 2 A IHD VL=0 V 2 VH=5 V 2 —12— ABCD EFGHP ABCD EFGHP Typ. 0.8 FGHP VLSD ILD Min. 2.0 V 0.8 2.0 –20 µA 10 CXA1720Q Electrical Characteristics Measurement Circuit 1 G –1/2V 1 1/2V 1 a F b a SW5 a b SW4 b 20 19 HEAD 1B HIGH GAIN PREAMP OUT 18 VREF 21 E 17 FILTER OUT A 22 HEAD 1A 1 25 W/C SET 23 HEAD 0B 4.3k 24 HEAD 0A 0.1µ FILTER OUT B 12k 4.3k 16 D 3300p W/C 1 26 COMP COMP IN B 15 W/C 2 27 SET COMP 14 IN A C 3300p B 12k 2 28 W/C COMP A.GND 13 CXA1720Q 29 D.GND MMVA 12 ERASE 30 OUT 0 FILTER SET 11 27k 3.2k 5V Vcc 31 ERASE OUT 1 4 5 SIDE 1 WRITE CURRENT 3 6 7 FILTER CONTROL READ DATA 2 ERASE GATE WRITE DATA 1 32 POWER SAVE WRITE GATE POWER ON 10 HIGH DENSITY SW3 b 9 a 8 SW1 SW2 a b a b A Note) Unless otherwise specified, switches are assumed to be set to “a”. Electrical Characteristics Measurement Circuit 2 H 2.2k SW1 a b a b a 23 22 21 20 19 HIGH GAIN PREAMP OUT I' 24 HEAD 1B J' 0.1µ b HEAD 1A K' b a HEAD 0B W/C 1 25 SET I HEAD 0A L' 4.3k J K 2.2k 18 VREF L 2.2k 17 FILTER OUT A 2.2k FILTER OUT B 12k 4.3k 16 W/C 1 26 COMP COMP IN B 15 W/C 2 27 SET COMP 14 IN A 12k W/C 2 28 COMP A.GND 13 CXA1720Q 29 D.GND MMVA 12 ERASE 30 OUT 0 FILTER SET 11 27k SW2 32 P POWER SAVE 3.2k 5V 10 1 2 3 4 5 6 A SIDE 1 FILTER CONTROL b Vcc ERASE 31 OUT 1 ERASE GATE N' WRITE GATE a WRITE CURRENT N READ DATA M' b 30mA 100k 30mA a WRITE DATA M POWER ON 100k HIGH DENSITY 9 7 8 B C D E F G Note) Unless otherwise specified, switches are assumed to be set to “a”. —13— CXA1720Q Description of Operation (1) Read system Pre-amplifier The pre-amplifier amplifies input signals. The voltage gain can be switched between 40 dB and 46 dB, using Pin 20. Filters The filters differentiate the signals amplified by the pre-amplifier. The high-band noise components are attenuated by the low-pass filter. The filters can be switched among four modes, depending on the settings of Pins 8 and 9. In 1M/outer track mode, the peak frequency fO1 is set by external resistor RF. fO for the other three modes is switched by the internal settings of the IC, with fO1 used as a reference (1.00). The filters are explained below. 1) Active filter block 19 Pre-amplifier output Pre-amplifier output BPF Secondary LPF HPF Tertiary fCL; variable Q=0.577 Q; variable fCH=5KHz Filter output A 16 Filter output B Amp. Primary fOB=1.2XfCL 17 Gain; 8.0dB Filter Characteristics Table 1 Pin 8 H L H L Pin 9 H H L L LPF characteristics 1M/outer track mode: 1M/inner track mode: 2M/outer track mode: 2M/inner track mode: Butterworth Butterworth Butterworth Chebyshev 1 dB ripple The formula for the peak frequency f01 for 1M/outer track mode is shown below: f01 = 527/RF + 5.8 (kHz) f01: peak frequency in 1M/outer track mode RF: filter setting resistance (kΩ) The relationship between f01 and f0 in the four modes is as follows: 1M/outer track: f01 = 1.0 × f01 1M/inner track: f02 = 1.07 × f01 2M/outer track: f03 = 1.88 × f01 2M/inner track: f04 = 2.03 × f01 Note that these filters can be customized. Customization is explained on pages 17 and 18. —14— fO ratio 1.00 1.07 1.88 2.03 CXA1720Q Comparator The comparator detects the crosspoint of the filter differential output. Time domain filter The time domain filter converts the comparator output to Read data. This filter is equipped with two monostable multivibrators. Monostable multivibrator No. 1 eliminates unnecessary pulses, and monostable multivibrator No. 2 determines the pulse width of Read data. The monostable multivibrator No. 1 pulse width TA is determined by the resistor RA between Pin 12 and A.GND. TA can be switched as follows by the setting of Pin 9: HIGH DENSITY = “H” TA LOW = 84RA + 180 (nS) RA (kΩ) HIGH DENSITY = “L” TA HIGH = 42RA + 110 (nS) The pulse width for monostable multivibrator No. 2 is fixed at 400 ns. (2) Write System Write data input through Pin 2 is frequency-divided by the T flip-flop and generates the head recording current. The recording current can be switched by the setting of Pin 9. The Write current Iw is set by the resistor RW connected between Pin 25 and VCC and between Pin 27 and VCC. IW = 11.6/RW (mA) RW (kΩ) Furthermore, the Write current compensation IWC is set by the resistor RWC connected between Pin 25 and Pin 26, and between Pin 27 and Pin 28. IWC = 10.8/RWC (mA) RWC (kΩ) (3) Erase System Pins 30 and 31 are open collector outputs; the Erase current is set by the resistance between these pins and the Erase head. (4) Power ON/OFF Detection System The power ON/OFF detection system detects a reduced voltage. When VCC is below the stipulated voltage, the Write system and Erase system cease operation, disabling the Write and Erase functions Notes on Operation • Select the voltage gain so that the pre-amplifier output amplitude is 1 Vp-p or less. If the pre-amplifier output amplitude exceeds 1 Vp-p, the filter output waveform becomes distorted. • Observe the following points when mounting this IC. • Connect a VCC decoupling capacitor of approximately 0.1 µF close to the IC. • The ground should be as large as possible. —15— CXA1720Q Application Circuit (for 1M/2M devices) PREAMP OUT HEAD HEAD HEAD HEAD 1B 1A 0A 0B 24 23 22 W/C 1SET RWC1 27 RE0 ERASE OUT 0 RE1 ERASE OUT 1 POWER SAVE 28 29 13 ERASE DRIVER 12 30 11 POWER MONITOR 31 CONTROL LOGIC 10 9 32 1 2 POWER ON WRITE DATA 3 FILTER OUT B CB 3300P CA 3300P COMP IN B 14 COMP IN A WRITE DRIVER COMP D.GND 15 TIME DOMAIN FILTER W/C 2 COMP 17 FILTER DIFF+LPF (BPF) RWC2 RW2 18 16 W/C 1COMP 26 W/C 2 SET FILTER OUT A VREF PREAMP 25 RW1 21 HIGH GAIN 20 19 CREF 0.1µ 4 5 READ WRITE WRITE DATA CURRENT GATE 6 ERASE GATE 7 SIDE 1 A.GND MMVA FILTER SET RA 27k RF 3.2k Vcc HIGH DENSITY 5V 8 FILTER CONTROL Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —16— CXA1720Q Customization Filter frequency response In 2M/inner track mode, the filter frequency response can be changed as shown below. B. P. F Q=0.577 (Differential characteristics) L. P. F Tertiary Butterworth L. P. F Tertiary Chebyshev 1dBRp (High-band noise cut-off) No. 3 No. 2 (Comprehensive characteristics) —17— CXA1720Q Filter Customization Selections/Combinations In filter settings, use the LPF cut-off frequency fC1 in 1M/outer track mode as 1.00 as shown in Table 1 to select fc ratios and LPF types for the other three modes. The 1M/outer track to 2M/outer track modes for the LPF are fixed to Butterworth, while either Butterworth or Chebyshev 1 dB ripple can be selected in 2M/inner track mode. Note that the BPF center frequency foB is fixed at 1.2 times the LPF cut-off frequency fc. In addition, the relationship between the peak frequencies fo and fc in regards to the comprehensive characteristics is as follows, depending on differences in LPFs. Butterworth characteristics: Chebyshev 1 dB ripple characteristics: fC = 1.28fo fC = 1.12fo Table 1 LPF fc Ratios and Types Mode fc ratio when fc1 is assumed as 1.00 LPF type 1M/outer track Butterworth 1.00 1M/inner track Butterworth 1.07 1.60 1.14 2.00 1.23 1.33 1.45 1.33 1.68 2.29 1.33 1.68 2.29 1.39 1.78 2.46 1.39 1.78 2.46 1.45 1.88 2.67 1.45 1.88 2.67 1.52 2.00 1.60 2.13 1.52 2.00 1.60 2.13 2M/outer track Butterworth 2M/inner track Butterworth Chebyshev (1 dB ripple) Note) The boxed item indicates the setting for the CXA1720Q. —18— Normalized pre-amplifier voltage gain and phase vs. Frequency Vcc=5V, Ta=25˚C When HD=high, low Phase 0 Voltage Gain 0 –2 30 –4 60 –6 90 –8 120 –10 150 10k 100k 1M 10M Phase (degree) Normalized pre-amplifier voltage gain (dB) CXA1720Q 100M f-Frequency (Hz) 10 200 0 150 –10 100 Voltage gain 50 Phase 0 –40 –50 –50 –60 –100 –150 –200 –70 10k 50k 100k 300k 1M 10 200 0 –10 150 100 –20 Voltage gain 50 –30 Phase –40 –50 –100 –150 –200 –70 50k 10 0 200 –10 100 150 Voltage gain Phase –40 –50 0 –50 –100 –150 –60 –70 10k 50 –200 50k 100k 300k 1M Normalized filter voltage gain (dB) VCC=5V, Ta=25˚C RF=3.2kΩ –20 –30 100k 300k 1M 3M f02=182 (KHz) Frequency (Hz) Phase (degree) Normalized filter voltage gain (dB) f01=170 (KHz) Frequency (Hz) 2M/outer track 0 –50 –60 10k 3M VCC=5V, Ta=25˚C RF=3.2kΩ 3M f03=320 (KHz) Frequency (Hz) 2M/inner track VCC=5V, Ta=25˚C RF=3.2kΩ 200 10 0 150 100 –10 Voltage gain 50 –20 –30 Phase –40 –50 –50 –100 –60 –70 –200 10k –150 50k 100k 300k 1M 3M f04=345 (KHz) Frequency (Hz) —19— 0 Phase (degree) –20 –30 1M/inner track Phase (degree) VCC=5V, Ta=25˚C RF=3.2kΩ Normalized filter voltage gain (dB) 1M/outer track Phase (degree) Normalized filter voltage gain (dB) Filter characteristics in the four modes (These characteristics are based on pre-amplifier output. 0dB=pre-amplifier output level) CXA1720Q NGV-Normalized pre-amplifier voltage gain +filter voltage gain Normalized pre-amplifier voltage gain+filter voltage gain vs. Ambient temperature 1.50 f=100KHz Vcc=5V Vin=10mVp-p (HG="H") Vin=5mVp-p (HG="L") NGV=GV/GV (Ta=25˚C) 11 1.00 3.2kΩ RF Vcc 0.50 –20 0 20 40 60 Ta-Ambient temperature (˚C) 80 NGV-Normalized pre-amplifier voltage gain +filter voltage gain Normalized pre-amplifier voltage gain+filter voltage gain vs. Supply voltage 1.50 Ta=25˚C f=100KHz Vin=10mVp-p (HG="H") Vin=5mVp-p (HG="L") NGV=GV/GV (Vcc=5V) 11 1.00 3.2kΩ RF Vcc 0.50 4.0 5.0 Vcc-Supply voltage (V) 6.0 Normalized monostable multivibrator No. 1 pulse width vs. Ambient temperature NTA-Normalized monostable multivibrator No. 1 pulse width 1.05 Vcc=5V NTA=TA/TA (Ta=25˚C) When HD=high, low 12 1.00 0.95 –20 RA 0 20 40 60 Ta-Ambient temperature (˚C) —20— 80 27kΩ CXA1720Q Normalized monostable multivibrator No. 1 pulse width vs. Supply voltage NTA-Normalized monostable multivibrator No. 1 pulse width 1.05 Ta=25˚C NTA=TA/TA (Ta=25˚C) When HD=high, low 12 1.00 27kΩ RA 0.95 TA-Monostable multivibrator No. 1 pulse width (µS) 4.0 5.0 Vcc-Supply voltage (V) 6.0 Monostable multivibrator No. 1 pulse width vs. RA 10 Vcc=5V Ta=25˚C 5 12 TA LOW RA 1 TA LOW=84RA+180 (ns) TA HIGH=42RA+110 (ns) RA (kΩ) TA HIGH 0.3 3 5 10 50 100 RA (kΩ) Normalized read data pulse width vs. Ambient temperature NTB-Normalized read data pulse width 1.05 Vcc=5V NTB=TB/TB (Ta=25˚C) 1.00 0.95 –20 0 20 40 60 Ta-Ambient temperature (˚C) —21— 80 CXA1720Q Normalized read data pulse width vs. Supply voltage NTB-Normalized read data pulse width 1.05 Ta=25˚C NTB=TB/TB (Vcc=5V) 1.00 0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0 Normalized write current vs. Ambient temperature NIW-Normalized write current 1.05 Vcc=5V NIW=IW/IW (Ta=25˚C) 25 26 27 RWC2 RWC1 1.00 RW1 12k 4.3k RW2 Vcc 0.95 –20 0 20 40 60 Ta-Ambient temperature (˚C) 28 12k 4.3k Vcc 80 Normalized write current vs. Supply voltage NIW-Normalized wriet current 1.05 Ta=25˚C NIW=IW/IW (Vcc=5V) 25 1.00 26 27 RW1 12k 4.3k Vcc 0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0 —22— 28 RWC2 RWC1 RW2 12k 4.3k Vcc CXA1720Q IW-Write current (mA) Write current vs. RW Vcc=5V Ta=25˚C IW=11.6/Rw (mA) Rw (kΩ) 10.0 25 27 5.0 RW2 RW1 Vcc Vcc 1.0 1K 10K 5K Rw (kΩ) NIWC-Normalized write compensation current Normalized write compensation current vs. Ambient temperature 1.05 Vcc=5V NIWC=IWC/IWC (Ta=25˚C) 25 26 27 1.00 RW1 12k 4.3k RW2 Vcc 0.95 –20 0 20 40 60 Ta-Ambient temperature (˚C) 28 RWC2 RWC1 12k 4.3k Vcc 80 NIWC-Normalized Wriet compensation current Normalized Write compensation current vs. Supply voltage 1.05 Ta=25˚C NIWC=IWC/IWC (Vcc=5V) 25 1.00 26 27 RWC1 RW1 Vcc 0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0 —23— 12k 4.3k 28 RWC2 RW2 Vcc 12k 4.3k CXA1720Q Write current compensation vs. Rwc IWC-Write current compensation (mA) 10.0 Vcc=5V Ta=25˚C IWC=10.8/Rwc (mA) Rwc (kΩ) 25 1.0 RW1 4.3k Vcc 0.1 VTH-Power supply ON/OFF detector threshold voltage (V) 26 27 RWC1 1.0 RW2 Power supply ON/OFF detector threshold voltage vs. Ambient temperature 4.2 ON threshold voltage 4.1 4.0 3.9 OFF threshold voltage 3.8 3.7 –20 0 20 40 60 Ta-Ambient temperature (˚C) 80 Normalized filter peak frequency vs. Ambient temperature Nf0-Normalized filter peak frequency 1.05 Vcc=5V Nf0=f0/f0 (Ta=25˚C) 11 1.00 RF 3.2k Vcc 0.95 4.0 5.0 6.0 Ta-Ambient temperature (˚C) —24— 4.3k Vcc 100.0 (kΩ) 10.0 Rwc (kΩ) 28 RWC2 CXA1720Q Normalized filter peak frequency vs. Supply voltage characteristics Nf0-Normalized filter peak frequency 1.05 Vcc=5V Nf0=f0/f0 (Ta=25˚C) 11 1.00 RF 3.2k Vcc 0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0 1f01-1M/outer track peak frequency (kHz) 1M/outer track peak frequency vs. RF 250 Vcc=5V Ta=25˚C 11 200 RF Vcc 150 F01=527/RF+5.8 (KHz) 2.0 3.0 4.0 RF (kΩ) —25— CXA1720Q Package Outline Unit : mm 32PIN QFP (PLASTIC) 9.0 ± 0.2 24 0.1 + 0.35 1.5 – 0.15 + 0.3 7.0 – 0.1 17 16 32 9 (8.0) 25 1 + 0.2 0.1 – 0.1 0.8 + 0.15 0.3 – 0.1 0.24 M + 0.1 0.127 – 0.05 0° to 10° PACKAGE MATERIAL EPOXY RESIN SONY CODE QFP-32P-L01 LEAD TREATMENT SOLDER PLATING EIAJ CODE QFP032-P-0707 LEAD MATERIAL 42 ALLOY PACKAGE MASS 0.2g JEDEC CODE —26— 0.50 8