SONY CXA2697ER

CXA2697ER
5-Channel 2-LD Driver for Optical Disc Drive
Description
The CXA2697ER is a laser driver IC corresponded
to DVD ×12 and capable of driving two high output
lasers (CD/DVD) for writable optical discs.
Features
• CD write channel maximum drive current: 300mA
(VCC = 3V, VCC_LD = 4.5V, VOP = 2.5V)
• CD total maximum drive current: 370mA
(VCC = 3.3V, VCC_LD = 5V, VOP = 2.5V)
• DVD write channel maximum drive current: 270mA
(VCC = 3V, VCC_LD = 4.5V, VOP = 3V)
• DVD total maximum drive current: 360mA
(VCC = 3.3V, VCC_LD = 5V, VOP = 3V)
• Capable of generating five-value recording
waveform through control of five channels
• Rise/Fall times = 1ns
• Read Channel: ×125
• Write Channel: ×470
• Read Channel has extensive low-noise design
1.5nA/√Hz (@20MHz, ILD = 35mA, Imod = 20mAp-p)
• High frequency modulator circuit
• Frequency variable range: 200 to 600MHz
• Modulator amplitude can be set separately for CD
and DVD.
• DVD modulator amplitude switching function
• Timing input for generating recording waveform
can be adapted to both differential input (LVDS)
and single-end input (3.3V CMOS/TTL).
Preliminary
32 pin VQFN (Plastic)
Absolute Maximum Ratings
• Supply voltage
VCC
3.6
VCC_LD
5.5
• Storage temperature
Tstg
–65 to +150
• Allowable power dissipation
TBD
PD
Operating Conditions
• Supply voltage
VCC
3 to 3.6
VCC_LD 4.5 to 5.5
• Operating temperature Topr
–10 to +75
V
V
°C
mW
V
V
°C
Applications
CD-R, CD-RW, DVD-R, DVD-RW, DVD+R/RW,
DVD-ROM and DVD-RAM for high-speed writable
optical disc drives
Structure
Bi-CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
PE03819-PS
CXA2697ER
GND2
LDEN1
LDEN2
OSCEN
OSCMOD
GND1
OUTEN2
xOUTEN2
Block Diagram and Pin Configuration
8
7
6
5
4
3
2
1
LDOUT1 9
RAMP2 10
32 OUTEN3
LDEN
OSC
CONT
DVD Side
IIN1, 2:
×125
IIN3, 4, 5:
×470
Iref
Iref
Iref
Iref
Iref
31 xOUTEN3
Vref
RAMP1 11
30 OUTEN4
OSC
RAMP11 12
29 xOUTEN4
VCC_LD 13
28 OUTEN5
R FREQ COMP 14
R FREQ2 15
27 xOUTEN5
CD Side
IIN1, 2:
×125
IIN3, 4, 5:
×470
26 OUTENREF
R FREQ1 16
VCC2
VCC1
IIN5
–2–
21
22
23
24
IIN1
20
IIN2
19
IIN3
18
IIN4
17
LDOUT2
25 VBG
CXA2697ER
Pin Description
Pin
No.
Symbol
I/O
Pin
voltage
Equivalent circuit
Description
1
xOUTEN2
I
—
IIN1 or IIN2 set current control signal
input.
2
OUTEN2
I
—
IIN1 or IIN2 set current control signal
input.
27
xOUTEN5
I
—
IIN5 set current control signal input.
(negative logic)
28
OUTEN5
I
—
1 29
IIN5 set current control signal input.
(positive logic)
500
2 30
29
xOUTEN4
I
—
27 31
2k
28 32
IIN4 set current control signal input.
(negative logic)
30
OUTEN4
I
—
IIN4 set current control signal input.
(positive logic)
31
xOUTEN3
I
—
IIN3 set current control signal input.
(negative logic)
32
OUTEN3
I
—
IIN3 set current control signal input.
(positive logic)
3
GND1
—
—
4
OSCMOD
I
Ground.
—
—
500
4
5
DVD modulator amplitude switching
control signal.
When OSCMOD = high, RAMP1 is
selected.
When OSCMOD = low, RAMP11 is
selected.
5
OSCEN
I
—
Modulator control signal. (positive logic)
When OSCEN = high, the modulator
waveform is output.
6
LDEN2
I
—
CD output control. (positive logic)
500
6
7
7
LDEN1
I
—
8
GND2
—
—
9
LDOUT1
O
—
200k
DVD output control. (positive logic)
—
Ground.
DVD laser drive current output.
Enabled when LDEN 1 = high and
LDEN2 = low.
9
–3–
CXA2697ER
Pin
No.
10
Symbol
RAMP2
I/O
O
Pin
voltage
Equivalent circuit
Modulator amplitude setting 2.
Enabled when LDEN1 = low and
LDEN2 = high.
Connects resistance to ground.
—
300
10
11
RAMP1
O
—
RAMP11
O
—
13
VCC_LD
—
—
14
R FREQ
COMP
4p
—
Modulator amplitude setting 1.
Enabled when LDEN1 = high,
LDEN2 = low and OSCMOD = high.
Connects resistance to ground.
Modulator amplitude setting 11.
Enabled when LDEN1 = high,
LDEN2 = low and OSCMOD = low.
Connects resistance to ground.
—
300
O
300
11
12
12
Description
Output stage supply voltage.
300
14
Modulator frequency variation adjustment.
Connects resistance to ground.
4p
15
R FREQ2
O
—
300
300
15
16
Modulator frequency setting 2.
Enabled when LDEN1 = low and
LDEN2 = high.
Connects resistance to ground.
Modulator frequency setting 1.
Enabled when LDEN1 = high and
LDEN2 = low.
Connects resistance to ground.
4p
16
R FREQ1
O
—
17
LDOUT2
O
—
18
VCC2
I
—
—
Supply voltage for timing system and
current switch.
19
VCC1
I
—
—
Supply voltage for control system and
modulator system.
20
IIN5
I
—
21
IIN4
I
—
17
Current setting 5.
20
IIN3
I
500
Current setting 4.
21
22
22
CD laser drive current output.
Enabled when LDEN1 = low and
LDEN2 = high.
1k
—
Current setting 3.
–4–
CXA2697ER
Pin
No.
23
Symbol
IIN2
I/O
Pin
voltage
I
—
Equivalent circuit
Description
Current setting 2.
100
23
24
24
IIN1
I
700
—
Current setting 1.
1k
25
VBG
O
1.26V
25
300
Internal reference voltage decoupling.
1k
300
26
OUTENREF
O
1/2VCC
26
500
300
–5–
Reference voltage output for current
control signal.
Connects decoupling capacitance to
ground.
CXA2697ER
(VCC = 3.3V, VCC_LD = 5V, Ta = 25°C)
Electrical Characteristics
Test
No.
Measurement item
Symbol
Min. Typ. Max.
Unit
Conditions
1
Current consumption 1
Icc1
1.4
2
2.6
mA
LDEN1, 2 = L
2
Current consumption 1'
Icc1'
23
34
45
mA
(LDEN1 = H, LDEN2 = L) or
(LDEN1 = L, LDEN2 = H)
3
Current consumption 2
Icc2
75
110 145
mA
LDEN1 = H, IOUT1 = 60mA,
OSCEN = H, AMP = 20mAp-p
mA
LDEN = H, IOUT1 = 60mA,
IOUT3 = 240mA (Duty = 25%),
IOUT4 = 120mA (Duty = 50%),
IOUT = IOUT1 + IOUT3 +
IOUT4
mA
LDEN = H, IOUT1 = 30mA,
IOUT3 = 240mA (Duty = 25%),
IOUT4 = 120mA (Duty = 50%),
IOUT = IOUT1 + IOUT3 +
IOUT4
4
5
Current consumption 3
Current consumption 3-1
Icc3
162 236 310
Icc3_1
140 200 260
<Logic input block: During single-end transfer>
6
Input voltage high level
VSH
7
Input voltage low level
VSL
—
VCC
V
GND —
1.3
V
2
<Logic input block: During differential input>
8
LVDS Input voltage high level
VDH
0.2
—
2.6
V
9
LVDS Input voltage low level
VDL
0
—
1.6
V
10
LVDS Input voltage amplitude
VPP
0.2
—
1
V
<LD driver block: DC>
11
LD drive current 1, 2
IOUTR
120
—
—
mA
12
LD drive current 3, 4, 5 (DVD)
IOUTW1 270
—
—
mA
13
LD drive current 3, 4, 5 (CD)
IOUTW2 300
—
—
mA
14
Total LD drive current 1 (DVD)
IOUT1
360
—
—
mA
VCC = 3.3V, VCC_LD = 5V,
VOP = 3V
15
Total LD drive current 2 (CD)
IOUT2
370
—
—
mA
VCC = 3.3V, VCC_LD = 5V,
VOP = 2.5V
16
Minimum LD drive current 1
(DVD)
mA
IIN = 0µA,
LDEN1 = OUTEN2 =
OUTEN3 = OUTEN4 =
OUTEN5 = H
17
Minimum LD drive current 2
(CD)
OFFSET2
—
—
5
mA
IIN = 0µA,
LDEN2 = OUTEN2 =
OUTEN3 = OUTEN4 =
OUTEN5 = H
18
Output current noise 1
NOISE1
—
1.5
—
f = 400MHz, ILD = 35mA,
nA/√Hz Imod = 20mAp-p
(20MHz: NOISE)
19
Output current noise 2
NOISE2
—
1.5
—
f = 400MHz, ILD = 35mA,
nA/√Hz Imod = 40mAp-p
(20MHz: NOISE)
OFFSET1
—
–6–
—
5
CXA2697ER
Test
No.
Measurement item
Symbol
Min. Typ. Max.
Unit
Conditions
<LD driver block: Pulse driving>
20
Propagation delay
DELAY
—
3
—
ns
21
Rise time (Tr)
TR
—
1
—
ns
ILD = 50 to 100mA pulse
Settling 10 to 90%
(resistance load)
22
Fall time (Tf)
TF
—
1
—
ns
ILD = 100 to 50mA pulse
Settling 10 to 90%
(resistance load)
<ILD control block>
23
Input resistance 1 (Pins 23, 24)
ZIINR
0.56 0.8 1.04
kΩ
24
Input resistance 2 (Pins 20, 21, 22)
ZIINW
1.05 1.5 1.95
kΩ
25
Input/output gain 1, 2
GAINR
110 125
140
—
26
Input/output gain 3, 4, 5 (DVD)
GAINW1 400 470
510
—
27
Input/output gain 3, 4, 5 (CD)
GAINW2 400 470
510
—
28
ILD control linearity 1 (DVD)
LINEA1
–3
—
3
%
Based on linearity when
ILD = 50 to 150mA
(IREAD = 30mA)
VCC_LD = 4.5V, VCC = 3V,
V1 = 1.65V, RL = 5Ω,
ILD = 270mA
–3
—
3
%
Based on linearity when
ILD = 50 to 150mA
(IREAD = 30mA)
VCC_LD = 4.5V, VCC = 3V,
V2 = 1V, RL = 5Ω,
ILD = 300mA
Input/output R gain relative
precision 1
–5
—
5
%
IIN1 = IIN2 = 250µA
IIN2 output current precision
based on IIN1 output current
31
Input/output R gain relative
precision 2
–5
—
5
%
IIN1 = IIN2 = 500µA
IIN2 output current precision
based on IIN1 output current
32
Input/output R gain relative
precision 3
–5
—
5
%
IIN1 = IIN2 = 750µA
IIN2 output current precision
based on IIN1 output current
33
Input/output W gain relative
precision
GACCU
–5
—
5
%
34
Input/output transmission band
FBAND
7
—
—
MHz
29
ILD control linearity 2 (CD)
30
LINEA2
–7–
Frequency for input/output
gain of –3dB
CXA2697ER
Test
No.
Measurement item
Symbol
Min. Typ. Max.
Unit
Condition
200
—
600
MHz
—
—
100 mAp-p
fmod = 400MHz
–10
—
11
%
fmod = 400MHz
<High frequency modulator>
35
Frequency variable range
VARIF
36
Amplitude variable range
VARIAMP
37
Frequency variation
FREQ
38
Frequency temperature
characteristic
TFREQ
—
TBD
—
%
fmod = 400MHz
39
Amplitude variation
AMP
—
31
—
mAp-p
fmod = 300MHz
40
Amplitude temperature
characteristic
TAMP
—
TBD
—
%
fmod = 400MHz
41
OSCEN response time (ON)
OSCRES1
—
5
—
ns
fmod = 300MHz, RAMP = 10kΩ
42
OSCEN response time (OFF)
OSCRES2
—
5
—
ns
<LDEN control>
43
LDEN response time 1 (ON)
RLDRES1
—
—
1
µs
Time to reach 90% of Read
set current (same condition
as current consumption 3)
44
LDEN response time 1 (OFF)
RLDRES2
—
—
10
ns
Time to reach 10% of Read
set current (same condition
as current consumption 3)
45
LDEN response time 2 (ON)
WLDRES1
—
—
1
µs
Time to reach 90% of Write
set current (same condition
as current consumption 4)
46
LDEN response time 2 (OFF)
WLDRES2
—
—
10
ns
Time to reach 10% of Write
set current (same condition
as current consumption 4)
–8–
CXA2697ER
Electrical Characteristics Measurement Circuit
VCC
VCC_LD
100
22µ
2
GND
32
OUTEN3
100
10k
10 RAMP2
xOUTEN3 31
11 RAMP1
OUTEN4 30
10k
100
20k
1µ
12 RAMP11
xOUTEN4 29
13 VCC_LD
OUTEN5 28
100
22k
xOUTEN5 27
14 R FREQ COMP
1µ
11k
OUTENREF 26
15 R FREQ2
11k
1µ
R FREQ1
VCC2
VCC1
IIN5
IIN4
IIN3
IIN2
IIN1
VBG 25
LDOUT2
16
17
18
19
20
21
22
23
24
5
V2
1µ
1µ
–9–
22µ
1µ
1
xOUTEN2
GND1
3
OUTEN2
9 LDOUT1
4
OSCMOD
5
OSCEN
6
LDEN2
5
7
LDEN1
V1
GND2
8
1µ
GND
CXA2697ER
Description of Operation
(1) LD Drive Current Value Setting
The current controlled by the current setting pins IIN1, IIN2, IIN3, IIN4 and IIN5 is output from the LDOUT1
and LDOUT2 pins. IIN1, IIN2, IIN3, IIN4 and IIN5 can be set respectively by OUTEN and xOUTEN for the
output drive current from the LDOUT pin.
(2) Differential Input and Single-end Input
External processing is required for the differential input and single-end input switching.
For the single-end input, if the device is used at the active Low, the OUTENREF pin and the OUTEN pin
should be shorted externally; if it is used at the active High, the OUTENREF pin and the xOUTEN pin should
be shorted externally. Leave the OUTENREF pin open for the differential input.
(3) Modulator Circuit
The modulator ON/OFF is controlled by the OSCEN pin.
For the DVD side, the modulator frequency is varied by the external resistance connected to the RFREQ1 pin
and the modulator amplitude can be varied by the external resistance connected to the RAMP1 pin when the
OSCMOD is high, and the RAMP11 pin when it is low.
For the CD side, the modulator frequency is varied by the external resistance connected to the RFREQ2 pin
and the modulator amplitude can be varied by the external resistance connected to the RAMP2 pin.
(4) R FREQ COMP Pin
The current depending on the internal resistance is generated using the R FREQ COMP pin external resistance
to suppress the dispersion of the modulator frequency depending on the internal resistance.
The R FREQ COMP pin external resistance is recommended to be fixed to 22kΩ.
(5) Modulator Level Adjustment
The modulator level adjustment can be performed by varying the IIN1 input current value.
Modulator amplitude
Modulator level adjustment
0
Imod
Modulator level [Ap-p]
Iread – Output drive current [A]
Imod – Modulator amplitude [Ap-p]
Modulator OFF
Iread
RAMP resistance [Ω]
IIN1 – Input current [A]
IIN1 input current [A]
1/2Imod
Iread = IIN1 × 125
Imod ≈
RAMP pin voltage (1.26V)
RAMP external resistance
– 10 –
× 200
Iread < 1/2Imod
Iread >1/2Imod
CXA2697ER
Description of Functions
1. Logic Table
Output control
IN1/IN2
IN3
IN4
IN5
LDEN1 LDEN2 xOUTEN2 xOUTEN3 xOUTEN4 xOUTEN5 OSCEN OSCMOD
LDOUT1 (DVD)
LDOUT2 (CD)
L
L
X
X
X
X
X
X
OFF
OFF
H
L
H
H
H
H
L
L
IIN1 × 125
OFF
H
L
L
H
H
H
L
L
IIN2 × 125
OFF
H
L
H
L
H
H
L
L
IIN1 × 125 + IIN3 × 470 OFF
H
L
H
H
L
H
L
L
IIN1 × 125 + IIN4 × 470 OFF
H
L
H
H
H
L
L
L
IIN1 × 125 + IIN5 × 470 OFF
H
L
H
L
L
L
L
L
IIN1 × 125 + (IIN3 +
IIN4 + IIN5) × 470
OFF
L
H
H
H
H
H
L
L
OFF
IIN1 × 125
L
H
L
H
H
H
L
L
OFF
IIN2 × 125
L
H
H
L
H
H
L
L
OFF
IIN1 × 125 + IIN3 × 470
L
H
H
H
L
H
L
L
OFF
IIN1 × 125 + IIN4 × 470
L
H
H
H
H
L
L
L
OFF
IIN1 × 125 + IIN5 × 470
L
H
H
L
L
L
L
L
OFF
IIN1 × 125 + (IIN3 +
IIN4 + IIN5) × 470
H
H
X
X
X
X
X
X
OFF (INHIBIT)
OFF (INHIBIT)
Module control
LDEN1 LDEN2 xOUTEN2 xOUTEN3 xOUTEN4 xOUTEN5 OSCEN OSCMOD
LDOUT1
LDOUT2
L
L
X
X
X
X
X
X
OFF
OFF
H
L
X
X
X
X
L
H
MODOFF
OFF
H
L
X
X
X
X
H
H
MODON
OFF
(R FREQ1, RAMP1)
H
L
X
X
X
X
H
L
MODON
(R FREQ1, RAMP11)
OFF
L
H
X
X
X
X
L
X
OFF
MODOFF
L
H
X
X
X
X
H
X
OFF
MODON
(R FREQ2, RAMP2)
H
H
X
X
X
X
X
X
OFF (INHIBIT)
OFF (INHIBIT)
Note: Module control does not depend on a data timing signals.
– 11 –
CXA2697ER
2. Timing Chart
IIN4 × 470
LDOUT1
IIN3 × 470
IIN1 × 125
0mA
LDEN1
LDEN2
OSCEN
OSCMOD
xOUTEN2
xOUTEN3
xOUTEN4
xOUTEN5
H: Imod large
LDOUT1
H: Imod small
IIN3 × 470
IIN1 × 125
0mA
LDEN1
LDEN2
OSCEN
H: RAMP1 (ex: Imod large)
L: RAMP11 (ex: Imod small)
OSCMOD
xOUTEN2
xOUTEN3
xOUTEN4
xOUTEN5
– 12 –
CXA2697ER
Pp5
Pp4
Pp3
LDOUT1
Pp5: IIN5
Pp4: IIN4
Pp3: IIN3
IIN2 × 125
LDEN1
LDEN2
OSCEN
OSCMOD
xOUTEN2
xOUTEN3
xOUTEN4
xOUTEN5
– 13 –
× 470
IIN1 × 125
0mA
CXA2697ER
Notes on Operation
• Arrange the external resistance connected to the IIN1, IIN2, IIN3, IIN4 and IIN5 pins near the IC package to
reduce the influence from other signal lines.
• Wiring between the output LDOUT pin and the laser diode, and wiring between the Vcc_LD pin and external
decoupling capacitance should be the shortest. Making the distance for wiring long increases output
waveform overshoots and undershoots caused by the influence of wiring inductance.
• The Vcc_LD pin's external decoupling capacitance ground can be grounded to the GND grounding the load
from the LDOUT pin. This reverses the phase of the drive waveform at the LDOUT and Vcc_LD and moves in
the direction that suppresses overshoots and undershoots.
• Temperature guarantee
Thermal resistance (θj-a) when the CXA2697ER is mounted on PWB varies according to the set (PWB) and
because it is difficult to predict along with the tendency for higher power for power consumption (Po), the
following points should be considered when using.
Use in a range that does not exceed a junction temperature of 150°C. Also, power consumption (PO) should
be below allowable power dissipation (PD). Use with the thermal resistance (θj-a) of the PWB mounting
lowered so that it can be operated normally at a maximum operating temperature of 75°C. To lower θj-a,
radiating measures on the set, such as widening the GND region with the set PWB are needed. Also, the diepad on the CXA2697ER 32-pin VQFN package is exposed on the surface, so thermal transmission from the
IC surface is excellent. For that reason, it is possible to release heat to the set chassis thereby lowering the
thermal resistance of the PWB mount.
Find the thermal resistance (θj-a) when mounted on PWB and power consumption (PO) using the following
method.
Po = (Icc × Vcc) – (Iop × Vop)
Icc: IC current consumption when operating (Including Iop)
Iop: Output drive current flowed from the LDOUT pin to the Laser Diode
Vop: Operating voltage of the laser diode
θ j-a) when mounted on PWB
Thermal resistance (θ
Diode temperature coefficient XXmV/°C and the positive protection diode temperature characteristics are used
to find this.
The V2 voltage found in (2) below cancels the voltage decrease caused by the wiring resistance between the
positive protection diode connection Vcc and the Vcc pins as reference and is measured to find the precise
temperature characteristics of the positive protection diode.
(1) V1 to LDEN pin voltage to Vcc pin voltage, Icc1 to current consumption when 0V is applied to the IIN1,
IIN2, IIN3, IIN4 and IIN5 pins.
(2) V2 to LDEN pin voltage to Vcc pin voltage immediately after applying the arbitrary voltage to the IINx
pin.
(3) V3 to LDEN pin voltage to Vcc pin voltage, Icc3 to current consumption when applying the arbitrary
voltage to the IINx pin and heat reaches equilibrium.
∆Tj using the voltage drop (V1 to V2) between the positive protection diode connection Vcc and the Vcc pins
that are the reference, as described above are:
∆Tj = ((V3 + (V1 – V2)) – V1)/XXmV/°C
Pin voltage measurement
point
VCC
Thermal resistance (θj-a) is:
θj-a = ∆Tj/(Icc3 – Icc1) × Vcc – Iop × Vop
1MΩ
6
• Allowable power dissipation (PD) ≥ PO [W]
LDEN
6.6V
3.3V
PD = (150°C – Ambient temperature)/θj-a
VCC
• Maximum operating temperature 75°C
18
3.3V
3.3V
(150°C – ∆Tj) ≥ 75°C
– 14 –
GND
CXA2697ER
Example of Representative Characteristics
IIN1, IIN2 input current vs.
CD/DVD output current characteristics
IIN3, IIN4, IIN5 input current vs.
CD/DVD output current characteristics
Vcc_LD = 5V, Vcc = 3.3V, resistance load
180
400
160
350
CD/DVD output current [mA]
CD/DVD output current [mA]
Vcc_LD = 5V, Vcc = 3.3V, resistance load
140
120
100
80
60
40
300
250
200
150
100
50
20
0
0
0
200
400
600
800
0
1000 1200 1400
IIN1, IIN2 input current [µA]
IIN3, IIN4, IIN5 input current [µA]
Modulator frequency control characteristics
RAMP resistance value vs.
Modulator waveform peak current characteristics
Imod = 40mAp-p (RAMP = 5kΩ)
R FREQ COMP = 22kΩ
fmod = 400MHz (R FREQ = 7kΩ)
R FREQ COMP = 22kΩ
800
80
700
70
Modulator amplitude [mAp-p]
Modulator frequency [MHz]
100 200 300 400 500 600 700 800 900
600
500
400
300
200
60
50
40
30
20
10
100
0
0
0
5
10
15
20
25
R FREQ resistance [kΩ]
0
5
10
15
RAMP resistance [kΩ]
– 15 –
20
25
CXA2697ER
Application Circuit 1
Mode Control Logic
CMOS 3.3/TTL
5
4
3
2
LDEN2
OSCEN
OSCMOD
GND1
OUTEN2
9 LDOUT1
1
32
OUTEN3
100
10k
10 RAMP2
xOUTEN3 31
11 RAMP1
OUTEN4 30
10k
100
Timing Control Logic LVDS
6
xOUTEN2
7
LDEN1
LD1
8
GND2
100
20k
1µ
12 RAMP11
xOUTEN4 29
13 VCC_LD
OUTEN5 28
100
22k
xOUTEN5 27
14 R FREQ COMP
1µ
11k
OUTENREF 26
15 R FREQ2
11k
1µ
R FREQ1
VCC2
VCC1
IIN5
IIN4
IIN3
IIN2
IIN1
VBG 25
LDOUT2
16
17
18
19
20
21
22
23
24
LD2
1µ
1µ
Voltage DAC
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
– 16 –
CXA2697ER
Application Circuit 2
5
4
3
2
LDEN2
OSCEN
OSCMOD
GND1
OUTEN2
9 LDOUT1
1
Timing Control Logic CMOS 3.3/TTL
6
xOUTEN2
7
LDEN1
LD1
8
GND2
Mode Control Logic
CMOS 3.3/TTL
32
OUTEN3
10k
10 RAMP2
xOUTEN3 31
11 RAMP1
OUTEN4 30
12 RAMP11
xOUTEN4 29
13 VCC_LD
OUTEN5 28
10k
20k
1µ
22k
xOUTEN5 27
14 R FREQ COMP
1µ
11k
OUTENREF 26
15 R FREQ2
11k
1µ
R FREQ1
VCC2
VCC1
IIN5
IIN4
IIN3
IIN2
IIN1
VBG 25
LDOUT2
16
17
18
19
20
21
22
23
24
LD2
1µ
1µ
Voltage DAC
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
– 17 –
CXA2697ER
Package Outline
Unit: mm
32PIN VQFN (PLASTIC)
4.8
0.8 ± 0.1
4.4
2.3
C
24
0.5
0.05 S
0.675
0.1
1.4
17
16
25
A
B
92
5.
32
45˚
9
(0
.1
0.
x4
(0
S
9)
.3
0.4
C
8
1
7)
6
PIN 1 INDEX
0.1 S A-B C
x4
0.03 ± 0.03
0.05 M S A-B C
0.13 ± 0.025
+ 0.09
0.14 – 0.03
Solder Plating
NOTE:1)The dimensions of the terminal section apply to the
ranges of 0.1mm and 0.25mm from the end of a terminal.
0.155 ± 0.02
0.125 ± 0.01
0.1 S A-B C
TERMINAL SECTION
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
LEAD TREATMENT
SOLDER PLATING
EIAJ CODE
LEAD MATERIAL
COPPER ALLOY
JEDEC CODE
PACKAGE MASS
0.04g
SONY CODE
VQFN-32P-07
– 18 –
Sony Corporation