CXA3018R Demodulator for Satellite Receivers Description The CXA3018R is an IC designed for video signal demodulation for satellite broadcasting. This IC has most of the functions needed for demodulation, and provides stable video detection in combination with the CXA3008N. Features • PLL demodulation characteristics through built-in IF AGC • Compatible with both NTSC and PAL • Applicable for 8 systems worldwide • Keyed AFT input pin to support MUSE reception • Output pin for 1st AGC control • Built-in video clamp circuit • C/N detection circuit • Single 5 V power supply operation 48 pin LQFP (Plastic) Absolute Maximum Ratings (Ta = 25 °C) • Supply voltage VCC –0.3 to 7.0 • Operating temperature Topr –35 to +85 • Storage temperature Tstg –55 to +150 Operating Supply Voltage VCC 4.50 to 5.50 V °C °C V Applications NTSC/PAL system satellite receivers, etc. Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E95719-TE VREG 48 VCC2 47 OFFSETADJ 46 VAMPIN 45 BUFOUT 44 12 11 10 9 8 7 6 5 SYNC 4 CNDET CLAMP2 3 AFT DEEM/VAMP 25 2 REG CLAMP1 26 1 BUF LOGIC DCAMP VCO 27 AFT DOWN BUFIN 43 SWAMP OFF SET 28 AFT UP MIX 29 ANA2 30 ANA1 DETOUT 42 AGC DET 31 2ndAGCCONT KEYED IN GCONT 41 AGCAMP 2AGC 1AGC OPAmpIN P 32 AGC LPF SH2 GND1 40 OPAmpIN N 33 LPF P SH1 IF2 39 OPAmpOUT 34 LPF N CNIN IF1 38 MTRX AGC 36 SWC IN CNCONT VCC1 37 35 MTRX AGC RF VCC 2nd IFAGC RF GND SWB IN CNLPF VIDEO VCC SWA IN OSC GND CNOUT —2— BGR C VIDEO GND Block Diagram 13 CLAMP OUT 14 SYNC IN 15 VIDEO IN 16 VAMP OUT 17 GND2 18 VCODR2 19 VCODR1 20 GND3 21 OSCB1 22 OSCE1 23 OSCE2 24 OSCB2 CXA3018R CXA3018R Pin Description Pin No. Symbol 1 AFT UP Typical pin voltage DC AC Equivalent circuit Description VCC2 2 3 AFT DOWN ANA2 30k 4.9 V or 0.1 V 1 2 AFT block digital output pins. 30k GND2 VCC2 1.3 V to 3.2 V 2k 200 75k 4 4 ANA1 3 200 2.5V 3.1 V AFT block filter pin. Connect to Pin 4 with a 47 kΩ resistor and to GND with a 10 µF capacitor. AFT block reference output pin. GND2 VCC2 5 KEYED-IN 150 0.3V AFT block keyed input pin. 4k 5 30k GND2 6 7 SH2 SH1 VCC2 3.0 V to 3.5 V 2k 2k 6 AFT block sample-and-hold signal output pins. Connect to GND with a 0.1 µF capacitor. 200 7 3.0 V to 3.5 V GND2 VCC2 12k 8 CNIN 2.1V –50 to –20 dBm 12k 150 20k C/N detection block signal input pin. 2.2V 8 2k 20k GND2 VCC2 9 CNCONT 1.6 V to 4.4 V 3V 9 150 20k 8k C/N detection block gain adjustment pin. 5.7k 8k GND2 —3— CXA3018R Pin No. Symbol Typical pin voltage DC AC Equivalent circuit Description VCC2 8k 8k C/N detection block filter pin. Connect to GND with a 0.01 µF capacitor. 200 10 CNLPF 10 2.9 V 200 GND2 VCC2 100 11 CNOUT 1.2 V to 3.7 V C/N detection block output pin. Connect to GND with a 1nF capacitor. 60k 11 4k GND2 VCC2 C/N detection block reference output pin. Connect to GND with a 1 µF capacitor. 100 12 BGR-C 12 0.9 V 40k 1.3k 4k GND2 13 14 CLAMP OUT SYNC IN 2.0 V VCC2 1.0 Vp-p Clamp block video output pin. 5k 15 1.4 V 13 150 Clamp block sync input pin. 14 15 VIDEO IN 2.0 V 1.0 Vp-p GND2 Clamp block video input pin. VCC2 20k 12k 16 VAMP OUT 2.0 V 1.0 Vp-p Video amplifier block video output pin. 16 46k 2k 2k GND2 17 GND2 0V GND pin. VCC1 18 19 VCODR2 VCODR1 50 2.0 V to 3.0 V 50 18 PLL detection output pins. 19 10k 10k GND1 —4— CXA3018R Pin No. 20 Symbol GND3 Typical pin voltage DC AC 0V 21 VCOB1 1.4 V 22 VCOE1 0.7 V Equivalent circuit GND pin. VCC1 24 21 23 23 VCOE2 Description 3k 0.7 V VCO constant setting pins. 22 20k 3k 250 250 24 VCOB2 25 SW A-IN GND3 1.4 V VCC1 25 40k 26 SW B-IN — Switching amplifier and video amplifier mode setting pins. 2.5V 26 40k 27 50k 50k 27 SW C-IN 28 LPF-N GND1 VCC1 260 28 4.5 V 29 260 Mixer constant setting pins. 29 LPF-P GND1 VCC1 30 30 AGC-LPF 150 2.9 V to 3.0 V AGC detection block filter pin. Connect to GND with a 0.01 µF capacitor. 30k GND1 VCC1 31 2ndAGC CONT 1.0 V to 3.0 V 150 31 AGC detection block gain adjustment pin. 45k GND1 32 VCC1 OPAmp IN-P 100 100 150 — 33 150 32 OPAmp IN-N 33 GND1 —5— AGC detection block 1st AGC input pins. CXA3018R Pin No. Symbol Typical pin voltage DC AC Equivalent circuit Description 100 34 OPAmp OUT 0.3 V or 3.5 V AGC detection block 1st AGC digital output pin. 34 5k GND1 35 2nd IF AGC 36 MTRXAGC 37 VCC1 38 IF1 2.0 V to 3.0 V 2.0 V to 3.5 V 5V VCC1 100 AGC detection block 2nd AGC analog output pin. 35 10k 36 GND1 AGC detection block MTRX-AGC analog output pin. Positive power supply pin. 10p 5k 2.3V 38 39 400 10p 39 40k 5k AGC block IF input pins. IF2 GND1 40 GND1 0V GND pin. VCC2 41 GCONT 2.0 V to 4.0 V 150 41 12k 3k 2.7V Switching amplifier block gain adjustment pin. GND2 VCC2 200 42 DETOUT 2.45 V 200 mVp-p Switching amplifier block video output pin. 42 43 GND2 43 100 BUFIN 2.0 V 44 200 mVp-p 200 VCC2 BUFF video input pin. 150 44 43 BUFOUT BUFF video output pin. 10k GND2 —6— CXA3018R Pin No. Symbol Typical pin voltage DC AC Equivalent circuit Description VCC2 45 VAMPIN 2.5 V 100 mVp-p Video amplifier block video input pin. 45 GND2 VCC2 46 OFFSET ADJ 2.0 V to 4.0 V 46 150 AFT block offset adjustment pin. GND2 47 VCC2 5V Positive power supply pin. VCC2 48 VREG 4.1 V 48 GND2 —7— Reference voltage output pin. Connect to GND with a 10 µF capacitor. CXA3018R Electrical Characteristics DC Characteristics (Ta = 25 °C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Item 1 Current consumption 2 AGC-1 High output voltage 3 AGC-1 Low output voltage 4 AGC-2 High output voltage 5 AGC-2 Low output voltage 6 7 8 9 10 AGC-MTRX High output voltage AGC-MTRX Low output voltage VCODR1/2 output voltage VCODR1/2 driver current capacitance VREG output voltage AC Characteristics (AGC) Pin Symbol Condition 37, 47 ICC 34 VAGC1H Pin 31=3.0V 34 VAGC1L Pin 32=2.5V Vin=–10dBm, 35 VAGC2H Pin 31=3.0V Vin=–60dBm, 35 VAGC2L Pin 31=3.0V Vin=–10dBm, 36 VMTRH Pin 31=3V, Pin 32=2.5V Vin=–60dBm, 36 VMTRL Pin 31=3V, Pin 32=2.5V 18, 19 VVCD 400MHz input Load resistance 18, 19 IVCD RL = 1 kΩ 48 VREG Min. 70 3.0 0.1 Typ. 100 3.5 0.3 Max. 130 3.7 1.0 2.5 2.9 3.3 1.5 Unit mA 2.6 V 3.0 3.5 3.7 1.5 2.3 2.7 2.0 2.5 3.0 2.0 2.5 — mA 3.9 4.15 4.4 V (Ta = 25 °C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Item 11 IF input frequency Pin Symbol 38, 39 fin 12 IF input level 38, 39 1st AGC change point 13 (input level) 14 1st AGC control sensitivity Vin 34 AGC1 34 ∆AGC1 15 1st AGC adjustment sensitivity 34 AGC1/V 16 2nd AGC control sensitivity 2nd AGC adjustment 17 sensitivity 18 AGC-MTRX control sensitivity 35 ∆AGC2 35 AGC2/V 36 ∆MTRX Condition One amplitude at balance input Pin 31=2.5V, Pin 32=2.5V Slope of variation Variation of change point / Pin 32 DC variation Slope of variation Variation of change point / Pin 31 DC variation Slope of variation —8— Min. — Typ. 400 –60 Max. — Unit MHz –10 dBm –40 — 0.8 — V/dB — 42 — dB/V –24 –18 –12 mV/dB 3 11 18 dB/V — 0.3 — V/dB CXA3018R AC Characteristics (PLL) (Ta = 25 °C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Item 21 VCO conversion sensitivity 22 VCO oscillator frequency Pin 23 PLL capture range Condition ∗1 ∗1 Min. 32 — Sum of the positive / — negative ∗1 VOUT Dev.=17MHzpp 0.60 VdB VOUT=0dB, p41=±0.5V –3.0 Output level / Pin 41 DC ∆VOUT 5 variation CAP 24 DETOUT level 25 DETOUT level variable range 42 42 26 GCONT adjustment sensitivity 42 DETOUT frequency response (8 MHz) 42 27 Symbol ß fosc VOUTf 8MHz/1MHz –1.0 Typ. 37 400 40 0.68 Max. Unit 42 MHz/V — MHz — — 0.76 2.5 Vp-p dB 7 9 dB/V 0.0 1.0 dB ∗1 Varies according to external constant (coil, varicap). This characteristic is for NTSC. Also, operates with 480 MHz for PAL. AC Characteristics (Video) (Ta = 25 °C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Item 31 CLAMP OUT output level CLAMPOUT frequency 32 response IF → clamp output frequency 33 response (5 MHz) 34 IF → clamp output DG 35 IF → clamp output DP 36 fsc beat suppression 37 Dispersal elimination ratio CLAMPOUT residual 38 dispersal distortion 39 IF → clamp output S/N Pin 13 13 Symbol Condition VCO Dev.=17MHzpp VAMPIN input VCOf 5MHz / 1MHz 13 VCOfA IF input 5MHz/1MHz 13 13 13 13 DGA DPA IMA DISP1 13 DISP2 IF input 13 CSN IF input IF input IF input IF input IF input ∗1 Varies according to external constant (coil, varicap). —9— Min. — Typ. 1.0 Max. — –1.6 0.0 1.6 Unit Vp-p dB ∗1 ∗1 –2.5 0.0 2.5 0 –4 40 40 1.8 0 45 45 5 4 — — — 0.5 1.0 55 64 — % deg dB IRE dB CXA3018R AC Characteristics (AFT/CN) (Ta = 25 °C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) ∗1: Input voltage VCNIN enable to adjust output voltage VCNO = 2 V 41 42 43 44 45 46 Item AFT f0 adjustment range AFToffset adjustment sensitivity AFTdead zone width AFTUP/AFTDOWN Low AFTUP/AFTDOWN High CN detection level Pin Symbol Condition fAFT Offset from 2nd IF f0 variation / Pin 46 DC fAFT/V variation fAFT/D 1, 2 AFTL 1, 2 AFTH 11 VCNO –40dB input (Pin 9=3V) –40dB input 11, 9 VCNOW (Pin 9=2 to 4V) Variation from VCNO CNOUT voltage / CNIN 11, 8 ∆VCN input level (–50 to –30dBm) Input level variation / Pin 9 DC variation 11, 8 VCN/Vc In case of adjusting output voltage VCNO=2 V 47 CN adjustment range 48 CN sensitivity 49 CN adjustment sensitivity Min. –5 –18 Typ. — –9 Max. Unit +5 MHz –3 MHz/V 90 0 4.7 1.6 180 0.1 4.9 2.0 360 0.4 VCC 2.4 kHz V V V –0.15 — 0.25 V –60 –50 –40 mV/dB –10 –7.5 –5 dB/V SWAMP Control Table Gain control applicable to satellite receivers Pin 25 Pin 26 Pin 27 Format Satellite SWA SWB SWC 1 2 3 4 5 6 7 8 H H H H L L L L H H L L H H L L H L H L H L H L NTSC PAL BS JC-SAT SCC ASIA-SAT (NTSC) COPER NICUS U-TEL SAT ASTRA ASIA-SAT (PAL) Deviation (MHz/V) Gain deviation against BS (dB) 17.0 15.8 18.0 21.6 22.5 25.0 16.0 20.0 0.0 0.7 –0.5 –1.8 –2.3 –3.2 0.5 –1.4 Remarks positive positive positive negative positive positive positive negative Control Table Pin No. Symbol 5 KEYEDIN 14 25 26 27 SYNCIN SWA SWB SWC Min. LOW Typ. Max. 0.0 0.1 0.0 0.0 0.0 0.8 2.0 2.0 2.0 Min. HIGH Typ. Max. Unit 0.3 V 3.0 3.0 3.0 V V V V —10— VCC VCC VCC Remarks AFT clamp circuit ON when pulse input is Low during keyed AFT Clamp circuit ON when Low Gain SW applicable to satellite receivers CXA3018R Description of Operation This IC consists of the following six function blocks. First, the signal flow is explained briefly, followed by the functions of each block. (1) AGC block (2) FM demodulation block (3) SWAMP block of video signal processor (4) CLAMP & VAMP blocks of video signal processor (5) AFT block (6) C/N detection block The 2nd IF differential signal input to Pins 38 and 39 passes through the AGC block to stabilize the signal level and is then input to the FM demodulation block. The FM demodulated signal is then input to the SWAMP and AFT blocks of video signal processor. The SWAMP block outputs the detective signal from DETOUT after adjusting the gain to support worldwide video systems. The detective signal output becomes the final video signal by being input to the CLAMP & VAMP blocks through an external de-emphasis time constant block and an LPF. Also, part of the detective signal output is input to the C/N detection block through an external BPF. The AFT block detects the frequency lag of the 2nd IF signal by the voltage value of the detective signal output, and outputs a command signal to the external frequency conversion block in order to correct the local frequency. The C/N detection block detects noise outside the video band and has a voltage output to indicate the C/N noise level that is input (1st IF signal) to the receiver. (1) AGC block The 2nd IF differential signal is input to Pins 38 and 39 to fix the signal level with the AGC block. Connect a capacitor which fixes the AGC loop time constant to Pin 30, and apply an adjustment voltage at the output setting level of this AGC (2nd AGC) to Pin 31. The 2nd AGC control voltage is output from Pin 35. Apply the starting level adjustment voltage of the 1st AGC for the 1st IF to Pin 32. Input the Pin 35 output to Pin 33 through a 10 kΩ resistor and the Pin 36 output through a 0.1 µF capacitor. Output the 1st AGC control voltage from Pin 34, and output the voltage obtained by adding the 1st AGC control voltage of the Pin 34 output to the 2nd AGC control voltage of the Pin 35 output from Pin 36. (2) FM demodulation block The FM demodulation block is a PLL demodulator which consists of an oscillator (OSC), phase discriminator and DCAMP. Connect the oscillator resonance circuit to Pins 21 to 24 and the loop filter to Pins 28 and 29. The DCAMP differential output comes from Pins 18 and 19, and this output is used as the drive voltage for the varicap that comprises the oscillator. (3) SWAMP block of video signal processor The SWAMP block of video signal processor amplifies only gains selected by LOGIC and outputs detective signal output from Pin 42. The output from Pin 42 is output externally as the DETOUT (detective output) signal. This signal enters an internal buffer from Pin 43 through the de-emphasis time constant block, and is then output again from Pin 44. The Pin 44 BUFOUT output is input to VAMPIN after the high frequency component outside of the video band is removed by an external LPF. LOGIC controls SWAMP according to corresponding satellite switching commands (3 bits) input from Pins 25 to 27. In addition, the SWAMP gain is finely adjusted by applying the DETOUT level adjustment voltage from Pin 41. —11— CXA3018R (4) CLAMP & VAMP blocks of video signal processor The signal input from VAMPIN is sync-tip clamped by CLAMP1 and input to the VAMP block. VAMP selects NTSC or PAL gain according to the NTSC/PAL switching commands from the LOGIC block. The gain is output from Pin 16 after being amplified to the proper level (1 Vp-p for sync tip to 100 % WHITE). The Pin 16 output signal is input to CLAMP2 from Pin 15 where it is sync-tip clamped again. CLAMP1 & 2 are enabled by the CLAMP pulse which is input to Pin 14. The CLAMP1 & 2 blocks eliminate the triangular wave components (15 to 30 Hz) which overlap with the video signal for the energy diffusing signal. The final video signal is output from Pin 13. (5) AFT block This block detects frequency error in the 2nd IF signal as a voltage displacement from the FM demodulation signal which is input to the AFT block, and outputs the two values of High (5 V) or Low (0 V) from Pins 1 and 2. High indicates the frequency change command (active-High). Furthermore, High output from both pins indicates the dead zone. Connecting an LPF capacitor to Pin 3, applying the reference voltage to Pin 4, and connecting a resistor between Pins 3 and 4 changes the AFTAMP gain, thereby allowing the dead zone width to be changed. Input the keyed pulse for keyed AFT to Pin 5. The Pin 5 voltage should be 0 V during mean value AFT. Connect sample-and-hold capacitors to Pins 6 and 7. Apply the offset adjustment voltage to Pin 46 to cancel the effects of the DC offset inside the IC. (6) C/N detection block Extract the noise component from the DETOUT signal output from Pin 42 with an external BPF and input it to the C/N detection block from Pin 8. Output the C/N conversion output from Pin 11. Apply the C/N detection adjustment voltage to Pin 9, connect an LPF capacitor to Pin 10, and connect a decoupling capacitor for the voltage source for correcting temperature characteristics to Pin 12. (7) Other Connect a capacitor to cancel the regulator voltage noise to Pin 48, and use this output as the reference voltage for internal adjustment. —12— 5.0V 5.0V A V 47µ 1n 10µ V 10µ 1n 48 VREG 47 VCC2 V V V V V V 51 100k 8 7 6 5 4 3 2 1 46 OFFSETADJ 45 VAMPIN 44 BUFOUT 43 BUFIN V 0.1µ V V V 12 11 10 9 V V V V VIDEOIN 15 SYNCIN 14 CLAMP 13 OUT 1k VAMPOUT 16 GND2 17 VCODR2 18 1k V V V 10k 10k 10k Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other right due to same. V 100k V V V AFTUP 0.1µ 1n VCODR1 19 42 DETOUT CXA3018R GND3 20 AFTDOWN 0.1µ V V VCOE2 23 VCOE1 22 V VCOB2 24 V 41 GCONT V VCOB1 21 0.1µ 40 GND1 ANA2 0.1µ V 36 MTRX-AGC 10k ANA1 0.1µ 1n 35 2ndIFAGC KEYED-IN SH2 100k 34 OPAmpOUT 0.1µ SH1 V 39 IF2 38 IF1 37 VCC1 25 26 27 28 29 30 31 32 33 OPAmpIN-N 0.1µ CNIN 0.1µ OPAmpIN-P V 2ndAGCCONT CNCONT 100k V AGC-LPF CNLPF 0.1µ V LPF-P 0.1µ V LPF-N V 0.1µ SW C-IN V 0.1µ SW B-IN 0.1µ 100k V 0.1µ SW A-IN BGR-C CNOUT —13— 1µ V 47µ 4.7k 4.7k 4.7k 22k 22k 22k CXA3018R Electrical Characteristics Measurement Circuit 1 5.0V LPF VIDEO IN (+DISP IN) 1k 270 100k 1k 2k 100k 1n 10µ 1n 0.1µ 48 VREG 47 VCC2 2 1 46 OFFSETADJ 45 VAMPIN 44 BUFOUT 43 BUFIN 42 DETOUT 41 GCONT AFTUP 47µ AFTDOWN DETOUT 0.1µ 40 GND1 47k 5 KEYED IN 4 3 CXA3018R 6 SH2 1n 7 100k 0.1µ 39 IF2 CN IN 8 51 9 CNCONT 38 IF1 12 CN OUT V 11 10 BGR-C 37 VCC1 SH1 IF IN MTRX-AGC CNIN 0.1µ 25 26 27 28 29 30 31 32 33 34 2ndIFAGC 47µ 1.5k OPAmpOUT 10k OPAmpIN-N ANA2 OPAmpIN-P ANA1 2ndAGCCONT KEYED-IN AGC-LPF 35 0.01µ LPF-P 0.1µ 470p 330 100p LPF-N 0.1µ 100k 1k 0.01µ 36 1µ SW C-IN 10p CLAMP 13 OUT SYNCIN 14 VIDEOIN 15 VAMPOUT 16 GND2 17 VCODR2 18 VCODR1 19 GND3 20 VCOB1 21 VCOE1 22 VCOE2 23 VCOB2 24 1k 9p 15p 9p VC VC 0.47µ 0.1µ 1k 15p 15p 10T 2T 2T 1k SW B-IN CNLPF 10k 10k 10k VIDEO OUT 47µ 47µ 5.0V 22k 33k SW A-IN CNOUT —14— 1n 10µ 47µ 1µ 4.7k 4.7k 4.7k 100k 100k 0.1µ 22k 22k 22k 51 100k VIDEO IN CXA3018R Electrical Characteristics Measurement Circuit 2 1k IF-IN GND1 VCC3 GND VCC3 4.5M LPF 11.5M BPF 2SA1175 C1 10µ VCC1 VCC2 2SC2785 1n C3 1n C6 0.1µ C28 470p 330 C29 R32 100k 1.5k 1n C7 VREG VCC2 OFFSETADJ VAMPIN BUFOUT BUFIN DETOUT GCONT GND1 IF2 IF1 47µ 48 47 46 45 44 43 42 41 40 39 38 37 C34 2 35 C33 C26 AFT DOWN AFT UP 1 36 3 34 1n VCC VCC2 1n AFT DOWN GND2 5.73M BPF R45 AUDIO-OUT VCC3 2k VR2 R442 GND3 100k VCC1 VR1 270 VCC3 C9 R31 C4 VCC1 10µ 1n MTRX AGC 1n 2nd IFAGC AFT UP C2 OPAmpOUT ANA2 4 33 0.1µ OPAmpIN N ANA1 R5 C10 VR6 OPAmpIN P 100k 5 32 VR5 VCC3 KEYED IN 10µ 47k KEYED IN 6 31 100k 2nd AGCCONT C12 SH2 10k 0.01µ VCC3 7 30 CNIN C23 AGC LPF 0.1µ C13 SH1 C21 LPF P 0.1µ R35 8 29 100p 10p C22 9 28 10 27 SWC 0.01µ OPAmpOUT C32 VR3 H/L 11 26 SWB SWB IN CNOUT CNOUT R25 LPF N CNCONT 100k 12 25 SWA 13 14 15 16 17 18 19 20 21 22 23 24 OSCB2 15P 15P C211 15P C221 15P C231 C241 0.47µ 0.1µ C17 2SC2785 C18 VIDEO AMP +6DB CLAMP OUT SYNC IN VIDEO IN VAMP OUT GND2 VCODR2 VCODR1 GND3 OSCB1 OSCE1 OSCE2 C230 C220 R18 9P 9P 1k R17 1k C9 SWC IN 1n CNLPF C14 1k R13 MTRX AGC C15 SWA IN BGR C 1n C16 2T 2T 2SC2785 VCC3 10T 1k —15— VIDEO OUT Application Circuit CXA3018R 1k R14 1µ CXA3018R Pin 31 (2ndAGCCONT)=2.5V Pin 32 (OPAmpIN-p)=2.5V VAMP frequency responce characteristics AGC DET Characteristics 4 0 VAMP OUT output level (dB) Pin 34, 35 and 36 AGC OUT (V) Pin 36 MTRX AGC OUT 3.5 3 Pin 35 2ndAGC OUT 2.5 2 1.5 1 Pin 34 1stAGC OUT –2 –4 0.5 0 –70 –60 –50 –40 –30 –20 –10 Input signal level 400 MHz (dBm) –6 0 0 AFT characteristics 4 6 8 10 Input signal frequency (MHz) 12 14 CN sensitivity characteristics 5 4 Pin 2 AFTUP Pin 1 AFTDOWN Pin 11 (CN OUT) output voltage (V) AFT DOWN/AFT UP output level (V) 2 4 3 2 1 Pin 1 AFTDOWN 0 399 Pin 2 AFTUP 400 Input signal frequency (MHz) 3.5 3 2.5 Pin 9 CN CONT control voltage 2.5V 2.3V 2.1V 2 1.5 1 –70 401 –60 –50 –40 –30 Pin 8 (CN IN) Input level (dBm) –20 –10 (MIX OUT –pins 28 and 29 are shorted) Input level –40 dBm 2.6 Supply voltage dependent characteristics of VCDR1 output DC (compared with conventional product) 3.0 2.4 2.8 Pin 19 VCDR1 (V) Pin 11 (CN OUT) output voltage (V) CN adjustment characteristics 2.2 2 CXA3018R 2.6 2.4 CXA1689R 2.2 1.8 1.6 1 1.5 2 2.5 3 3.5 4 CN CONT voltage (V) 4.5 5 2.0 4.50 —16— 4.75 5.00 Supply voltage (V) 5.25 5.50 CXA3018R Unit: mm 48PIN LQFP (PLASTIC) 9.0 ± 0.2 ∗ 7.0 ± 0.1 36 25 A 13 48 (0.22) 0.5 ± 0.2 (8.0) 24 37 12 1 + 0.05 0.127 – 0.02 0.5 ± 0.08 + 0.2 1.5 – 0.1 + 0.08 0.18 – 0.03 0.1 0.1 ± 0.1 0° to 10° 0.5 ± 0.2 Package Outline NOTE: Dimension “∗” does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY / PHENOL RESIN SOLDER PLATING SONY CODE LQFP-48P-L01 LEAD TREATMENT EIAJ CODE ∗QFP048-P-0707-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 0.2g JEDEC CODE —17—