CXP83200A CMOS 8-bit Single Chip Microcomputer Description The CXP83200A is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP83120A/83124A and CXP83232/83240. Piggyback/ evaluator type 100 pin PQFP (Ceramic) Features • Wide-range instruction system (213 instructions) to LQFP supported QFP supported cover various types of data – 16-bit operation/multiplication and division/Boolean bit operation instructions • Minimum instruction cycle 400ns at 10MHz operation 8µs at 500kHz operation 122µs at 32kHz operation • Applicable EPROM LCC type 27C512 (Maximum 40K bytes are available.) • Incorporated RAM capacity 1120 bytes (Including LCD display data area) • Peripheral functions – A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 32µs/10 MHz) – Serial interface Incorporated 8-bit, 8-stage FIFO (Auto transfer for 1 to 8 bytes), 1 channel 8-bit clock sync type, 1 channel – Timer 8-bit timer 8-bit timer/counter 19-bit time base timer 16-bit capture timer/counter 32kHz timer/counter – LCD controller/driver Maximum 160 segment display possible (for 1/4 duty) 4 lines for common output, 40 lines for segment output Display method static: 1/2, 1/3, 1/4 duty Bias method: 1/2, 1/3 bias – Remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO – PWM output 14 bits, 1 channel • Interruption 15 factors, 15 vectors, multi-interruption possible • Standby mode SLEEP/STOP • Package 100-pin ceramic PQFP Note) Mask option depends on the type of the CXP83200A. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E94831A68-PS CXP83200A SEG27/PF3 SEG28/PF4 SEG29/PF5 SEG30/PF6 SEG31/PF7 SEG32/PG0 SEG33/PG1 VDD SEG34/PG2 NC Vss TX TEX SEG35/PG3 SEG36/PG4 SEG37/PG5 SEG38/PG6 SEG39/PG7 PE0/INT0/EC0 PE1/INT1/EC1 Pin Configuration in Piggyback Mode (QFP package) 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PE2/INT2 1 80 SEG26/PF2 PE3/INT3/NMI 2 79 SEG25/PF1 5 76 SEG22/PD6 PB0/CINT 6 75 SEG21/PD5 PB1/ CS0 7 74 SEG20/PD4 PB2/SCK0 8 73 SEG19/PD3 PB3/SI0 9 72 SEG18/PD2 PB4/SO0 10 71 SEG17/PD1 70 SEG16/PD0 69 SEG15 68 SEG14 67 SEG13 66 SEG12 65 SEG11 64 SEG10 63 SEG9 62 SEG8 61 SEG7 4 NC 1 2 3 A13 PE6/TO/ADJ A14 SEG23/PD7 VDD SEG24/PF0 77 A15 78 A12 3 4 A7 PE4/RMC PE5/PWM 32 31 30 PB5/SCK1 11 PB6/SI1 12 PB7/SO1 13 PC0 14 PC1 15 PC2 16 PC3 17 PC4 18 PC5 19 PC6 20 PC7 21 60 SEG6 PH0 22 59 SEG5 PH1 23 58 SEG4 PH2 24 57 SEG3 PH3 25 56 SEG2 PH4 26 55 SEG1 PH5 27 54 SEG0 PH6 28 53 COM3 PH7 29 52 COM2 PA0/AN0 30 51 COM1 A6 5 29 A8 A5 6 28 A9 A4 7 27 A11 A3 8 26 NC A2 9 25 OE A1 10 24 A10 A0 11 23 CE NC 12 22 D7 D0 13 21 D6 D5 D4 D3 NC GND D2 D1 14 15 16 17 18 19 20 Note) 1. NC (Pin 90) is always connected to VDD. 2. Vss (Pins 41 and 91) are both connected to GND. –2– COM0 VLC1 VLC2 VLC3 VL AVss AVREF EXTAL2 Vss XTAL2 XTAL1 EXTAL1 RST PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 CXP83200A SEG24/PF0 SEG25/PF1 SEG26/PF2 SEG27/PF3 SEG28/PF4 SEG29/PF5 SEG30/PF6 SEG31/PF7 SEG32/PG0 SEG33/PG1 SEG34/PG2 VDD NC Vss TX TEX SEG35/PG3 SEG36/PG4 SEG37/PG5 SEG38/PG6 SEG39/PG7 PE0/INT0/EC0 PE1/INT1/EC1 PE2/INT2 PE3/INT3/NMI Pin Configuration in Piggyback Mode (LQFP package) 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 PE4/RMC 1 75 SEG23/PD7 PE5/PWM 2 74 SEG22/PD6 PE6/TO/ADJ 3 73 SEG21/PD5 PB0/CINT 4 72 SEG20/PD4 PB1/CSO 5 71 SEG19/PD3 PB2/SCK0 6 70 SEG18/PD2 PB3/SI0 7 A15 1 28 VDD 69 SEG17/PD1 A12 2 27 A14 68 SEG16/PD0 SEG15 PB4/SO0 8 PB5/SCK1 9 A7 3 26 A13 67 PB6/SI1 10 A6 4 25 A8 66 SEG14 PB7/SO1 11 A5 5 24 A9 65 SEG13 PC0 12 A4 6 23 A11 64 SEG12 PC1 13 A3 7 22 OE 63 SEG11 PC2 14 A2 8 21 A10 62 SEG10 PC3 15 A1 9 20 CE 61 SEG9 PC4 16 A0 10 19 D7 60 SEG8 PC5 17 D0 11 18 D6 59 SEG7 PC6 18 D1 12 17 D5 58 SEG6 PC7 19 D2 13 16 D4 57 SEG5 PH0 20 GND 14 15 D3 56 SEG4 PH1 21 55 SEG3 22 54 SEG2 PH3 23 53 SEG1 PH4 24 52 SEG0 25 51 COM3 Note) 1. NC (Pin 88) is always connected to VDD. 2. Vss (Pins 39 and 89) are both connected to GND. –3– COM2 COM1 COM0 VLC1 VLC2 VLC3 VL AVss AVREF EXTAL2 XTAL2 Vss XTAL1 EXTAL1 RST PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1 PA0/AN0 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 PH7 PH5 PH6 PH2 CXP83200A SEG27/PF3 SEG28/PF4 SEG29/PF5 SEG30/PF6 SEG31/PF7 SEG32/PG0 SEG33/PG1 SEG34/PG2 VDD NC Vss TX TEX SEG35/PG3 SEG36/PG4 SEG37/PG5 SEG38/PG6 SEG39/PG7 PE0/INT0/EC0 PE1/INT1/EC1 Pin Configuration in Evaluator Mode (QFP package) 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PE2/INT2 1 80 SEG26/PF2 PE3/INT3/NMI 2 79 SEG25/PF1 5 76 SEG22/PD6 PB0/CINT 6 75 SEG21/PD5 PB1/CS0 7 74 SEG20/PD4 PB2/SCK0 8 73 SEG19/PD3 PB3/SI0 9 72 SEG18/PD2 PB4/SO0 10 PB5/SCK1 11 PB6/SI1 12 PB7/SO1 13 PC0 14 PC1 15 PC2 16 PC3 17 PC4 18 PC5 19 PC6 20 PC7 4 A12 NC 32 31 30 1 2 3 A13 SEG23/PD7 PE6/TO/ADJ A14 SEG24/PF0 77 VDD 78 A15 3 4 A7/D7 PE4/RMC PE5/PWM 29 5 A6/D6 28 6 A5/D5 A9 27 7 A4/D4 A8 A11 A3/D3 8 26 NC A2/D2 9 25 HALT 71 SEG17/PD1 70 SEG16/PD0 69 SEG15 68 SEG14 67 SEG13 66 SEG12 65 SEG11 64 SEG10 63 SEG9 62 SEG8 61 SEG7 21 60 SEG6 PH0 22 59 SEG5 PH1 23 58 SEG4 A1/D1 10 24 A10 A0/D0 11 23 E/P NC 12 22 I/T RD 13 21 MON RST C1 C2 NC GND SYNC WR 14 15 16 17 18 19 20 PH2 24 57 SEG3 PH3 25 56 SEG2 PH4 26 55 SEG1 PH5 27 54 SEG0 PH6 28 53 COM3 PH7 29 52 COM2 PA0/AN0 30 51 COM1 Note) 1. NC (Pin 90) is always connected to VDD. 2. Vss (Pins 41 and 91) are both connected to GND. –4– COM0 VLC1 VLC2 VLC3 VL AVss AVREF EXTAL2 XTAL2 Vss XTAL1 EXTAL1 RST PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 CXP83200A SEG24/PF0 SEG25/PF1 SEG26/PF2 SEG27/PF3 SEG28/PF4 SEG29/PF5 SEG30/PF6 SEG31/PF7 SEG32/PG0 SEG33/PG1 SEG34/PG2 VDD NC Vss TX TEX SEG35/PG3 SEG36/PG4 SEG37/PG5 SEG38/PG6 SEG39/PG7 PE0/INT0/EC0 PE1/INT1/EC1 PE2/INT2 PE3/INT3/NMI Pin Configuration in Evaluator Mode (LQFP package) 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 PE4/RMC 1 75 SEG23/PD7 PE5/PWM 2 74 SEG22/PD6 PE6/TO/ADJ 3 73 SEG21/PD5 PB0/CINT 4 72 SEG20/PD4 PB1/CSO 5 71 SEG19/PD3 PB2/SCK0 6 70 SEG18/PD2 VDD 69 SEG17/PD1 A14 68 SEG16/PD0 67 SEG15 PB3/SI0 7 PB4/SO0 8 PB5/SCK1 9 A7/D7 3 26 A13 A15 1 A12 2 28 27 PB6/SI1 10 A6/D6 4 25 A8 66 SEG14 PB7/SO1 11 A5/D5 5 24 A9 65 SEG13 PC0 12 A4/D4 6 23 A11 64 SEG12 PC1 13 A3/D3 7 22 HALT 63 SEG11 PC2 14 A2/D2 8 21 A10 62 SEG10 PC3 15 A1/D1 9 20 E/P 61 SEG9 PC4 16 A0/D0 10 19 I/T 60 SEG8 PC5 17 RD 11 18 MON 59 SEG7 PC6 18 WR 12 17 RST 58 SEG6 PC7 19 SYNC 13 16 C1 57 SEG5 PH0 20 GND 14 15 C2 56 SEG4 PH1 21 55 SEG3 PH2 22 54 SEG2 PH3 23 53 SEG1 PH4 24 52 SEG0 PH5 25 51 COM3 Note) 1. NC (Pin 88) is always connected to VDD. 2. Vss (Pins 39 and 89) are both connected to GND. –5– COM2 COM1 COM0 VLC1 VLC2 VLC3 VL AVss AVREF XTAL2 EXTAL2 Vss XTAL1 EXTAL1 RST PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1 PA0/AN0 PH7 PH6 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 CXP83200A EPROM Read Timing (Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference) Item Symbol Pins Min. Address → Data input delay time tACC A0 to A15 D0 to D7 Address → Data Hold time tIH A0 to A15 D0 to D7 Max. Unit 120 ns 0 ns 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD D0 to D7 Input data 0.2VDD Products List Products Mask type Piggyback/evaluator type CXP83120A CXP83124A CXP83232A CXP83240A CXP83200A-U01Q CXP83200A-U01R 100-pin plastic QFP/LQFP 100-pin ceramic PQFP Option item Package Rom capacitance RAM capacitance Pull-up resistance for reset 20K bytes 24K bytes 644 bytes 32K bytes 40K bytes 1120bytes Existent/Non-existent –6– EPROM 40K bytes 1120 bytes Existent CXP83200A Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking LCC type EPROM Pin 1 marking Pin 1 index Note) CPU Probe (27C512 only) Note) Evaluation cap should be connect to CPU probe. EPROM adaptor Pin 1 marking Pin 1 index CPU probe for LQFP –7– CXP83200A Package Outline Unit: mm 100PIN PQFP (CERAMIC) 18.7 PIN NO. 1 INDEX 16.3 ± 0.2 INDEX 100 81 81 80 PIN No. 1 INDEX 1 80 0.65 ± 0.05 1 100 0.3 ± 0.08 14.22 18.12 ± 0.2 1.27 ± 0.13 12.02 30 0.7 1.0 0.3 6.0 24.7 22.3 ± 0.25 4.5 51 31 1.3 ± 0.3 51 50 9.48 11.66 30 50 31 0.45 15.58 ± 0.2 PACKAGE STRUCTURE PACKAGE MATERIAL PQFP-100C-L01 LEAD TREATMENT GOLD PLATING EIAJ CODE AQFP100-C-0000-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 5.7g 10.44 MAX + 0.05 0.15 – 0.02 0.50 ± 0.25 JEDEC CODE 3.57 ± 0.36 CERAMIC SONY CODE 100PIN PQFP (CERAMIC) 16.0 ± 0.4 12.4 14.0 ± 0.2 75 51 76 0.5 ± 0.05 + 0.08 0.18 – 0.03 1.5 3.2 ± 0.2 0.5 ± 0.05 12.0 ± 0.15 + 0.08 0.18 – 0.03 0.8 ± 0.2 26 100 1 INDEX 12.0 ± 0.15 50 25 12.8 ± 0.2 INDEX 6.9 + 0.15 0.2 – 0.13 + 0.05 0.127 – 0.02 3.32 PACKAGE STRUCTURE PACKAGE MATERIAL CERAMIC SONY CODE PQFP-100C-L02 LEAD TREATMENT GOLD PLATING EIAJ CODE AQFP100-C-1414-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 2.2g JEDEC CODE –8–