SONY CXP87400

CXP87400
CMOS 8-bit Single Chip Microcomputer
Description
The CXP87400 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type,
which is developed for evaluating the function of the
CXP87452/87460.
Piggyback/
evaluator type
100 pin PQFP (Ceramic)
Features
• A wide instruction set (213 instructions) which cover
various types of data.
LQFP supported
QFP supported
– 16-bit operation/multiplication and division/
boolean bit operation instructions
• Minimum instruction cycle
333ns at 12MHz operation (3.0 to 5.5V)
250ns at 16MHz operation (4.5 to 5.5V)
• Applicable EPROM
LCC type 27C256, LCC type 27C512
(Maximum 60Kbytes are available.)
• Incorporated RAM capacity
1568 bytes
• Peripheral functions
– A/D converter
8-bit, 12-channel, successive approximation method
(Conversion time of 20µs/16MHz)
– Serial interface
Incorporated buffer RAM (Auto transfer for 1 to 32 bytes),
1 channel
Incorporated 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
– Timer
8-bit timer
8-bit timer/counter
19-bit time base timer
– High precision timing pattern generator PPG 19-pin, 32-stage programmable
PPG 10-pin, 21-stage programmable
RTG 5 pins, 2 channels
– PWM/DA gate output
PWM output 12 bits, 2 channels
(Repetitive frequency 62.5kHz/16MHz)
DA gate pulse output 12 bits, 4 channels
– Servo input control
Capstan FG, drum FG/PG, CTL input
– VSYNC separator
– FRC capture unit
Incorporated 26-bit and 8-stage FIFO
– PWM output
14 bits, 1 channel
– General purpose prescaler
10 bits (system clock asynchronous type)
– Pulse cycle measurement circuit
• Interruption
18 factors, 14 vectors, multi-interruption possible
• Standby mode
SLEEP/STOP
• Package
100-pin ceramic PQFP
Note) Mask option depends on the type of the CXP87400. Refer to the Products List for details.
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E94X16A68-PS
CXP87400
PI5/SCK1
PI4/INT1
PI3/TO
PI2/PWM
PI1/PO
PI0/PCK/OSCI
PK0/OSCO
Vss
VDD
NC
PA7/PPO007/PPO107
PA6/PPO006/PPO106
PA5/PPO005/PPO105
PA4/PPO004/PPO104
PA3/PPO003/PPO103
PA2/PPO002/PPO102
PA1/PPO001/PPO101
PA0/PPO000/PPO100
PB7/PPO015
PB6/PPO014
Pin Assignment in Piggyback Mode (QFP package)
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
78
PE0/INT0/XOUT
PB2/PPO010
4
77
PE1/EC/INT2
PB1/PPO009
5
76
PE2/PWM0
PB0/PPO008
6
75
PE3/PWM1
PC7/RTO7
7
74
PE4/DAA0
PC6/RTO6
8
73
PE5/DAA1
PC5/RTO5
9
72
PE6/DAB0
PC4/RTO4
10
71
PE7/DAB1
PC3/RTO3
11
70
PG0/CFG
PC2/PPO018
12
69
PG1/DFG
PC1/PPO017
13
68
PG2/DPG
67
PG3/PBCTL
66
PG4/SYNC0/PMI
65
PG5/SYNC1
64
PG6/EXI0
63
PG7/EXI1/PMSK
62
AN0
61
AN1
4
A6
2
3
NC
A13
3
A14
PI7/SI1
PB3/PPO011
VDD
PI6/SO1
79
A15
80
2
A12
1
PB4/PPO012/PPO112
A7
PB5/PPO013/PPO113
1 32 31 30
29
5
6
A5
A4
A8
A9
28
27
7
A11
PC0/PPO016
14
PJ7
15
PJ6
16
PJ5
17
PJ4
18
PJ3
19
PJ2
20
PJ1
21
60
AN2
22
59
AN3
58
PF0/AN4
A2
23
11
NC
CE
D7
22
12
D0
A10
24
10
A0
OE
25
9
A1
NC
26
8
13
D6
21
D5
D4
D3
NC
GND
D2
14 15 16 17 18 19 20
D1
PJ0
A3
PD7
23
PD6
24
57
PF1/AN5
PD5
25
56
PF2/AN6
PD4
26
55
PF3/AN7
PD3
27
54
AVDD
PD2
28
53
AVREF
PD1
29
52
AVss
PD0
30
51
PF4/AN8
PF5/AN9
PF6/AN10
PF7/AN11
SCK0
SO0
SI0
CS0
EXTAL
XTAL
Vss
RST
MP
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
Note) 1. NC (Pin 90) is always connected to VDD.
2. VSS (Pins 41 and 88) are both connected to GND.
3. MP (Pin 39) is always connected to GND.
–2–
CXP87400
PE0/INT0/XOUT
PI7/SI1
PI6/SO1
PI5/SCK1
PI4/INT1
PI3/TO
PI2/PWM
PI1/PO
PI0/PCK/OSCI
PK0/OSCO
VDD
Vss
NC
PA7/PPO007/PPO107
PA6/PPO006/PPO106
PA5/PPO005/PPO105
PA4/PPO004/PPO104
PA3/PPO003/PPO103
PA2/PPO002/PPO102
PA1/PPO001/PPO101
PA0/PPO000/PPO100
PB7/PPO015
PB6/PPO014
PB5/PPO013/PPO113
PB4/PPO012/PPO112
Pin Assignment in Piggyback Mode (LQFP package)
AA
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
PB3/PPO011
PB2/PPO010
PB1/PPO009
1
2
3
75
PE1/EC/INT2
74
PE2/PWM0
73
PE3/PWM1
72
PE4/DAA0
PB0/PPO008
4
PC7/RTO7
5
71
PE5/DAA1
PC6/RTO6
6
70
PE6/DAB0
PC5/RTO5
7
69
PE7/DAB1
PC4/RTO4
8
68
PG0/CFG
PC3/RTO3
9
67
PG1/DFG
PC2/PPO018
10
66
PG2/DPG
PC1/PPO017
11
65
PG3/PBCTL
PC0/PPO016
12
64
PG4/SYNC0/PMI
PJ7
13
63
PG5/SYNC1
PJ6
14
62
PG6/EXI0
PJ5
15
61
PG7/EXI1/PMSK
PJ4
16
PJ3
17
PJ2
PJ1
A15
1
28
VDD
A12
2
27
A14
A7
3
26
A13
A6
4
25
A8
A5
5
24
A9
A4
6
23
A11
7
22
OE
A2
8
21
A10
A1
9
20
CE
A0
10
19
D7
D0
11
18
D6
D1
12
17
D5
D2
13
16
D4
GND
14
15
D3
A3
18
19
60
AN0
59
AN1
58
AN2
57
AN3
56
PF0/AN4
PJ0
20
PD7
21
55
PF1/AN5
PD6
22
54
PF2/AN6
PD5
23
53
PF3/AN7
PD4
24
52
AVDD
PD3
25
51
AVREF
Note) 1. NC (Pin 88) is always connected to VDD.
2. VSS (Pins 39 and 86) are both connected to GND.
3. MP (Pin 37) is always connected to GND.
–3–
AVss
PF4/AN8
PF5/AN9
PF6/AN10
PF7/AN11
SCK0
SO0
SI0
CS0
EXTAL
XTAL
Vss
RST
MP
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PD0
PD1
PD2
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CXP87400
PI5/SCK1
PI4/INT1
PI3/TO
PI2/PWM
PI1/PO
PI0/PCK/OSCI
PK0/OSCO
Vss
VDD
NC
PA7/PPO007/PPO107
PA6/PPO006/PPO106
PA5/PPO005/PPO105
PA4/PPO004/PPO104
PA3/PPO003/PPO103
PA2/PPO002/PPO102
PA1/PPO001/PPO101
PA0/PPO000/PPO100
PB7/PPO015
PB6/PPO014
Pin Assignment in Evaluator Mode (QFP package)
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
PI7/SI1
PB3/PPO011
3
78
PE0/INT0/XOUT
PB2/PPO010
4
77
PE1/EC/INT2
PB1/PPO009
5
76
PE2/PWM0
PB0/PPO008
6
75
PE3/PWM1
PC7/RTO7
7
74
PE4/DAA0
PC6/RTO6
8
73
PE5/DAA1
NC
A13
79
A14
2
VDD
PI6/SO1
PB4/PPO012/PPO112
A15
80
A12
1
A7/D7
PB5/PPO013/PPO113
PC5/RTO5
9
72
PE6/DAB0
PC4/RTO4
10
71
PE7/DAB1
PC3/RTO3
11
70
PG0/CFG
69
PG1/DFG
68
PG2/DPG
67
PG3/PBCTL
66
PG4/SYNC0/PMI
65
PG5/SYNC1
PC2/PPO018
12
PC1/PPO017
13
A6/D6
2
3
4
1 32 31 30
A5/D5
6
A4/D4
A8
29
5
A9
28
A11
27
7
PC0/PPO016
14
PJ7
15
PJ6
16
A1/D1
10
24
A10
PJ5
17
A0/D0
11
23
E/P
PJ4
18
PJ3
19
PJ2
20
PJ1
21
59
AN3
58
PF0/AN4
A3/D3
A2/D2
I/T
22
12
RD
HALT
25
9
NC
NC
26
8
13
MON
21
14 15 16 17 18 19 20
64
PG6/EXI0
63
PG7/EXI1/PMSK
62
AN0
61
AN1
60
AN2
PD5
25
PF2/AN6
PD4
26
55
PF3/AN7
PD3
27
54
AVDD
PD2
28
53
AVREF
PD1
29
52
AVss
30
51
PF4/AN8
NC
Note) 1. NC (Pin 90) is always connected to VDD.
2. VSS (Pins 41 and 88) are both connected to GND.
3. MP (Pin 39) is always connected to GND.
–4–
PF5/AN9
PF6/AN10
PF7/AN11
SCK0
SI0
SO0
CS0
EXTAL
XTAL
Vss
RST
MP
PH0
PH1
PH2
PH3
PH4
PH5
PH6
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PH7
PD0
RST
PF1/AN5
56
C1
57
C2
24
GND
PD6
SYNC
22
23
WR
PJ0
PD7
CXP87400
PE0/INT0/XOUT
PI7/SI1
PI6/SO1
PI5/SCK1
PI4/INT1
PI3/TO
PI2/PWM
PI1/PO
PI0/PCK/OSCI
PK0/OSCO
VDD
Vss
NC
PA7/PPO007/PPO107
PA6/PPO006/PPO106
PA5/PPO005/PPO105
PA4/PPO004/PPO104
PA3/PPO003/PPO103
PA2/PPO002/PPO102
PA1/PPO001/PPO101
PA0/PPO000/PPO100
PB7/PPO015
PB6/PPO014
PB5/PPO013/PPO113
PB4/PPO012/PPO112
Pin Assignment in Evaluator Mode (LQFP package)
AA
AA
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
PB3/PPO011
1
75
PE1/EC/INT2
PB2/PPO010
2
74
PE2/PWM0
PB1/PPO009
3
73
PE3/PWM1
PB0/PPO008
4
72
PE4/DAA0
PC7/RTO7
5
71
PE5/DAA1
PC6/RTO6
6
70
PE6/DAB0
PC5/RTO5
7
69
PE7/DAB1
PC4/RTO4
8
68
PG0/CFG
PC3/RTO3
9
A15
1
28
VDD
A12
2
27
A14
A7/D7
3
26
A13
67
PG1/DFG
A6/D6
4
25
A8
66
PG2/DPG
A5/D5
5
24
A9
65
PG3/PBCTL
A4/D4
6
23
A11
64
PG4/SYNC0/PMI
A3/D3
7
22
HALT
63
PG5/SYNC1
A2/D2
8
21
A10
62
PG6/EXI0
A1/D1
9
20
E/P
61
PG7/EXI1/PMSK
A0/D0
10
19
I/T
60
AN0
RD
11
18
MON
59
AN1
WR
12
17
RST
58
AN2
SYNC
13
16
C1
57
AN3
GND
14
15
C2
56
PF0/AN4
PC2/PPO018
10
PC1/PPO017
11
PC0/PPO016
12
PJ7
13
PJ6
14
PJ5
15
PJ4
16
PJ3
17
PJ2
18
PJ1
19
PJ0
20
PD7
21
55
PF1/AN5
PD6
22
54
PF2/AN6
PD5
23
53
PF3/AN7
PD4
24
52
AVDD
PD3
25
51
AVREF
Note) 1. NC (Pin 88) is always connected to VDD.
2. VSS (Pins 39 and 86) are both connected to GND.
3. MP (Pin 37) is always connected to GND.
–5–
AVss
PF4/AN8
PF5/AN9
PF6/AN10
PF7/AN11
SCK0
SO0
SI0
CS0
EXTAL
XTAL
Vss
RST
MP
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PD0
PD1
PD2
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CXP87400
EPROM Read Timing (Ta = –20 to +75°C, VDD = 3.0 to 5.5V, Vss = 0V)
Item
Symbol
Pin
Min.
Address → data
input delay time
tACC
A0 to A15
D0 to D7
Address → data
hold time
tIH
A0 to A15
D0 to D7
Max.
100*1
75*2
0
Unit
ns
ns
*1 At 12MHz operation (VDD = 4.5 to 5.5V)
*2 At 12MHz operation (VDD = 3.0 to 5.5V), At 16MHz operation (VDD = 4.5 to 5.5V)
0.8VDD
A0 to A15
Address data
0.2VDD
tACC
tIH
0.8VDD
D0 to D7
Input data
0.2VDD
Products List
Products
Option item
Mask product
CXP87452
Package
ROM capacity
CXP87460
Piggyback/evaluator product
CXP87400-U01Q
CXP87400-U01R
100-pin plastic
QFP/LQFP
CXP87400-U02Q
CXP87400-U03R
CXP87400-U02R
100-pin ceramic
PQFP
EPROM 60Kbytes
52Kbytes
60Kbytes
27C512 × 1
27C512 × 1
Pull-up resistor
for reset pin
Existent/Non-existent
Existent
Power on reset circuit
Existent/Non-existent
Existent
General-purpose
prescaler oscillation
circuit
Input circuit format*3
27C256 × 2
Existent/Non-existent
Non-existent
Existent
Non-existent
CMOS schmitt/TTL schmitt
CMOS schmitt
TTL schmitt
CMOS schmitt
*3 On PG4/SYNC0 pin and PG5/SYNC1 pin, the input circuit format can be selected to every pin.
–6–
CXP87400
Piggyback mode/evaluator mode can be switched as shown below.
Piggyback mode
Evaluator mode
Piggyback/evaluator product
Pin 1 marking
LCC type EPROM
Pin 1 marking
Pin 1 index
Note)
CPU probe
(27C512 only)
EPROM adaptor
Pin 1 marking
Pin 1 index
Note) Evaluation cap should be
connected to CPU probe.
U01R and U02R used
CPU probe for LQFP
LCC type EPROM
for low voltage
Pin 1 marking
For lower address
EPROM adaptor
Pin 1 marking
U03R used
For upper address
(27C256 only)
Lower address
Upper address
–7–
Address
Memory space
EPROM (27C256)
Lower
1000H to 7FFFH
1000H to 7FFFH
Upper
8000H to FFFFH
0000H to 7FFFH
CXP87400
Package Outline
Unit: mm
100PIN PQFP (CERAMIC)
18.7
PIN NO. 1 INDEX
16.3 ± 0.2
INDEX
100
81
81
80
PIN No. 1 INDEX
1
80
0.65 ± 0.05
1
100
0.3 ± 0.08
14.22
18.12 ± 0.2
1.27 ± 0.13
12.02
30
0.7
1.0
0.3
6.0
24.7
22.3 ± 0.25
4.5
51
31
1.3 ± 0.3
51
50
9.48
11.66
30
50
31
0.45
15.58 ± 0.2
PACKAGE STRUCTURE
PACKAGE MATERIAL
PQFP-100C-L01
LEAD TREATMENT
GOLD PLATING
EIAJ CODE
AQFP100-C-0000-A
LEAD MATERIAL
42 ALLOY
PACKAGE WEIGHT
5.7g
10.44 MAX
+ 0.05
0.15 – 0.02
0.50 ± 0.25
JEDEC CODE
3.57 ± 0.36
CERAMIC
SONY CODE
100PIN PQFP (CERAMIC)
16.0 ± 0.4
12.4
14.0 ± 0.2
75
51
76
0.5 ± 0.05
+ 0.08
0.18 – 0.03
1.5
3.2 ± 0.2
0.5 ± 0.05
12.0 ± 0.15
+ 0.08
0.18 – 0.03
0.8 ± 0.2
26
100
1
INDEX
12.0 ± 0.15
50
25
12.8 ± 0.2
INDEX
6.9
+ 0.15
0.2 – 0.13
+ 0.05
0.127 – 0.02
3.32
PACKAGE STRUCTURE
PACKAGE MATERIAL
CERAMIC
SONY CODE
PQFP-100C-L02
LEAD TREATMENT
GOLD PLATING
EIAJ CODE
AQFP100-C-1414-A
LEAD MATERIAL
42 ALLOY
PACKAGE WEIGHT
2.2g
JEDEC CODE
–8–