CXP88800 CMOS 8-bit Single Chip Microcomputer Description The CXP88800 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP88616/88624, CXP88732/88740/88748 and CXP88852/88860. Piggyback/ evaluator type 100 pin QFP (Ceramic) Features • A wide instruction set (213 instructions) which cover various types of data. — 16-bit operation/multiplication and division/ boolean bit operation instructions • Minimum instruction cycle 250ns at 16MHz operation 122µs at 32kHz operation • Applicable EPROM LCC type 27C512 (Maximum capacity : 60K bytes for option1, 32K bytes for option2) • Incorporated RAM capacity 1600 bytes • Peripheral functions — A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 20.0µs/16MHz) — Serial interface Incorporated 8-bit and 8-stage FIFO (auto transfer for 1 to 8 bytes), 1 channel 8-bit clock synchronous type, 1 channel — Timer 8-bit timer, 8-bit timer/counter, 2 channels 19-bit time base timer, 32kHz timer/counter — High precision timing pattern generator PPG 19-pin, 32-stage programmable, RTG 5 pins, 2 channels 5-bit, 8-stage FIFO (RECCTL control), 1 channel — PWM/DA gate output PWM output 12 bits 2 channels (Repetitive frequency 62.5kHz/16MHz) DA gate pulse output 13 bits, 2 channels — Analog signal input circuit Capstan FG amplifier circuit Drum FG amplifier circuit Drum PG amplifer circuit PBCTL amplifier circuit — CTL write/rewrite circuit Recording current control circuit — Servo input control Capstan FG, drum FG/PG, CTL input — VSYNC separator — FRC capture unit Incorporated 26-bit and 8-stage FIFO — PWM output 14 bits, 1 channel — VISS/VASS circuit Pulse duty auto detection circuit — Remote control receiving circuit 8-bit pulse measurement counter with on-chip, 6-stage FIFO — Tri-state output PPG output 1 pin, output 8 pins — Psendo HSYNC output function — High-speed head switching circuit • Interruption 20 factors, 15 vectors, multi-interruption possible • Standby mode SLEEP/STOP • Package 100-pin ceramic QFP Note) Mask option depends on the type of the CXP88800. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E96106-ST CXP88800 PE4/EXI0 PE3/SYNC PE2/SI1 PE1/SO1 PE0/SCK1 TEX TX VDD VSS NC PA7/PPO7 PA6/PPO6 PA5/PPO5 PA4/PPO4 PA3/PPO3 PA2/PPO2 PA1/PPO1 PA0/PPO0/HGO PB7/PPO15 PB6/PPO14 Pin Assignment in Piggyback Mode 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 78 PE7/PWM1/DAA1 4 77 CFG PB1/PPO9 5 76 DFG PB0/PPO8 6 75 DPG PC7/RTO7 7 74 VREFOUT PC6/RTO6 8 PC5/RTO5 9 PC4/RTO4 10 PC3/RTO3 11 PC2/PPO18 12 PC1/PPO17 13 PC0/PPO16 14 PI7 15 PI6 16 PI5 17 PI4 18 PI3 19 PI2 20 PB2/PPO10 4 A6 2 3 A13 3 A14 PE6/PWM0/DAA0 PB3/PPO11 VDD 79 NC PE5/EXI1 2 A15 80 PB4/PPO12 A12 1 A7 PB5/PPO13 29 5 6 A5 A4 28 27 7 A3 A2 CTLFAMPO A8 CTLAG A9 69 CTLAMP (+) 68 CTLAMP (–) 67 CTLCIN (–) 66 CTLCIN (+) 65 RECCTL (+) 64 RECCTL (–) NC OE 25 9 CTLSAMPI 71 A11 26 8 AMPVSS 72 70 32 31 30 1 73 A1 10 24 A10 A0 11 23 CE NC 12 22 D7 D0 13 21 D6 63 AMPVDD 62 RECCAP 61 VDD 60 AN0/ANOUT 59 AN1 58 AN2 57 AN3 25 56 PF0/AN4 PD4/CS0 26 55 PF1/AN5 PD3/TO/DDO/ADJ/SRVO 27 54 AVDD PD2/PWM 28 53 AVREF PD1/RMC 29 52 AVSS PD0/INT1/NMI 30 51 PF2/AN6 24 PD5/SCK0 D5 PD6/SO0 D4 23 D3 PD7/SI0 NC 22 GND PI0/INT0/ENV-DET D2 21 D1 PI1/EC/INT2 14 15 16 17 18 19 20 PF3/AN7 PF4/AN8 PF5/AN9 PF6/AN10 PF7/AN11 PG0/AN12 PG1/AN13 EXTAL XTAL VSS RST MP PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Note) 1. NC (Pin 90) is always connected to VDD. 2. VDD (Pins 61 and 89) are both connected to VDD. 3. VSS (Pins 41 and 88) are both connected to GND. 4. MP (Pin 39) is always connected to GND. –2– CXP88800 PE4/EXI0 PE3/SYNC PE2/SI1 PE1/SO1 PE0/SCK1 TEX TX VDD VSS NC PA7/PPO7 PA6/PPO6 PA5/PPO5 PA4/PPO4 PA3/PPO3 PA2/PPO2 PA1/PPO1 PA0/PPO0/HGO PB7PPO15 PB6/PPO14 Pin Assignment in Evaluator Mode 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 3 78 PE7/PWM1/DAA1 4 77 CFG PB1/PPO9 5 76 DFG PB0/PPO8 6 75 DPG PC7/RTO7 7 74 VREFOUT PC6/RTO6 8 PC5/RTO5 9 PC4/RTO4 10 PC3/RTO3 11 PC2/PPO18 12 PC1/PPO17 13 PC0/PPO16 14 PI7 15 PI6 16 PI5 17 PI4 18 PI3 19 PI2 20 A12 PB2/PPO10 A6/D6 2 3 4 A13 PE6/PWM0/DAA0 PB3/PPO11 A14 79 VDD PE5/EXI1 2 NC 80 PB4/PPO12 A15 1 A7/D7 PB5/PPO13 29 6 A5/D5 A4/D4 28 27 7 A3/D3 A2/D2 CTLSAMPI 71 CTLFAMPO A8 CTLAG A9 69 CTLAMP (+) 68 CTLAMP (–) 67 CTLCIN (–) 66 CTLCIN (+) 65 RECCTL (+) 64 RECCTL (–) A11 NC 26 8 AMPVSS 72 70 1 32 31 30 5 73 9 25 HALT A1/D1 10 24 A10 A0/D0 11 23 E/P NC 12 22 I/T RD 13 21 MON 63 AMPVDD 62 RECCAP 61 VDD 60 AN0/ANOUT 22 59 AN1 PD7/SI0 23 58 AN2 PD6/SO0 24 57 AN3 PD5/SCK0 25 56 PF0/AN4 PD4/CS0 26 55 PF1/AN5 PD3/TO/DDO/ADJ/SRVO 27 54 AVDD PD2/PWM 28 53 AVREF PD1/RMC 29 52 AVSS PD0/INT1/NMI 30 51 PF2/AN6 RST C1 C2 NC GND PI0/INT0/ENV-DET SYNC 21 WR PI1/EC/INT2 14 15 16 17 18 19 20 PE3/AN7 PE4/AN8 PE5/AN9 PF6/AN10 PF7/AN11 PG0/AN12 PG1/AN13 EXTAL XTAL VSS RST MP PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Note) 1. NC (Pin 90) is always connected to VDD. 2. VDD (Pins 61 and 89) are both connected to VDD. 3. VSS (Pins 41 and 88) are both connected to GND. 4. MP (Pin 39) is always connected to GND. –3– CXP88800 EPROM Read Timing (Ta=–20 to +75°C, VDD=4.5 to 5.5V, VSS=0V) Item Symbol Pin Min. Address → data input delay time tACC A0 to A15 D0 to D7 Address → data hold time tIH A0 to A15 D0 to D7 Max. Unit 75 ns 0 ns 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD D0 to D7 Input data 0.2VDD Product List Products Piggyback/evaluator product Mask product Option item CXP CXP CXP CXP CXP CXP CXP 88616 88624 88732 88740 88748 88852 88860 Package ROM capacity 24K bytes Reset pin pull-up resistor Input circuit format∗1 Power-on reset circuit Existent/ Non-existent 32K bytes 40K bytes 48K bytes CXP88800 -U02Q 100-pin ceramic QFP 100-pin plastic QFP 16K bytes CXP88800 -U01Q 52K bytes 60K bytes EPROM 60K bytes EPROM 32K bytes 27C512 used Existent/Non-existent Existent CMOS schmitt/TTL schmitt TTL schmitt Non-existent ∗1) The input circuit format can be selected for PE3/SYNC. –4– Non-existent Existent CXP88800 Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking LCC type EPROM Pin 1 marking Pin 1 index Note) CPU probe Note) Evaluation cap should be connected to CPU probe. –5– CXP88800 Package Outline Unit: mm 100PIN PQFP (CERAMIC) 18.7 PIN NO. 1 INDEX 16.3 ± 0.2 INDEX 100 81 81 80 PIN No. 1 INDEX 1 80 0.65 ± 0.05 1 100 0.3 ± 0.08 14.22 18.12 ± 0.2 1.27 ± 0.13 12.02 0.7 1.0 0.3 6.0 30 51 1.3 ± 0.3 51 31 50 9.48 11.66 30 50 31 0.45 15.58 ± 0.2 PACKAGE STRUCTURE PACKAGE MATERIAL + 0.05 0.15 – 0.02 10.44 MAX –6– CERAMIC SONY CODE PQFP-100C-L01 LEAD TREATMENT GOLD PLATING EIAJ CODE AQFP100-C-0000-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 5.7g JEDEC CODE 0.50 ± 0.25 3.57 ± 0.36 24.7 22.3 ± 0.25 4.5