ILX511 2048-pixel CCD Linear Image Sensor (B/W) For the availability of this product, please contact the sales office. Description The ILX511 is a rectangular reduction type CCD linear image sensor designed for bar code POS hand scanner and optical measuring equipment use. A built-in timing generator and clock-drivers ensure single 5 V power supply for easy use. Single 5 V power supply Ultra-high sensitivity Built-in timing generator and clock-drivers Built-in sample-and-hold circuit Maximum clock frequency: 2MHz 11 φROG Readout gate pulse generator 19 NC 4 Mode selector Clock-drivers Readout gate Internal Structure Output amplifier S/H circuit VOUT 1 SHSW GND 13 14 15 22 VDD 12 GND 10 13 NC 5 NC 10 φCLK 14 NC VDD 9 NC VDD VDD NC 15 VDD 8 GND NC AA GND 16 GND 9 7 8 NC 7 17 GND 6 6 3 VDD VGG 2 18 Clock plse generator/ Sample-and-hold pulse generator 5 VGG 18 φCLK CCD analog shift register 19 GND 16 4 17 SHSW 20 VDD 21 20 2048 12 GND NC NC VDD 3 GND GND GND VDD VDD 21 VDD 2 D13 D14 VDD D32 S1 S2 S3 22 1 GND φROG 11 D34 1 S2046 S2047 S2048 D33 Pin Configuration (Top View) VOUT V °C °C D36 • Operating temperature • Storage temperature 6 –10 to +60 –30 to +80 D35 Absolute Maximum Ratings • Supply voltage VDD Block Diagram D38 • • • • • 2048 pixels 14 µm × 200 µm (14 µm pitch) D37 Features • Number of effective pixels: • Pixel size: 22 pin DIP (Plastic) Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E94108-TE ILX511 Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Symbol VOUT GND GND SHSW φ CLK VDD NC NC VDD NC φ ROG GND NC NC VDD GND GND VGG GND VDD VDD VDD Description Signal output GND GND Switch (with S/H or without S/H) Clock pulse input 5V power supply NC NC 5V power supply NC Readout gate pulse input GND NC NC 5V power supply GND GND Output circuit gate bias GND 5V power supply 5V power supply 5V power supply Mode Description Mode in Use With S/H Without S/H Pin 4 (SHSW) GND VDD Recommended Voltage Item VDD Min. 4.5 Typ. 5.0 Max. 5.5 Unit V Input Clock Voltage Condition (Note) Item VIH VIL Min. 4.5 0 Typ. 5.0 — Max. 5.5 0.5 Unit V V Note) This is applied to the all pulses applied externally. (φ CLK, φ ROG) Item Input capacity of φ CLK pin Symbol Cφ CLK —2— Min. — Typ. 10 Max. — Unit pF ILX511 Electro-optical Characteristics (Ta = 25 °C, VDD = 5 V, Clock frequency: 1 MHz, Light source = 3200 K, IR cut filter: CM-500S (t = 1.0 mm), Without S/H mode) Item Sensitivity 1 Sensitivity 2 Sensitivity nonuniformity Saturation output voltage Dark voltage average Dark signal nonuniformity Image lag Dynamic range Saturation exposure 5 V current consumption Total transfer efficiency Output impedance Offset level Symbol Min. Typ. Max. R1 R2 PRNU VSAT VDRK DSNU IL DR SE I VDD TTE ZO VOS 150 — — 0.6 — — — — — — 92.0 — — 200 1800 5.0 0.8 3.0 6.0 1 267 0.004 5.0 98.0 250 2.8 250 — 10.0 — 6.0 12.0 — — — 10.0 — — — Unit V/(lx • s) V/(lx • s) % V mV mV % — lx • s mA % Ω V Remarks Note 1 Note 2 Note 3 — Note 4 Note 4 Note 5 Note 6 Note 7 — — — Note 8 Note) 1. For the sensitivity test light is applied with a uniform intensity of illumination. 2. Light source: LED λ = 660nm 3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 1. PRNU = 4. 5. 6. 7. 8. (VMAX-VMIN)/2 × 100 (%) VAVE The maximum output of all the valid pixels is set to VMAX, the minimum output to VMIN and the average output to VAVE. Integration time is 10ms. Typical value is used for clock pulse and readout pulse. VOUT = 500 mV. DR = VSAT/VDRK. When optical integration time is shorter, the dynamic range sets wider because dark voltage is in proportion to optical integration time. SE = VSAT/R1 Vos is defined as indicated below. D30 D31 VOUT Vos AAAAAAA AAAA D32 GND —3— S1 VOUT ∗ φCLK 0 5 D11 D10 D4 D5 Dummy signal (32 pixels) 1 D1 0 2 5 3 D3 D2 φROG D30 D13 D14 —4— S2047 S2045 S2046 S2 S3 Effective picture elements signal (2048 pixels) S4 S1 D31 D32 2088 or more clock pulses are required. ∗ Without S/H mode (4pin Æ VDD) 1-line output period (2086 pixels) Optical black (18 pixels) D37 D35 D36 D34 Dummy signal (6 pixels) 2086 D38 Clock Timing Diagram (Without S/H mode) ILX511 1 D33 S2048 D12 VOUT φCLK 0 5 1 D0 0 2 D10 D9 D4 D5 D3 —5— D30 D12 D13 S2047 S2045 S4 S2 Effective picture elements signal (2048 pixels) S3 S1 D31 D32 1-line output period (2087 pixels) Optical black (18 pixels) S2046 D11 2088 or more clock pulses are required. Dummy signal (33 pixels) D1 φROG 3 D2 5 2086 D36 D34 D35 D33 Dummy signal (6 pixels) D37 0 Clock Timing Diagram (With S/H mode) ILX511 1 D38 S2048 ILX511 φ CLK Timing (For all modes) t1 t2 φCLK t4 t3 Item φ CLK pulse rise/fall time φ CLK pulse duty (Note 1) Symbol t1, t2 — Min. 0 40 Typ. 10 50 Max. 100 60 Unit ns % Typ. 3000 3000 10 5000 Max. — — — — Unit Note 1) 100 × t4 / (t3 + t4) φ ROG, φ CLK Timing φROG t6 t7 t8 φCLK t9 t5 Item φ ROG, φ CLK pulse timing 1 φ ROG, φ CLK pulse timing 2 φ ROG pulse rise/fall time φ ROG pulse period Symbol t5 t9 t6, t8 t7 —6— Min. 0 1000 0 3000 ns ILX511 φ CLK, VOUT Timing (Note 1) (Note 3) φCLK t10 Vout ∗ Vout (Note 2) t11 AAAA AAAA AAAA AAAA t12 Item φ CLK-VOUT 1 φ CLK-VOUT 2 φ CLK-VOUT∗ (with S/H) Note 1) Note 2) Note 3) Symbol t10 t11 t12 Min. 40 55 10 Typ. 115 120 165 fck = 1MHz, φ CLK pulse duty = 50 %, φ CLK pulse rise/fall time = 10 ns Output waveform when internal S/H is in use. indicates the correspondence of clock pulse and data period. • —7— Max. 280 205 240 Unit ns ILX511 Spectral sensitivity (Typ.) (Ta = 25°C) 1.0 Relative sensitivity 0.8 0.6 0.4 0.2 0 400 500 600 700 800 900 1000 Wavelength (nm) Dark voltage rate vs. Ambient temperature (Typ.) MTF of main scanning direction (Typ.) 0 Spatial frequency (cycles/mm) 7.1 14.3 21.4 28.6 35.7 1.0 10.0 Dark voltage rate H–MTF 0.8 0.6 0.4 1.00 0.2 0 0.10 0 0.2 0.4 0.6 0.8 1 0 Normalized spatial frequency τ=560nm 10 20 30 40 Ta–Ambient temperature (°C) —8— 50 60 ILX511 Current consumption rate vs. Clock frequency (Typ.) Output voltage rate vs. Integration time (Typ.) 2.0 1.5 Current consumption rate Output voltag rate 5 1 1.0 0.5 0.1 0 1 10 50 0 τ int–Integration time (ms) Offset level vs. VDD (Typ.) 1.5 2.0 Offset level vs. Ambient temperature (Typ.) 3.2 3.0 3.0 VOS–Offset level (V) VOS–Offset level (V) 1.0 Clock frequency (MHz) 3.2 2.8 2.6 2.4 4.5 0.5 2.8 2.6 2.4 4.75 5 5.25 5.5 0 VDD (V) 20 40 Ta–Ambient temperature (°C) —9— 60 ILX511 Application Circuit (Without S/H mode (Note)) 10µ/16V 5V + VDD NC NC VDD NC fROG 2 3 4 5 6 7 8 9 10 11 GND GND NC 1 NC GND VDD 12 VGG 13 fCLK 14 GND 15 SHSW 16 VDD 17 GND 18 VDD 19 GND 20 VDD 21 VOUT 22 Output signal + 3KΩ 2SA1175 φCLK φROG 0.01µ 22µ/10V Note) This circuit diagram is the case when internal S/H is not used. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other right due to same. —10— ILX511 Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling, be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates use cartons treated for the prevention of static charges. 2) Notes on handling CCD Cer-DIP package The following points should be observed when handling and installing this package. a) (1) Compressive strength: 39N/surface (Do not apply any load more than 0.7 mm inside the outer perimeter of the glass portion.) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm Upper ceramic layer Lower ceramic layer 39N (1) Low-melting glass 29N 29N (2) (3) 0.9Nm (4) b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) Be aware that any of the following can cause the glass to crack because the upper and lower ceramic layers are shielded by low-melting glass. (1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with a soldering iron. (3) Rapid cooling or heating. (4) Applying a load or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. (5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3) Soldering a) Make sure the package temperature does not exceed 80 °C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount image sensors, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. —11— ILX511 4) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface blow it off with an air blower. (For dirt stuck through static electricity, ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks. 7) Make sure the input pulse should not be -1 V or below. 8) Normal output signal is not obtained immediately after device switch on. Use the output signal added 22500 pulses or above to φ CLK clock pulse. —12— ILX511 Package Outline Unit : mm 41.6 ± 0.5 28.672 (14µm × 2048Pixels) 6.46 ± 0.8 No.1 Pixel H 1 40.2 0.25 V (AT STAND OFF) 10.16 12 9.0 10.0 ± 0.5 22 5.0 ± 0.5 0° to 9° 22pin DIP (400mil) 11 1. The height from the bottom to the sensor surface is 2.45 ± 0.3mm. 2.54 0.51 3.65 4.45 ± 0.5 4.0 ± 0.5 2. The thickness of the cover glass is 0.8mm, and the refractive index is 1.5. 0.3 M PACKAGE STRUCTURE PACKAGE MATERIAL Cer-DIP LEAD TREATMENT TIN PLATING LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 5.2g —13—