SUPERTEX 2N7008

2N7008
N-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BVDSS /
BVDGS
RDS(ON)
(max)
ID(ON)
(min)
60V
7.5Ω
500mA
Order Number / Package
TO-92
2N7008
Features
Advanced DMOS Technology
■ Free from secondary breakdown
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
■ Low power drive requirement
■ Ease of paralleling
■ Low CISS and fast switching speeds
■ Excellent thermal stability
■ Integral Source-Drain diode
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
■ High input impedance and high gain
■ Complementary N- and P-channel devices
Applications
■ Motor controls
Package Options
■ Converters
■ Amplifiers
■ Switches
■ Power supply circuits
■ Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Absolute Maximum Ratings
Drain-to-Source Voltage
BVDSS
Drain-to-Gate Voltage
BVDGS
Gate-to-Source Voltage
± 30V
Operating and Storage Temperature
Soldering Temperature*
SGD
TO-92
-55°C to +150°C
300°C
* Distance of 1.6 mm from case for 10 seconds.
Note: See Package Outline section for dimensions.
7-15
2N7008
Thermal Characteristics
Package
ID (continuous)*
ID (pulsed)
Power Dissipation
@ TC = 25°C
θjc
°C/W
θja
°C/W
IDR*
IDRM
230mA
1.3A
1W
125
170
230mA
1.3A
TO-92
* ID (continuous) is limited by max rated Tj.
Electrical Characteristics (@ 25°C unless otherwise specified)
Parameter
Min
BVDSS
Drain-to-Source Breakdown Voltage
60
VGS(th)
Gate Threshold Voltage
1
IGSS
Gate Body Leakage
IDSS
Zero Gate Voltage Drain Current
ID(ON)
ON-State Drain Current
RDS(ON)
Static Drain-to-Source ON-State Resistance
Typ
Max
Unit
Conditions
V
ID = -10µA, VGS = 0V
2.5
V
VGS = VDS, ID = 250µA
100
nA
VGS = ±30V, VDS = 0V
1
µA
VGS = 0V, VDS = 50V
500
µA
VGS = 0V, VDS = 50V
TA = 125°C
mA
VGS = 10V, VDS ≥ 2VDS(ON)
500
7.5
7.5
GFS
Forward Transconductance
CISS
Input Capacitance
50
COSS
Common Source Output Capacitance
25
CRSS
Reverse Transfer Capacitance
5
t(ON)
Turn-ON Time
20
t(OFF)
Turn-OFF Time
20
VSD
Diode Forward Voltage Drop
1.5
VGS = 5V, ID = 50mA
Ω
80
m
VGS = 10V, ID = 500mA
Ω
Symbol
VDS = 10V, ID = 0.2A
pF
VGS = 0V, VDS = 25V
f = 1 MHz
ns
VDD = 30V, ID =200 mA,
RGEN = 25Ω
V
ISD = 150mA, VGS = 0V
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
VDD
RL
10V
90%
PULSE
GENERATOR
INPUT
0V
10%
t(ON)
td(ON)
Rgen
t(OFF)
tr
td(OFF)
OUTPUT
tF
D.U.T.
VDD
10%
INPUT
10%
OUTPUT
0V
90%
90%
7-16