EVALUATION KIT AVAILABLE 1 TC660 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER 2 FEATURES GENERAL DESCRIPTION ■ ■ ■ ■ ■ ■ The TC660 DC-to-DC voltage converter generates a negative voltage supply, that can support a 100mA maximum load, from a positive voltage input of 1.5V to 5.5V. Only two external capacitors are required. Power supply voltage is stored on an undedicated capacitor then inverted and transferred to an output reservoir capacitor. The on-board oscillator normally runs at a frequency of 10kHz with V+ at 5V. This frequency can be lowered by the addition of an external capacitor from OSC (pin 7) to ground, or raised to 90kHz by connecting the frequency control pin (FC) to V+, in order to optimize capacitor size, quiescent current, and output voltage ripple frequency. Operation using input voltage between 1.5V and 3.0V is accommodated by grounding the LV input (pin 6). Operation at higher input voltages (3.0V to 5.5V) is accomplished by leaving LV open. The TC660 open circuit output voltage is within 0.1% of the input voltage with the output open-circuited. Power conversion efficiency is 98% when output load is between 2mA and 5mA. ■ ■ Pin Compatible with TC7660 High Output Current ..................................... 100mA Converts (+1.5V to 5.5V) to (– 1.5V to – 5.5V) Power Efficiency @100mA ......................... 88% typ Low Power Consumption ................200µA @ 5 VIN Low Cost and Easy to Use — Only Two External Capacitors Required Selectable Oscillator Frequency ....... 10kHz/90kHz ESD Protection ................................................... 4kV APPLICATIONS ■ ■ ■ ■ Laptop Computers µP Based Controllers Process Instrumentation Automotive Instruments PIN CONFIGURATION (DIP and SOIC) 8 V+ FC 1 CAP + 2 7 OSC GND 3 TC660CPA 6 LV CAP – 4 CAP + 2 GND 3 TC660EPA 5 VOUT CAP – 4 ORDERING INFORMATION 8 V+ FC 1 7 OSC TC660COA 6 LV TC660EOA 5 VOUT Part No. Package TC660COA 8-Pin SOIC 0°C to +70°C TC660CPA 8-Pin Plastic DIP 0°C to +70°C TC660EOA 8-Pin SOIC – 40°C to +85°C TC660EPA 8-Pin Plastic DIP – 40°C to +85°C TC7660EV Evaluation Kit for Charge Pump Family FUNCTIONAL BLOCK DIAGRAM Temp. Range 3 4 5 6 V + CAP + 8 FC OSC LV 2 1 7 RC OSCILLATOR ÷2 VOLTAGE– LEVEL TRANSLATOR 4 CAP – 7 6 5 VOUT INTERNAL VOLTAGE REGULATOR LOGIC NETWORK TC660 8 3 GND TC660-2 9/10/96 TELCOM SEMICONDUCTOR, INC. 4-5 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660 ABSOLUTE MAXIMUM RATINGS* Supply Voltage ........................................................... +6V LV, FC, OSC Input Voltage (Note 1) ....................... VOUT – 0.3V to (V+ +0.3V) Current Into LV (Note 1) ...................... 20 µA for V+ >3.5V Output Short Duration (VSUPPLY ≤ 5.5V) (Note 3) .. 10 Sec Power Dissipation (Note 2) (TA ≤ 70°C) SOIC ............................................................... 470mW Plastic DIP ......................................................730mW Operating Temperature Range C Suffix .................................................. 0°C to +70°C E Suffix ............................................. – 40°C to +85°C Storage Temperature Range ................ – 65°C to +150°C Lead Temperature (Soldering, 10 sec) ................. +300°C *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: Specifications Measured Over Operating Temperature Range With, V+ = 5V, COSC = Open, C1, C2 = 150µF, FC = Open, Test Circuit (Figure 1), unless otherwise indicated. Symbol Parameter I+ Supply Current V+ Supply Voltage Range ROUT IOUT FOSC Output Source Resistance Output Current Oscillator Frequency IOSC Input Current PEFF Power Efficiency (Note 4) VOUT EFF Voltage Conversion Efficiency Test Conditions Min Typ Max Unit RL = ∞ FC pin = OPEN or GND FC pin = V+ LV = HIGH, RL = 1 kΩ LV = GND, RL = 1 kΩ LV = OUT, RL = 1 kΩ (Figure 9) IOUT = 100mA VOUT < – 4V Pin 7 open; Pin 1 open or GND Pin 1 = V+ Pin 1 open Pin 1 = V+ RL = 1 kΩ connected between V+ & VOUT RL = 500Ω connected between VOUT & GND IL = 100mA to GND RL = ∞ — — 3 1.5 2.5 — 100 — — — — 96 92 — 99 200 1 — — — 6.5 — 10 90 +1.1 +5 98 96 88 99.9 500 3 5.5 5.5 5.5 10 — — — — — — — — — µA mA V Ω mA kHz µA % % V+ NOTES: 1. Connecting any input terminal to voltages greater than or less than GND may cause destructive latch-up. It is recommended that no inputs from sources operating from external supplies be applied prior to "power up" of the TC660. 2. Derate linearly above 50°C by 5.5 mW/°C. 3. To prevent damaging the device, do not short VOUT to V+. 4. To maximize output voltage and efficiency performance, use low ESR capacitors for C1 and C2. 4-6 TELCOM SEMICONDUCTOR, INC. 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER 1 TC660 TYPICAL CHARACTERISTICS All curves are generated using the test circuit of Figure 1 with V+ = 5V, LV = GND, FC = open, and TA = +25°C, unless otherwise noted. Supply Current vs. Supply Voltage 1) 2) 600 3) Supply Current vs. Oscillator Frequency 10,000 300 200 LV = OPEN 100 1000 100 INVERTING MODE 10 V+ = 5.5V 92 DOUBLER MODE EFFICIENCY (%) 400 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) DOUBLER MODE LV = OUT Efficiency vs. Load Current 100 500 3 84 V+ = 3.5V 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) V+ = 2.5V 68 5) Output Voltage Drop vs. Load Current 4) 1 0.01 0.1 1 10 OSCILLATOR FREQUENCY (kHz) 5.0 5.5 60 100 Output Voltage vs. Oscillator Frequency 100 V+ = 1.5V 0.8 V+ = 4.5V V+ = 2.5V 0.4 ILOAD = 10mA -4.5 ILOAD = 1mA ILOAD = 80mA -4.0 -3.5 POWER EFFICIENCY (%) 1.2 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE DROP FROM SUPPLY VOLTAGE (V) V+ = 3.5V 0 20 40 60 80 LOAD CURRENT (mA) 100 Output Source Resistance vs. Supply Voltage 7) 9 6 3 OUTPUT SOURCE RESISTANCE (Ω) OUTPUT SOURCE RESISTANCE (Ω) 12 Output Source Resistance vs. Temperature 8) 15 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) TELCOM SEMICONDUCTOR, INC. 100 84 ILOAD = 80mA 80 76 72 68 ILOAD = 1mA 0.1 0.2 0.4 1 2 4 10 20 40 OSCILLATOR FREQUENCY (kHz) 100 6 Oscillator Frequency vs. Supply Voltage 9) 12 16 V+ = 1.5VDC 14 12 10 V+ = 3VDC 8 6 V+ = 5VDC 4 -40 4 5 88 60 OSCILLATOR FREQUENCY (kHz) 0 -3.0 0.1 0.2 0.4 1 2 4 10 20 40 OSCILLATOR FREQUENCY (kHz) 100 92 64 V+ = 5.5V 20 40 60 80 LOAD CURRENT (mA) ILOAD = 10mA 96 1.6 V+ = 1.5V 0 Efficiency vs. Oscillator Frequency 6) -5.0 2.0 V+ = 4.5V 76 LV = GND 0 1.5 2.0 2 -20 0 20 40 TEMPERATURE (°C) 60 80 100 LV GROUNDED 10 8 7 LV OPEN 6 FC = OPEN, OSC = OPEN 4 2 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 4-7 8 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660 TYPICAL CHARACTERISTICS (Cont.) Oscillator Frequency vs. Supply Voltage 11) 100 LV OPEN 60 FC = V+, OSC = OPEN 20 OSCILATOR FREQUENCY (kHz) OSCILLATOR FREQUENCY (kHz) 80 40 10 8 6 4 FC= OPEN, OSC = OPEN 2 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) Oscillator Frequency vs. External Capacitance 13) 100 12 LV GROUNDED 0 -40 14) -20 0 20 40 60 TEMPERATURE (°C) 80 80 60 40 0 -40 100 FC = V+, OSC = OPEN 20 -20 20 40 60 0 TEMPERATURE (°C) 80 100 TC7660 and TC660 Output Voltage and Power Efficiency vs. Load Current, V+ = 5V -3.0 100 Oscillator Frequency vs. Temperature 12) Oscillator Frequency vs. Temperature OSCILLATOR FREQENCY (kHz) 10) 100 TC7660 1 FC = OPEN 0.1 0.01 OUTPUT VOLTAGE (V) -3.4 10 92 TC660 EFF -3.8 VOUT -4.2 TC660 -4.6 5 10 20 100 500 2000 10000 CAPACITANCE (pF) 76 68 -5.0 1 2 84 0 2.0 TC7660 40 60 80 LOAD CURRENT (mA) POWER EFFICIENCY (%) OSCILLATOR FREQUENCY (kHz) FC = V+ 60 100 PIN DESCRIPTION 4-8 Pin No. Symbol 1 FC 2 3 4 5 6 CAP+ GND CAP– VOUT LV 7 OSC 8 V+ Description Internal Oscillator frequency control. f ≈ 10 kHz when FC ≈ OPEN; ≈ 90 kHz when FC = V+. FC has no effect if OSC is overdriven. External capacitor, + terminal Power-Supply Ground (Inverter) or Positive Input (Doubler) External capacitor, – terminal Negative Voltage output (Inverter) or Ground (Doubler) "Low-Voltage" pin. Connect to GND Pin for inverter operation when VIN < 3V; leave open or GND above 3V. When overdriving OSC, connect to GND. For external control of internal OSC. Connect ext. C from OSC to GND (close to pkg.) to reduce frequency of oscillator Positive Voltage Input (Inverter) or Output (Doubler) TELCOM SEMICONDUCTOR, INC. 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER 1 TC660 Circuit Description The TC660 contains all the necessary circuitry to complete a voltage inverter (Figure 1), with the exception of two external capacitors, which may be inexpensive 150µF polarized electrolytic capacitors. Operation is best understood by considering Figure 2, which shows an idealized voltage inverter. Capacitor C1 is charged to a voltage V+ for the half cycle when switches S1 and S3 are closed. (Note: Switches S2 and S4 are open during this half cycle.) During the second half cycle of operation, switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 negatively by V+ volts. Charge is then transferred from C1 to C2, such that the voltage on C2 is exactly V+, assuming ideal switches and no load on C2. The four switches in Figure 2 are MOS power switches; S1 is a P-channel device, and S2, S3 and S4 are N-channel devices. The main difficulty with this approach is that in integrating the switches, the substrates of S3 and S4 must always remain reverse-biased with respect to their sources, but not so much as to degrade their ON resistances. In addition, at circuit start-up, and under output short circuit conditions (VOUT = V+), the output voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this would result in high power losses and possible device latch-up. This problem is eliminated in the TC660 by a logic network which senses the output voltage (VOUT) together with the level translators, and switches the substrates of S3 and S4 to the correct level to maintain necessary reverse bias. To improve low-voltage operation, the “LV” pin should be connected to GND, disabling the internal regulator. For supply voltages greater than 3.0V, the LV terminal should be left open to ensure latch-up-proof operation and prevent device damage. S1 2 S2 V+ C1 S3 C2 S4 VOUT = – VIN 3 GND Figure 2. Idealized Switched Capacitor 4 Theoretical Power Efficiency Considerations In theory, a voltage multiplier can approach 100% efficiency if certain conditions are met: (1) The drive circuitry consumes minimal power. (2) The output switches have extremely low ON resistance and virtually no offset. (3) The impedances of the pump and reservoir capacitors are negligible at the pump frequency. The TC660 approaches these conditions for negative voltage multiplication if large values of C1 and C2 are used. Energy is lost only in the transfer of charge between capacitors if a change in voltage occurs. The energy lost is defined by: E = 1/2 C1 (V12 – V22) V+ C1 150 µF + IS 1 8 2 7 3 4 TC660 V+ (+5V) 6 5 RL IL + V1 and V2 are the voltages on C1 during the pump and transfer cycles. If the impedances of C1 and C2 are relatively high at the pump frequency (refer to Figure 2) compared to the value of RL, there will be a substantial difference in voltages V1 and V2. Therefore, it is desirable not only to make C2 as large as possible to eliminate output voltage ripple, but also to employ a correspondingly large value for C1 in order to achieve maximum efficiency of operation. 6 7 VOUT C2 150 µF 8 Figure 1. TC660 Test Circuit (Inverter) TELCOM SEMICONDUCTOR, INC. 5 4-9 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660 Dos and Don'ts • Do not exceed maximum supply voltages. • Do not connect the LV terminal to GND for supply voltages greater than 3.0V. • Do not short circuit the output to V+ in inverting mode and for more than 10 sec (a very slow startup!) in doubler mode. • When using polarized capacitors in the inverting mode, the + terminal of C1 must be connected to pin 2 of the TC660 and the + terminal of C2 must be connected to GND. The output characteristics of the circuit in Figure 3 are those of a nearly ideal voltage source in series with 6.5Ω. Thus, for a load current of –100mA and a supply voltage of +5V, the output voltage would be – 4.35V. The dynamic output impedance of the TC660 is due, primarily, to capacitive reactance of the charge transfer capacitor (C1). Since this capacitor is connected to the output for only 1/2 of the cycle, the equation is: 2 XC = = 0.21Ω, 2πf C1 where f = 10 kHz and C1 = 150 µF. Paralleling Devices Simple Negative Voltage Converter Figure 3 shows typical connections to provide a negative supply where a positive supply is available. A similar scheme may be employed for supply voltages anywhere in the operating range of +1.5V to +5.5V, keeping in mind that pin 6 (LV) is tied to the supply negative (GND) only for supply voltages below 3.0V. Any number of TC660 voltage converters may be paralleled to reduce output resistance (Figure 4). The reservoir capacitor, C2, serves all devices, while each device requires its own pump capacitor, C1. The resultant output resistance would be approximately: ROUT = V C1 150 µF + 1 8 2 7 3 TC660 4 + 6 + ROUT (of TC660) n (number of devices) VOUT* C2 150 µF 5 * NOTES: 1. VOUT = –V+ for 1.5V ≤ V+ ≤ 5.5V Figure 3. Simple Negative Converter V 1 8 2 C1 3 4 + TC660 "1" 7 1 8 6 2 7 5 C1 3 4 TC660 "n" RL 6 5 + C2 Figure 4. Paralleling Devices Lowers Output Impedance 4-10 TELCOM SEMICONDUCTOR, INC. 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER 1 TC660 V+ 150 µF 1 8 2 7 + 3 TC660 "1" 4 2 6 150 µF 5 + 1 8 2 7 3 TC660 6 4 "n" 5 VOUT* + + * NOTE: . VOUT = –n(V+) for 1.5V ≤ V+ ≤ 5.5V 3 150 µF 150 µF Figure 5. Increased Output Voltage by Cascading Devices Cascading Devices The TC660 may be cascaded as shown (Figure 5) to produce larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is 10 devices for light loads. The output voltage is defined by: VOUT = –n (VIN) where n is an integer representing the number of devices cascaded. The resulting output resistance would be approximately the weighted sum of the individual TC660 ROUT values. Changing the TC660 Oscillator Frequency It may be desirable in some applications (due to noise or other considerations) to increase the oscillator frequency. Pin 1, the FC pin, may be connected to V+ to increase oscillator frequency to 90kHz from a nominal of 10 kHz for an input supply voltage of 5.0 volts. The oscillator may also be synchronized to an external clock as shown in Figure 6 and LV must be grounded when overdriving OSC. In a situation where the designer has generated the external clock frequency using TTL logic, the addition of a 10kΩ pullup resistor to V+ supply is required. Note that the pump frequency with external clocking, as with internal clocking, will be 1/2 of the clock frequency. Output transitions occur on the positive-going edge of the clock. It is also possible to increase the conversion efficiency of the TC660 at low load levels by lowering the oscillator frequency. This reduces the switching losses, and is achieved by connecting an additional capacitor, COSC, as shown in Figure 7. Lowering the oscillator frequency will cause an undesirable increase in the impedance of the pump (C1) and the reservoir (C2) capacitors. To overcome this, increase the values of C1 and C2 by the same factor that the frequency has been reduced. For example, the addition of a 100pF capacitor between pin 7 (OSC) and GND will lower the oscillator frequency to 1kHz from its nominal frequency of 10kHz (a multiple of 10), and necessitate a corresponding increase in the values of C1 and C2. Positive Voltage Doubler 1 1 2 150 µF + 3 4 CMOS GATE 7 TC660 6 5 VOUT + Figure 6. External Clocking TELCOM SEMICONDUCTOR, INC. 6 8 2 8 OSC 5 V+ V+ V+ 4 C1 + 3 4 7 7 TC660 6 COSC 5 VOUT + C2 150 µF 8 Figure 7. Lowering Oscillator Frequency 4-11 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660 V+ 1 VOUT = –V+ 8 2 3 V+ D1 7 TC660 4 VOUT = (2 V+) – (2 VF) D2 6 2 7 TC660 4 + C1 C2 C1 8 3 + + 5 1 D1 6 5 D2 + + VOUT = (2 V +) – (2 VF) + C2 C4 Figure 8. Positive Voltage Doubler Figure 9 shows an improved way of using the TC660 as a voltage doubler. In this circuit, C1 is first charged to VIN and C2 is quickly brought to within a diode drop of VIN (to prevent substrate reversal) through D. The optional 200 Ω resistor is only to limit the brief latchup current. On the next half-cycle, VIN is in series with C1; C2 is then charged to 2 VIN. D is now reverse-biased and plays no further part. For VIN < 3V, R may be necessary to ensure startup. 200 VIN D C1 1 8 2 7 3 4 TC660 VOUT = 2 VIN 5 Figure 10. Combined Negative Converter and Positive Multiplier Efficient Positive Voltage Multiplication/Conversion Since the switches that allow the charge pumping operation are bidirectional, the charge transfer can be performed backward as easily as forward. Figure 11 shows a TC660 transforming –5V to +5V. The only problem here is that the internal clock and switch-drive section will not operate until some positive voltage has been generated. A diode and resistor shown dotted in Figure 11 can be used to "force" the internal regulator on. C2 6 VOUT = –V– R R = 0.1 – 1MΩ Figure 9. Improved Voltage Doubler Combined Negative Voltage Conversion and Positive Supply Multiplication Figure 10 combines the functions shown in Figures 3 and 8 to provide negative voltage conversion and positive voltage multiplication simultaneously. In this instance, capacitors C1 and C3 perform the pump and reservoir functions, respectively, for the generation of the negative voltage, while capacitors C2 and C4 are pump and reservoir, respectively, for the multiplied positive voltage. There is a penalty in this configuration in that the source impedances of the generated supplies will be somewhat higher due to the finite impedance of the common charge pump driver at pin 2 of the device. 4-12 C3 C1 150 µF + 1 8 2 7 + 150 µF 1 MΩ 3 4 TC660 6 5 V– INPUT Figure 11. Positive Voltage Multiplier TELCOM SEMICONDUCTOR, INC.