THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 D D D D D ADSL Differential Line Driver and Receiver Driver Features – 140 MHz Bandwidth (–3dB) With 25-Ω Load – 1300 V/µs Slew Rate, G = 5 – 400 mA Output Current Minimum Into 25-Ω Load – –72 dBc 3rd Order Harmonic Distortion at f = 1 MHz, 25-Ω Load, and 20 VO(PP) Receiver Features – 175 MHz Bandwidth (–3dB) – 230 V/µs Slew Rate – – 79 dBc Total Harmonic Distortion at f = 1 MHz, RL 1 kΩ – Quiescent Current = 3.4 mA Per Channel Wide Supply Range ± 4.5 V to ±16 V Available in the PowerPAD Package PWP PACKAGE (TOP VIEW) R1 OUT R1 IN– R1 IN+ NC NC R VCC– D VCC– D1 OUT NC D VCC+ D1 IN+ D1 IN– NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R VCC+ R2 OUT R2 IN– R2 IN+ NC NC D VCC– D2 OUT NC D VCC+ D2 IN+ D2 IN– NC NC NC – No internal connection description The THS6007 contains two high-current, high-speed drivers and two low-power, high-speed receivers. These drivers and receivers can be configured differentially for driving and receiving signals over low-impedance lines. The THS6007 is ideally suited for asymmetrical digital subscriber line (ADSL) applications where it supports the high-peak voltage and current requirements of that application. The drivers are current feedback amplifiers designed for the high slew rates necessary to support low total harmonic distortion (THD) in ADSL applications. The receivers are traditional voltage feedback amplifiers designed for maximum flexibility while consuming only 3.4 mA per channel quiescent current. Separate power supply connections for each driver and both receivers are provided to minimize crosstalk. The THS6007 is packaged in the patented PowerPAD package. This package provides outstanding thermal characteristics in a small footprint package, which is fully compatible with automated surface-mount assembly procedures. The exposed thermal pad on the underside of the package is in direct contact with the die. By simply soldering the pad to the PWB copper and using other thermal outlets, the heat is conducted away from the junction. AVAILABLE OPTIONS TA PACKAGED DEVICE PowerPAD TSSOP† (PWP) EVALUATION MODULE 0°C to 70°C THS6007CPWP THS6007EVM – 40°C to 85°C THS6007IPWP † The PWP packages are available taped and reeled. Add an R suffix to the device type (i.e., THS6007PWPR) CAUTION: The THS6007 provides ESD protection circuitry. However, permanent damage can still occur if this device is subjected to high-energy electrostatic discharges. Proper ESD precautions are recommended to avoid any performance degradation or loss of functionality. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VCC+ to VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 V Input voltage, VI (driver and receiver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VCC Output current, IO (driver) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mA Output current, IO (receiver) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA Differential input voltage, VID (driver and receiver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 4 V Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Continuous total power dissipation at (or below) TA = 25°C (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . 4.48 W Operating free air temperature, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C Storage temperature, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 125°C Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The THS6007 incorporates a PowerPad on the underside of the chip. This acts as a heatsink and must be connected to a thermal dissipation plane for proper power dissipation. Failure to do so can result in exceeding the maximum junction temperature, which could permanently damage the device. See the Thermal Information section of this document for more information about PowerPad technology. recommended operating conditions MIN Supply voltage voltage, VCC+ CC and VCC – Split supply Single supply Operating free-air temperature, TA 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYP MAX ± 4.5 ± 16 9 32 – 40 85 UNIT V °C THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 functional block diagram Driver 1 10 D V + CC D1 IN+ 11 + 8 D1 IN– 12 7 Driver 2 D2 IN+ 18 19 D2 IN– 28 D VCC+ D2 OUT _ 22 R VCC+ D VCC– + 21 17 D1 OUT _ Receiver 1 + 3 D VCC– R1 IN+ R1 OUT 1 _ + R2 OUT 2 25 R1 IN– R2 IN+ 27 _ 26 R2 IN– R VCC– 6 Receiver 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 DRIVER electrical characteristics, VCC = ±15 V, RL = 25 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted) dynamic performance PARAMETER TEST CONDITIONS Small signal bandwidth (–3 ( 3 dB) Small-signal BW 0 1 dB flatness Bandwidth for 0.1 SR MIN TYP VI = 200 mV, RF = 680 Ω, G = 1, RL = 25 Ω VCC = ± 15 V 140 VI = 200 mV, RF = 1 kΩ, G = 1, RL = 25 Ω VCC = ± 5 V 100 VI = 200 mV, RF = 620 Ω, G = 2, RL = 25 Ω VCC = ± 15 V 120 VI = 200 mV, RL = 25 Ω, G = 2, RF = 820 Ω VCC = ± 5 V 100 VI = 200 mV, RF = 820 Ω, G = 1, RL = 100 Ω VCC = ± 15 V 315 VI = 200 mV, RF = 560 Ω, G = 2, RL = 100 Ω VCC = ± 15 V 265 VCC = ± 5 V, RF = 820 Ω 30 VCC = ± 15 V, RF = 680 Ω 40 mV VI = 200 mV, Full power bandwidth† VCC = ± 15 V, VCC = ± 5 V, Slew rate‡ VCC = ± 15 V, VCC = ± 5 V, MAX UNIT MHz G=1 MHz VO(PP) = 20 V VO(PP) = 4 V 20 MHz 35 VO = 20 V(PP), VO = 5 V(PP), 0 V to 10 V Step, ts Settling time to 0.1% † Full power bandwidth = slew rate/2π VO(Peak). ‡ Slew rate is measured from an output level range of 25% to 75%. G=5 1300 G=2 900 G=2 70 V/µs ns noise/distortion performance PARAMETER THD Total harmonic distortion Vn Input voltage noise In Input noise current AD Differential gain error φD Positive (IN+) Negative (IN–) Driver to driver MIN VCC = ± 15 V,, G = 2, RF = 680 Ω,, f = 1 MHz VO(PP) = 20 V VO(PP) = 2 V VCC = ± 5 V, G = 2, RF = 680 Ω, f = 1 MHz VO(PP) = 2 V VCC = ± 5 V or ± 15 V, G = 2, Single-ended Differential phase hase error Crosstalk 4 TEST CONDITIONS f = 10 kHz, TYP – 65 – 76 – 79 1.7 VCC = ± 5 V or ± 15 V,, G=2 f = 10 kHz,, G = 2,, RL = 150 Ω, VCC = ± 5 V VCC = ± 15 V 0.04% VCC = ± 5 V 0.07° VCC = ± 15 V 0.08° G = 2, RL = 150 Ω, NTSC, 40 IRE Modulation VI = 200 mV, POST OFFICE BOX 655303 f = 1 MHz • DALLAS, TEXAS 75265 UNIT dBc nV/√Hz 11.5 16 NTSC,, 40 IRE Modulation MAX pA/√Hz 0.05% – 62 dB THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 DRIVER electrical characteristics, VCC = ±15 V, RL = 25 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted) (continued) dc performance TEST CONDITIONS† PARAMETER VIO Open loop transresistance VCC = ± 5 V VCC = ± 15 V Input offset voltage VCC = ± 5 V or ± 15 V Input offset voltage drift VCC = ± 5 V or ± 15 V, VCC = ± 5 V or ± 15 V Differential input offset voltage Negative IIB Input bias current VCC = ± 5 V or ± 15 V Positive Differential VCC = ± 5 V or ± 15 V, Differential input offset voltage drift MIN TYP MAX 1.5 MΩ 5 TA = 25°C TA = full range 2 5 7 TA = full range TA = 25°C TA = full range TA = 25°C 4 5 3 TA = full range TA = 25°C 9 12 4 TA = full range TA = 25°C 10 12 1.5 TA = full range TA = full range mV µV/°C 20 1.5 UNIT 8 11 mV µA µA µA µV/°C 10 NOTE: Full range = – 40°C to 85°C input characteristics TEST CONDITIONS† PARAMETER VICR CMRR VCC = ± 5 V VCC = ± 15 V Common mode input voltage range Common-mode Common-mode rejection ratio Differential common-mode rejection ratio RI VCC = ± 5 V or ± 15 V, V TA = full range Input resistance CI Differential input capacitance NOTE: Full range = – 40°C to 85°C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN TYP ± 3.6 ± 3.7 ± 13.4 ± 13.5 62 70 MAX UNIT V dB 100 300 kΩ 1.4 pF 5 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 DRIVER electrical characteristics, VCC = ±15 V, RL = 25 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted) (continued) output characteristics TEST CONDITIONS† PARAMETER Single ended VO MIN TYP VCC = ± 5 V 3 to – 2.8 3.2 to –3 VCC = ± 15 V 11.8 to –11.5 12.5 to –12.2 VCC = ± 5 V 6 to – 5.6 6.4 to –6 VCC = ± 15 V 23.6 to – 23 25 to – 24.4 RL = 25 Ω Output voltage swing Differential VCC = ± 5 V, VCC = ± 15 V, IO Output current (see Note 2) IOS RO Short-circuit output current (see Note 2) Output resistance RL = 50 Ω RL = 5 Ω RL = 25 Ω MAX V V 500 400 Open loop UNIT mA 500 800 mA 13 Ω NOTE 2: A heat sink is required to keep the junction temperature below absolute maximum when an output is heavily loaded or shorted. See absolute maximum ratings and Thermal Information section. power supply TEST CONDITIONS† PARAMETER VCC Power supply operating range Split supply Single supply VCC = ± 5 V ICC Quiescent current (each driver) VCC = ± 15 V VCC = ± 5 V PSRR Power supply rejection ratio VCC = ± 15 V TA = full range TA = 25°C POST OFFICE BOX 655303 MAX ± 16.5 9 33 UNIT V 12 11.5 13 mA 15 – 68 TA = full range TA = 25°C – 65 TA = full range – 62 • DALLAS, TEXAS 75265 TYP ± 4.5 TA = full range TA = 25°C NOTE: Full range = – 40°C to 85°C 6 MIN – 64 – 74 – 72 dB dB THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 RECEIVER electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) dynamic performance PARAMETER MIN TYP Gain = 1 VCC = ± 15 V VCC = ± 5 V 1 Gain = –1 Bandwidth for 0.1 0 1 dB flatness VCC = ± 15 V VCC = ± 5 V Gain = 1 Full power bandwidth† VO(pp) = 20 V, VO(pp) = 5 V, VCC = ± 15 V VCC = ± 5 V Slew rate‡ VCC = ± 15 V, VCC = ± 5 V, 20-V step Gain = 5 230 5-V step Gain = 1 170 Settling time to 0.1% 0 1% VCC = ± 15 V, VCC = ± 5 V, 5-V step 0 01% Settling time to 0.01% VCC = ± 15 V, VCC = ± 5 V, 5-V step Small signal bandwidth (–3 Small-signal ( 3 dB) BW SR TEST CONDITIONS VCC = ± 15 V VCC = ± 5 V ts 2-V step 2-V step MAX 175 MHz 160 70 MHz 65 35 MHz 35 2.7 MHz 7.1 V/µs 43 Gain = –1 1 ns 30 233 1 Gain = –1 UNIT ns 280 † Full power bandwidth = slew rate/2π VO(Peak). ‡ Slew rate is measured from an output level range of 25% to 75%. noise/distortion performance PARAMETER TEST CONDITIONS VO( O(pp)) = 2 V,, f = 1 MHz, Gain = 2 VCC = ± 15 V VCC = ± 5 V MIN TYP RL = 1 kΩ –79 RL = 1 kΩ –77 MAX UNIT THD Total harmonic distortion dBc Vn In Input voltage noise VCC = ± 5 V or ± 15 V, VCC = ± 5 V or ± 15 V, f = 10 kHz 10 nV/√Hz Input current noise f = 10 kHz 0.7 pA/√Hz XT Receiver-to-receiver crosstalk VCC = ± 5 V or ± 15 V, f = 1 MHz –75 dB dc performance PARAMETER TEST CONDITIONS VCC = ± 15 V V, VO = ± 10 V V, RL = 1 kΩ TA = 25°C TA = full range VCC = ± 5 V V, VO = ± 2 5V 2.5 V, RL = 250 Ω TA = 25°C TA = full range Open loop gain VOS Input offset voltage Offset voltage drift IIB Input bias current IOS Input offset current Offset current drift VCC = ± 5 V or ± 15 V MIN TYP 10 19 8 16 TA = full range TA = 25°C 15 7 8 1.2 20 6 250 400 0.3 mV µV/°C 8 TA = full range TA = full range V/mV 7 1 UNIT V/mV 9 TA = 25°C TA = full range TA = full range TA = 25°C MAX µA nA nA/°C NOTE: Full range = – 40°C to 85°C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 RECEIVER electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) (continued) input characteristics PARAMETER TEST CONDITIONS VICR Common mode input voltage range Common-mode VCC = ± 15 V VCC = ± 5 V CMRR Common mode rejection ratio VCC = ± 15 V, VCC = ± 5 V, RI Input resistance CI Input capacitance VICR = ± 12 V, VICR = ± 2 V, TA = full range TA = full range MIN TYP ± 13.8 ±14.1 MAX UNIT ± 3.8 ± 3.9 78 93 dB 84 90 dB 1 MΩ 1.5 pF V NOTE: Full range = – 40°C to 85°C output characteristics PARAMETER VO Output voltage swing TEST CONDITIONS VCC = ± 15 V VCC = ± 5 V MIN TYP RL = 250 Ω ±12 ±13.6 RL = 150 Ω ±3.4 ± 3.8 VCC = ± 15 V VCC = ± 5 V RL = 1 kΩ RL = 20 Ω IO Output current† VCC = ± 15 V VCC = ± 5 V ISC Short-circuit current† VCC = ± 15 V ±13 ±13.8 ±3.5 ± 3.9 65 85 50 70 MAX UNIT V V mA 100 mA RO Output resistance Open loop 13 Ω † Observe power dissipation ratings to keep the junction temperature below the absolute maximum rating when the output is heavily loaded or shorted. See the absolute maximum ratings section of this data sheet for more information. power supply PARAMETER VCC ICC PSRR Supply voltage operating range TEST CONDITIONS Single supply MAX ±16.5 9 33 TA = 25°C TA = full range 3.4 4.2 VCC = ± 5 V TA = 25°C TA = full range 2.9 3.7 VCC = ± 5 V or ± 15 V TA = full range NOTE: Full range = – 40°C to 85°C 8 TYP ±4.5 VCC = ± 15 V Supply current (per amplifier) Power supply rejection ratio MIN Dual supply POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 UNIT V mA 4.5 79 90 dB THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 PARAMETER MEASUREMENT INFORMATION 1 kΩ 1 kΩ 1 kΩ – Driver 1 – VO + VI 1 kΩ VO 25 Ω 50 Ω Driver 2 + 25 Ω VI 50 Ω Figure 1. Driver Input-to-Output Crosstalk Test Circuit 1 kΩ Receiver 1 VI 1 kΩ 1 kΩ – – VO + VO 150 Ω 50 Ω + 150 Ω 1 kΩ Receiver 2 VI 50 Ω Figure 2. Receiver Input-to-Output Crosstalk Test Circuit Rg Rf 15 V – Driver VI VO + 50 Ω –15 V RL 25 Ω Figure 3. Driver Test Circuit, Gain = 1 + (Rf/Rg) Rg Rf 15 V VI Receiver 50 Ω – VO + –15 V RL 150 Ω Figure 4. Receiver Test Circuit, Gain = 1 + (Rf/Rg) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS Table of Graphs FIGURE vs Supply voltage 5 vs Load resistance 6 Peak to peak output voltage Peak-to-peak Driver VIO IIB Input offset voltage Driver vs Free-air temperature 7 Input bias current Driver vs Free-air temperature 8 CMMR Common-mode rejection ratio Driver vs Free-air temperature 9 Driver-to-driver crosstalk Driver vs Frequency 10 Power supply rejection ratio Driver vs Free-air temperature 11 Closed-loop output impedance Driver vs Frequency 12 ICC Supply current Driver vs Supply voltage 13 SR Slew rate Driver vs Output step 15, 16 Vn Input voltage and current noise Driver vs Frequency 17 Normalized frequency response Driver vs Frequency 18, 19 Output amplitude Driver vs Frequency 20 – 23 Normalized output response Driver vs Frequency 24 – 27 Small and large signal frequency response Driver PSSR Single ended harmonic distortion Single-ended vs Free-air temperature 14 28, 29 Driver vs Frequency 30, 31 Driver vs Output voltage 32, 33 vs DC input offset voltage 34, 35 vs Number of 150-Ω loads 36, 37 Differential gain and phase Driver 400-mV step response Driver 38 10-V step response Driver 39 20-V step response Driver Driver-to-receiver crosstalk Receiver vs Frequency 41 Receiver-to-driver crosstalk Receiver vs Frequency 42 Power supply rejection ratio Receiver vs Frequency 43 Open loop gain and phase response Receiver vs Frequency 44 Receiver-to-receiver crosstalk Receiver vs Frequency 45 Total harmonic distortion Receiver vs Frequency 46, 47 Settling Receiver vs Output step 48 Power supply rejection ratio Receiver vs Frequency 49 Distortion Receiver Output amplitude Receiver 2-V step response Receiver 68, 70 5-V step response Receiver 69 20-V step response Receiver 71 VIO IIB Input offset voltage Receiver vs Free-air temperature 72 Input bias current Receiver vs Free-air temperature 73 VO Output voltage Receiver vs Supply voltage 74 vs Free-air temperature 75 VICR ICC Common-mode input voltage Receiver vs Supply voltage 76 Supply current Receiver vs Supply voltage 77 Vn, In Voltage and current noise Receiver vs Frequency 78 THD PSSR 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 40 vs Output voltage 50, 51 vs Frequency 52 – 55 vs Frequency 56 – 67 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (DRIVER) TA = 25°C RF = 1 kΩ RL = 25 Ω Gain = 1 5 0 –5 –10 5 6 7 8 9 10 11 12 13 14 15 10 VCC = ±5 V 5 TA = 25°C RF = 1 kΩ Gain = 1 0 –5 VCC = ±5 V –10 VCC = ±15 V –15 10 100 RL – Load Resistance – Ω VCC – Supply Voltage – V Figure 5 See Figure 2 4 VCC = ±15 V IIB+ VCC = ±5 V IIB+ 3 2 VCC = ±5 V IIB– 1 VCC = ±15 V IIB– 0 –40 –20 0 20 40 60 80 TA – Free-Air Temperature – °C 100 VCC = ±15 V 70 1 kΩ 65 1 kΩ 60 –40 VO 1 kΩ VCC = 15 V VCC = –5 V VCC = –15 V –20 0 20 40 60 80 TA – Free-Air Temperature – °C Figure 11 100 100 VCC = ± 15 V VI = 200 mV –30 –40 Input = Driver 1 Output = Driver 2 –50 –60 –70 Input = Driver 2 Output = Driver 1 –80 –90 100k –20 0 20 40 60 80 TA – Free-Air Temperature – °C 1M 10 SUPPLY CURRENT vs SUPPLY VOLTAGE 0.1 1 kΩ VO 1 kΩ 1 kΩ – + 50 Ω VI ( 1000 VI –1 VO 10 9 8 7 6 ) 5 1M 10M 100M f – Frequency – Hz 500M Figure 12 POST OFFICE BOX 655303 TA = 25°C RF = 1 kΩ Gain = +1 11 1 0.001 100k 100M 12 VCC = ±15 V RF = 1 kΩ Gain = 2 TA = 25°C VI(PP) = 1 V 0.01 10M f – Frequency – Hz Figure 10 Zo = 65 –40 –20 0 20 40 60 80 TA – Free-Air Temperature – °C CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY Closed-Loop Output Impedance – Ω PSRR – Power Supply Rejection Ratio – dB – + VI 100 G=1 RF = 1 kΩ 75 –4 Figure 9 85 70 VCC = ±5 V 1 kΩ 95 VCC = 5 V VCC = ±15 V –3 –20 75 POWER SUPPLY REJECTION RATIO vs FREE-AIR TEMPERATURE 80 –2 DRIVER-TO-DRIVER CROSSTALK vs FREQUENCY 80 Figure 8 90 –1 Figure 7 COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE CMRR – Common-Mode Rejection Ratio – dB I IB – Input Bias Current – µ A G=1 RF = 1 kΩ VCC = ±5 V 0 Figure 6 INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE 5 G=1 RF = 1 kΩ 1 –5 –40 1000 Driver-To-Driver Crosstalk – dB –15 2 VCC = ±15 V I CC – Supply Current – mA 10 INPUT OFFSET VOLTAGE vs FREE-AIR TEMPERATURE PEAK-TO-PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE 15 V IO – Input Offset Voltage – mV 15 V O(PP) – Peak-to-Peak Output Voltage – V V O(PP) – Peak-to-Peak Output Voltage – V PEAK-TO-PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE • DALLAS, TEXAS 75265 5 6 7 8 9 10 11 12 13 ± VCC – Supply Voltage – V 14 15 Figure 13 11 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (DRIVER) SLEW RATE vs OUTPUT STEP SUPPLY CURRENT vs FREE-AIR TEMPERATURE 1500 VCC = ±15 V 1300 VCC = ±5 V 10 8 6 1000 VCC = ± 15V Gain = 5 RF = 1 kΩ RL = 25 Ω 1100 800 –SR 900 700 4 500 2 300 0 –40 100 –SR 700 600 500 400 –20 0 20 40 60 80 TA – Free-Air Temperature – °C 200 0 100 In– Noise In+ Noise Normalized Frequency Response – dB Hz I n – Current Noise – pA/ V n – Input Voltage Noise – nV/ Hz 2 100 10 10 Vn Noise 1 100k 1k 10k f – Frequency – Hz RF = 300 Ω 1 0 –1 RF = 510 Ω –2 RF = 750 Ω –3 RF = 1 kΩ –4 VCC = ±15 V VI = 200 mV RL = 25 Ω Gain = 1 TA = 25°C –5 –6 –7 –8 100 1M 10M 100M f – Frequency – Hz OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 3 2 RF = 360 Ω 9 8 RF = 620 Ω 2 –1 –2 RF = 470 Ω –5 –6 –7 –8 –9 VCC = ±15 V Vin = 200 mV RL = 25 Ω Gain = 2 TA = 25°C –10 100K RF = 620 Ω 1 0 –1 Figure 19 500M RF = 1.5 kΩ –3 –5 1M 10M 100M f – Frequency – Hz RF = 1 kΩ –2 –4 RF = 1 kΩ Output Amplitude – dB Output Amplitude – dB 0 –4 500M Figure 18 NORMALIZED FREQUENCY RESPONSE vs FREQUENCY –3 5 Figure 16 Figure 17 1 2 3 4 1 Output Step (Peak–To–Peak) – V NORMALIZED FREQUENCY RESPONSE vs FREQUENCY VCC = ±15 V TA = 25°C 100 0 Figure 15 100 1 10 100 20 10 15 5 Output Step (Peak–To–Peak) – V INPUT VOLTAGE AND CURRENT NOISE vs FREQUENCY Normalized Frequency Response – dB +SR 300 Figure 14 12 VCC = ± 5V Gain = 2 RF = 1 kΩ RL = 25 Ω 900 +SR Slew Rate – Vµ S 12 Slew Rate – Vµ S I CC – Supply Current – mA 13 SLEW RATE vs OUTPUT STEP VCC = ± 5 V Gain = 1 RL = 25 Ω VI = 200 mV –6 100k 5 500M • DALLAS, TEXAS 75265 RF = 820 Ω 4 RF = 1.2 kΩ 3 1 Figure 20 POST OFFICE BOX 655303 6 2 1M 10M 100M f – Frequency – Hz RF = 510 Ω 7 VCC = ± 5 V Gain = 2 RL = 25 Ω VI = 200 mV 0 100k 1M 10M 100M f – Frequency – Hz Figure 21 500M THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (DRIVER) OUTPUT AMPLITUDE vs FREQUENCY Gain = 1000 60 Output Amplitude – dB 50 Gain = 100 40 30 20 VCC = ± 5 V RG =10 Ω RL = 25 Ω VO = 2 V –10 100k 1M 50 Gain = 100 40 30 20 10 0 10M –10 100k 500M 100M VCC = ± 5 V RG =10 Ω RL = 25 Ω VO = 2 V f – Frequency – Hz NORMALIZED OUTPUT RESPONSE vs FREQUENCY –2 –3 –8 –9 100k RL = 25 Ω RL = 200 Ω RL = 100 Ω RL = 50 Ω 1M 10M 100M f – Frequency – Hz RF = 620 Ω 2 RF = 820 Ω 1 0 –1 RF = 1 kΩ –2 –3 –4 VCC = ±15 V RL = 100 Ω Gain = 1 VI = 200 mV –5 –6 –7 100k 500M SMALL AND LARGE SIGNAL FREQUENCY RESPONSE Output Level – dBV Output Level – dBV VI = 125 mV VI = 62.5 mV 1M VI = 250 mV –9 f – Frequency – Hz Figure 28 100M 500M VI = 125 mV –12 –15 –21 10M –7 VCC = ±15 V RF = 1 kΩ Gain = 1 VI = 200 mV 1M 10M 100M f – Frequency – Hz 500M 3 RF = 430 Ω 2 1 0 –1 RF = 620 Ω –2 RF = 1 kΩ –3 –4 –5 VCC = ±15 V RL = 100 Ω Gain = 2 VI = 200 mV –6 100k 1M 10M 100M f – Frequency – Hz 500M –40 –6 –18 Gain = 1 VCC = ± 15 V RF = 820 Ω RL = 25 Ω –30 100k –6 SINGLE–ENDED HARMONIC DISTORTION vs FREQUENCY –3 VI = 250 mV –21 –27 RL = 25 Ω –5 Figure 27 VI = 500 mV 0 –15 –24 –4 NORMALIZED OUTPUT RESPONSE vs FREQUENCY 500M 3 VI = 500 mV –9 –18 1M 10M 100M f – Frequency – Hz SMALL AND LARGE SIGNAL FREQUENCY RESPONSE –3 –12 RL = 50 Ω Figure 26 Figure 25 –6 RL = 100 Ω –3 Figure 24 Normalized Output Response – dB Normalized Output Response – dB Normalized Output Response – dB –1 VCC = ±15 V RF = 1 kΩ Gain = 2 VI = 200 mV –2 –9 100k 500M 3 0 –7 10M 1M 100M f – Frequency – Hz NORMALIZED OUTPUT RESPONSE vs FREQUENCY 1 –5 –1 Figure 23 Figure 22 –4 RL = 200 Ω 0 –8 Single–Ended Harmonic Distortion (dBc) Output Amplitude – dB 60 –6 Normalized Output Response – dB Gain = 1000 0 1 70 70 10 NORMALIZED OUTPUT RESPONSE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY VI = 62.5 mV Gain = 2 VCC = ± 15 V RF = 680 Ω RL = 25 Ω –24 100k 1M 10M 100M f – Frequency – Hz 500M Figure 29 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 –50 –60 VCC = ± 15 V Gain = 2 RF = 680 Ω RL = 25 Ω VO(PP) = 2V –70 2nd Harmonic –80 3rd Harmonic –90 –100 100k 1M f – Frequency – Hz 10M Figure 30 13 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (DRIVER) SINGLE–ENDED HARMONIC DISTORTION vs OUTPUT VOLTAGE –50 –80 2nd Harmonic –90 –100 100k 1M –60 2nd Harmonic –70 –80 –90 3rd Harmonic –100 10 5 0 10M 0.04 0.02 –0.5 –0.3 –0.1 0.1 0.3 0.5 DC Input Offset Voltage – V 0.10 0.06 Gain 0.04 0.02 Phase 0.01 0 0.7 0.02 0 0 –0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 DC Input Offset Voltage – V 0.7 Figure 35 DIFFERENTIAL GAIN AND PHASE vs NUMBER OF 150-Ω LOADS DIFFERENTIAL GAIN AND PHASE vs NUMBER OF 150-Ω LOADS 0.25 VCC = ±15 V RF = 1 kΩ Gain = 2 f = 3.58 MHz 40 IRE Modulation 100 IRE Ramp 0.15 0.20 0.15 Phase 0.06 0.10 Gain 0.05 0.03 Differential Gain – % 0.09 0.25 VCC = ±5 V RF = 1 kΩ Gain = 2 f = 3.58 MHz 40 IRE Modulation 100 IRE Ramp 0.12 Differential Phase – ° Differential Gain – % 0.08 0.03 Figure 34 0.12 0.20 0.09 0.15 0.10 0.06 Gain 0.03 0.05 Phase 0 0 1 2 3 4 5 6 Number of 150-Ω Loads 7 8 0 0 1 2 3 4 5 6 Number of 150-Ω Loads Figure 37 Figure 36 14 4 3 VCC = ±5 V RL = 150 Ω RF = 1 kΩ f = 3.58 MHz Gain = 2 40 IRE Modulation 0.04 Differential Gain – % 0.06 0.01 2 1 VO(PP) – Output Voltage – V 0.05 Differential Phase – ° Differential Gain – % 0.08 0.02 0.15 –90 DIFFERENTIAL GAIN AND PHASE vs DC INPUT OFFSET VOLTAGE 0.10 VCC = ±15 V RL = 150 Ω Gain RF = 1 kΩ f = 3.58 MHz Gain = 2 40 IRE Modulation Phase 0 –0.7 2nd Harmonic Figure 33 DIFFERENTIAL GAIN AND PHASE vs DC INPUT OFFSET VOLTAGE 0.03 –80 Figure 32 Figure 31 0.04 3rd Harmonic VO(PP) – Output Voltage – V f – Frequency – Hz 0.05 –60 –100 20 15 VCC = ± 5 V Gain = 2 RF = 680 Ω RL = 25 Ω f = 1 MHz Differential Phase – ° 3rd Harmonic –70 –50 VCC = ± 15 V Gain = 2 RF = 680 Ω RL = 25 Ω f = 1 MHz Single–Ended Harmonic Distortion – dBc –60 VCC = ± 5 V Gain = 2 RF = 680 Ω RL = 25 Ω VO(PP) = 2V Single–Ended Harmonic Distortion (dBc) Single–Ended Harmonic Distortion (dBc) –40 –50 SINGLE–ENDED HARMONIC DISTORTION vs OUTPUT VOLTAGE POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 8 Differential Phase – ° SINGLE–ENDED HARMONIC DISTORTION vs FREQUENCY THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (DRIVER) 10-V STEP RESPONSE 16 300 6 12 100 0 VCC = ±15 V Gain = 2 RL = 25 Ω RF = 1 kΩ tr/tf= 300 ps –100 –200 4 V O – Output Voltage – V 200 –300 2 0 VCC = ±15 V Gain = 2 RL = 25 Ω RF = 1 kΩ tr/tf= 5 ns –2 –4 –6 0 50 100 150 200 250 300 350 400 450 500 t – Time – ns Note: See Figure 3 50 100 150 200 250 300 350 400 450 500 Input = Driver 1 Output = Receiver 2 Input = Driver 2 Output = Receiver 2 Input = Driver 1 Output = Receiver 2 Input = Driver 1 Output = Receiver 1 1M 10M f – Frequency – Hz Figure 41 100M 50 100 150 200 250 300 350 400 450 500 Note: See Figure 3 Figure 40 RECEIVER-TO-DRIVER CROSSTALK vs FREQUENCY –20 VCC = ± 15 V VI = 200 mV rms –80 –90 100k 0 VCC = ± 15 V VI = 200 mV rms –30 –40 Input = Receiver 1 or Receiver 2 Output = Driver 1 –50 –60 Input = Receiver 1 or Receiver 2 Output = Driver 2 –70 –80 –90 100k 1M 10M 100M f – Frequency – Hz Figure 42 POST OFFICE BOX 655303 POWER SUPPLY REJECTION RATIO vs FREQUENCY PSRR – Power Supply Rejection Ratio – dB –70 –8 Figure 39 Receiver-To-Driver Crosstalk – dB –60 VCC = ±15 V Gain = 5 RL = 25 Ω RF = 2 kΩ tr/tf= 5 ns –4 t – Time – ns Note: See Figure 3 –20 –50 0 t – Time – ns DRIVER-TO-RECEIVER CROSSTALK vs FREQUENCY –40 4 –16 0 Figure 38 –30 8 –12 –8 –400 Driver-To-Receiver Crosstalk – dB 20-V STEP RESPONSE 8 V O – Output Voltage – V V O – Output Voltage – mV 400-mV STEP RESPONSE 400 • DALLAS, TEXAS 75265 80 VCC = ±15 V or ± 5 V Both Channels See Figure 1 70 60 50 40 30 20 10 0 10 k 100 k 1M 10 M 100 M f – Frequency – Hz Figure 43 15 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (RECEIVER) OPEN LOOP GAIN & PHASE RESPONSE vs FREQUENCY 0° 60.00 Gain 40.00 –45° 90° Phase 20.00 135° 0.00 180° Receiver-To-Receiver Crosstalk – dB 80.00 Phase Responce 45° Open Loop Gain – dB 100.00 RECEIVER-TO-RECEIVER CROSSTALK vs FREQUENCY VCC = ±5 V and ±15 V –20.00 100 1k 100k 1M 10k 10M 100M –225° 1G –20 VCC = ± 15 V VI = 200 mV rms –30 –40 –50 –60 Input = Receiver 2 Output = Receiver 1 –70 –80 Input = Receiver 1 Output = Receiver 2 –90 100k 1M f – Frequency – Hz Figure 44 Figure 45 TOTAL HARMONIC DISTORTION vs FREQUENCY RL = 150 Ω –70 –80 RL = 1 kΩ –90 100.00 1M f - Frequency - Hz –50 –60 RL = 150 Ω –70 RL = 1 kΩ –80 –90 VCC = ±5 V(0.1%) VCC = ±15 V(0.1%) 2 1000.00 10M 3 4 5 VO – Output Step Voltage – V Figure 48 DISTORTION vs OUTPUT VOLTAGE DISTORTION vs OUTPUT VOLTAGE –50 –50 2nd Harmonic 2nd Harmonic –60 –20 Distortion – dBc PSRR - Power Supply Rejection Ratio - dB 16 VCC = ±15 V(0.01%) 130 10 100.00 1M f - Frequency - Hz VCC = ± 15 V & ± 5 V –VCC –40 +VCC –60 –60 3rd Harmonic –70 –80 VCC = ± 15 V RL = 1 kΩ Gain = 5 f = 1 MHz –90 –80 100M 3rd Harmonic –70 –80 VCC = ± 15 V RL = 150 Ω Gain = 5 f = 1 MHz –90 –100 Figure 49 VCC = ±5 V(0.01%) 170 Figure 47 POWER SUPPLY REJECTION RATIO vs FREQUENCY 1M 10M f - Frequency - Hz 210 50 Figure 46 –100 100k 250 90 –100 10.00 100k 1000.00 10M 290 Distortion – dBc –100 10.00 100k 330 VCC = ± 5 V Gain = 2 VO(PP) = 2 V Settling Time – ns THD - Total Harmonic Distortion - dBc THD - Total Harmonic Distortion - dBc –40 VCC = ± 15 V Gain = 2 VO(PP) = 2 V –60 0 SETTLING vs OUTPUT STEP TOTAL HARMONIC DISTORTION vs FREQUENCY –40 –50 100M 10M f – Frequency – Hz –100 0 5 10 15 20 VO – Output Voltage – V Figure 50 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0 5 10 15 VO – Output Voltage – V Figure 51 20 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (RECEIVER) DISTORTION vs FREQUENCY –60 –70 2nd Harmonic –80 DISTORTION vs FREQUENCY –50 VCC = ± 5 V RL = 1 kΩ Gain = 2 VO(PP) = 2 V –70 VCC = ± 15 V RL = 150 Ω Gain = 2 VO(PP) = 2 V –60 Distortion – dBc Distortion – dBc –60 –50 VCC = ± 15 V RL = 1 kΩ Gain = 2 VO(PP) = 2 V Distortion – dBc –50 DISTORTION vs FREQUENCY 2nd Harmonic –80 3rd Harmonic –70 2nd Harmonic –80 3rd Harmonic –90 –90 –90 3rd Harmonic –100 10.00 100k 100.00 1M –100 10.00 100k 1000.00 10M f – Frequency – Hz Figure 52 Figure 53 Figure 54 OUTPUT AMPLITUDE vs FREQUENCY 2nd Harmonic –80 –90 –2 f – Frequency – Hz Figure 55 –4 VCC = ± 15 V Gain = 1 RL = 1 kΩ VO(PP) = 63 mV 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz Figure 58 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz Figure 57 OUTPUT AMPLITUDE vs FREQUENCY 2 RF = 1.3 kΩ 0 RF = 0 Ω –2 –4 –6 –8 10.00 100k VCC = ± 5 V Gain = 1 RL = 1 kΩ VO(PP) = 63 mV Figure 59 • DALLAS, TEXAS 75265 RF = 2 kΩ 0 RF = 1 kΩ –2 –4 –6 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz POST OFFICE BOX 655303 Output Amplitude – dB –2 VCC = ± 5 V Gain = 1 RL = 150 Ω VO(PP) = 63 mV RF = 51 Ω Output Amplitude – dB Output Amplitude – dB RF = 0 Ω –2 –6 10.00 100k 2 RF = 51 Ω 0 RF = 0 Ω –4 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz RF = 130 Ω 0 OUTPUT AMPLITUDE vs FREQUENCY 2 –8 10.00 100k VCC = ± 15 V Gain = 1 RL = 150 Ω VO(PP) = 63 mV RF = 51 Ω 2 Figure 56 OUTPUT AMPLITUDE vs FREQUENCY –6 RF = 130 Ω RF = 0 Ω –6 10.00 100k 1000.00 10M RF = 51 Ω 0 –4 100.00 1M 4 Output Amplitude – dB 3rd Harmonic –70 2 1000.00 10M OUTPUT AMPLITUDE vs FREQUENCY 4 VCC = ± 5 V RL = 150 Ω Gain = 2 VO(PP) = 2 V –100 10.00 100k 100.00 1M f – Frequency – Hz Output Amplitude – dB Distortion – dBc –60 –100 10.00 100k 1000.00 10M f – Frequency – Hz DISTORTION vs FREQUENCY –50 100.00 1M –8 10.00 100k VCC = ± 15 V Gain = –1 RL = 150 Ω VO(PP) = 63 mV 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz Figure 60 17 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (RECEIVER) OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 2 2 2 RF = 1 kΩ –2 –4 VCC = ± 5 V Gain = –1 RL = 150 Ω VO(PP) = 63 mV RF = 1.3 kΩ –2 –4 –6 –8 10.00 100k 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz VCC = ± 15 V Gain = –1 RL = 1 kΩ VO(PP) = 63 mV 6 RF = 750 Ω 4 2 0 –2 10.00 100k 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz VCC = ± 5 V Gain = 2 RL = 150 Ω VO(PP) = 126 mV V O – Output Voltage – V 6 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz 2 –2 10.00 100k VCC = ± 15 V Gain = 2 RL = 1 kΩ VO(PP) = 126 mV 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz Figure 66 5-V STEP RESPONSE 3 VCC = ± 5 V Gain = 2 RF = 1.2 kΩ RL = 150 Ω 0.8 VCC = ± 5 V Gain = 2 RL = 1 kΩ VO(PP) = 126 mV 4 2-V STEP RESPONSE RF = 1.2 kΩ 2 RF = 1.2 kΩ 0 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz 1.2 4 6 Figure 65 8 RF = 1.5 kΩ Output Amplitude – dB VCC = ± 15 V Gain = 2 RL = 150 Ω VO(PP) = 126 mV RF = 1.5 kΩ RF = 1.5 kΩ OUTPUT AMPLITUDE vs FREQUENCY Output Amplitude – dB OUTPUT AMPLITUDE vs FREQUENCY 8 Figure 64 18 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz Figure 63 2 V O – Output Voltage – V 2 Output Amplitude – dB Output Amplitude – dB 4 Figure 67 VCC = ± 5 V Gain = –1 RL = 1 kΩ VO(PP) = 63 mV RF = 1.2 kΩ RF = 1.5 kΩ RF = 750 Ω –2 10.00 100k –4 –8 10.00 100k 8 RF = 1.2 kΩ 0 –2 OUTPUT AMPLITUDE vs FREQUENCY 8 –2 10.00 100k RF = 1.3 kΩ Figure 62 OUTPUT AMPLITUDE vs FREQUENCY 6 0 –6 100.00 1000.00 10000.00 1M 10M 100M 100000.00 1G f - Frequency - Hz Figure 61 0 RF = 1.5 kΩ RF = 2 kΩ 0 Output Amplitude – dB RF = 2 kΩ 0 –8 10.00 100k RF = 1.5 kΩ Output Amplitude – dB Output Amplitude – dB RF = 1.3 kΩ –6 OUTPUT AMPLITUDE vs FREQUENCY 0.4 0.0 –0.4 –0.8 1 0 –1 VCC = ± 5 V Gain = –1 RF = 1.3 kΩ RL = 150 Ω –2 –1.2 –3 0 200 400 600 t - Time - ns 800 1000 Figure 68 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0 200 400 600 t - Time - ns Figure 69 800 1000 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 TYPICAL CHARACTERISTICS (RECEIVER) 2-V STEP RESPONSE VCC = ± 15 V Gain = 2 RF = 1.2 kΩ RL = 150 Ω 0.8 0.6 8 0.4 0.2 –0.0 –0.2 –0.4 –0.6 6 4 2 0 –2 –4 –6 –0.8 –8 –1.0 –10 –1.2 1.5 VCC = ± 15 V Gain = 5 RF = 1.2 kΩ RL = 150 Ω 10 V O – Output Voltage – V 1.0 V O – Output Voltage – V 20-V STEP RESPONSE 12 V IO – Input Offset Voltage – mV 1.2 INPUT OFFSET VOLTAGE vs FREE-AIR TEMPERATURE –12 0 200 400 600 t - Time - ns 800 1000 0 200 Figure 70 400 600 t - Time - ns 800 15 1.9 13 VCC = ± 5 V 0.5 VCC = ±15 V 1.6 1.5 I VCC = ± 5 V 15 11 13 RL = 1 kΩ 9 RL = 150 Ω 7 VCC = ± 15 V RL = 150 Ω 11 VCC = ± 15 V RL = 1 kΩ 9 7 VCC = ± 5 V RL = 1 kΩ 5 5 VCC = ± 5 V RL = 150 Ω 3 5 100 7 9 11 13 ±VCC - Supply Voltage - V Figure 73 1 –40 15 COMMON-MODE INPUT VOLTAGE vs SUPPLY VOLTAGE 7 5 V n – Voltage Noise – nV/ Hz I n – Current Noise – pA/ Hz I CC – Supply Current – mA 9 40 60 80 100 100 3.6 11 20 VOLTAGE AND CURRENT NOISE vs FREQUENCY 3.8 13 0 Figure 75 SUPPLY CURRENT vs SUPPLY VOLTAGE TA=25°C –20 TA – Free-Air Temperature – _C Figure 74 15 100 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 3 –20 0 20 40 60 80 TA - Free-Air Temperature - °C –20 0 20 40 60 80 TA - Free-Air Temperature - °C Figure 72 VO – Output Voltage – V V VO - Output Voltage - IB – Input Bias Current – µ A 1.8 V ICR – Common-Mode Input Voltage – ± V 0.7 0.3 –40 1000 TA=25°C 1.3 –40 0.9 OUTPUT VOLTAGE vs SUPPLY VOLTAGE 2.0 1.4 VCC = ± 15 V 1.1 Figure 71 INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE 1.7 1.3 TA=85°C 3.4 VCC = ± 15 V and ± 5 V TA = 25°C VN 10 3.2 TA=25°C 3.0 2.8 TA=–40°C 2.6 IN 1 2.4 3 0.1 2.2 5 7 9 11 13 ±VCC - Supply Voltage - V Figure 76 15 5 7 9 11 13 ± VCC - Supply Voltage - V 15 Figure 77 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 100 1k 10k f - Frequency - Hz 100k Figure 78 19 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION ADSL The THS6007 was primarily designed as a line driver and line receiver for ADSL (asymmetrical digital subscriber line). The driver output stage has been sized to provide full ADSL power levels of 20 dBm onto the telephone lines. Although actual driver output peak voltages and currents vary with each particular ADSL application, the THS6007 is specified for a minimum full output current of 400 mA at its full output voltage of approximately 12 V. This performance meets the demanding needs of ADSL at the central office end of the telephone line. A typical ADSL schematic is shown in Figure 79. 15 V 0.1 µF THS6007 Driver 1 VI+ + 6.8 µF 12.5 Ω + _ 1:2 680 Ω 100 Ω To Telephone Line 0.1 µF 6.8 µF + –15 V 1 kΩ 220 Ω 15 V THS6007 Driver 2 VI– 15 V 0.1 µF + 2 kΩ 6.8 µF 0.1 µF 12.5 Ω + _ 1 kΩ – + THS6007 Receiver 1 680 Ω 0.1 µF 1 kΩ 2 kΩ 6.8 µF + –15 V VO+ 1 kΩ – + VO– THS6007 Receiver 2 0.1 µF –15 V Figure 79. Typical THS6007 ADSL Application 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION ADSL (continued) The ADSL transmit band consists of 255 separate carrier frequencies each with its own modulation and amplitude level. With such an implementation, it is imperative that signals put onto the telephone line have as low a distortion as possible. This is because any distortion either interferes directly with other ADSL carrier frequencies or it creates intermodulation products that interfere with ADSL carrier frequencies. The THS6007 has been specifically designed for ultralow distortion by careful circuit implementation and by taking advantage of the superb characteristics of the complementary bipolar process. Driver single-ended harmonic distortion measurements are shown in Figures 30 and 31. It is commonly known that in the differential driver configuration, the second order harmonics tend to be reduced by 6 dB or more. Thus, the dominant total harmonic distortion (THD) will be primarily due to the third order harmonics. For this test, the load was 25 Ω and the output signal produced a 2 VO(PP) signal. Thus, the test was run at full signal and full load conditions. Another significant point is the fact that distortion decreases as the impedance load increases. This is because the output resistance of the amplifier becomes less significant as compared to the output load resistance. ADSL receive line noise Per ANSI T1.413, the receive noise power spectral density for an ADSL line is –140 dBm/√Hz. This results in a voltage noise requirement of less than 31.6 nV/√Hz for the receiver in an ADSL system with a 1:1 transformer ratio. Noise Power Spectral Density = –140 dBm/√Hz Power = 1e–17 × 1 Hz = 0.01 fW Assume: RL = 100 Ω Vnoise = √(P×R) = √(0.01 fW × 100 Ω) = 31.6 nV/√Hz For ADSL systems that use a 1:2 transformer ratio, such as central office line cards, the voltage noise requirement for the receiver is lowered to 15.8 nV/√Hz. TRANSFORMER RATIO Vnoise ON LINE 1:1 31.6 nV/√Hz 1:2 15.8 nV/√Hz The THS6007 receiver was designed to operate with 10 nV/√Hz voltage noise, exceeding the noise requirements for an ADSL system operating with 1:1 or 1:2 transformer ratios. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION The THS6007 contains four independent operational amplifiers. Two are designated as drivers because of their high output current capability, and two are designated as receivers. The receiver amplifiers are voltage feedback topology amplifiers made for high-speed, low-power operation and are capable of driving output loads of at least 50 mA. The drivers are current feedback topology amplifiers and have been specifically designed to deliver the full power requirements of ADSL. They can deliver output currents of at least 400 mA at full output voltage. The THS6007 is fabricated using Texas Instruments 30-V complementary bipolar process, BiCOM. This process provides excellent isolation and high slew rates that result in the device’s excellent crosstalk and extremely low distortion. independent power supplies Each driver amplifier and both receivers of the THS6007 have their own power supply pins. This was specifically done to solve a problem that often occurs when multiple devices in the same package share common power pins. This problem is crosstalk between the individual devices caused by currents flowing in common connections. Whenever the current required by one device flows through a common connection shared with another device, this current, in conjunction with the impedance in the shared line, produces an unwanted voltage on the power supply. Proper power supply decoupling and good device power supply rejection helps to reduce this unwanted signal. What is left is crosstalk. However, with independent power supply pins for each device, the effects of crosstalk through common impedance in the power supplies is more easily managed. This is because it is much easier to achieve low common impedance on the PCB with copper etch than it is to achieve low impedance within the package with either bond wires or metal traces on silicon. 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION power supply restrictions Although the THS6007 is specified for operation from power supplies of ± 5 V to ±15 V (or singled-ended power supply operation from 10 V to 30 V), and each amplifier has its own power supply pins, several precautions must be taken to assure proper operation. 1. The power supplies for each driver amplifier must be the same value. For example, if driver 1 uses ±15 volts, then driver 2 must also use ±15 volts. Using ±15 volts for driver 1 and ±5 volts for driver 2 is not allowed. 2. The power supplies for the receiver amplifiers may be different than the driver supply voltages. Although it is recommended to use the same type of supply, either split supplies(±VCC) or single supply (+VCC and GND), for both drivers and receivers. All the amplifiers within the THS6007 incorporate a standard Class A-B output stage. This means that some of the quiescent current is directed to the load as the load current increases. So under heavy load conditions, accurate power dissipation calculations are best achieved through actual measurements. For small loads, however, internal power dissipation for each amplifier in the THS6007 can be approximated by the following formula: P D Where: PD VCC ICC VO RL ǒ ≅ 2 V I CC CC Ǔ)ǒ V CC _ V Ǔ O ǒǓ V O R L = Power dissipation for one amplifier = Split supply voltage = Supply current for that particular amplifier = Output voltage of amplifier = Load resistance To find the total THS6007 power dissipation, we simply sum up all four amplifier power dissipation results. Generally, the worst case power dissipation occurs when the output voltage is one-half the VCC voltage. One last note, which is often overlooked: the feedback resistor (Rf) is also a load to the output of the amplifier and should be taken into account for low value feedback resistors. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION device protection features The drivers of the THS6007 have two built-in protection features that protect the device against improper operation. The first protection mechanism is output current limiting. Should the drivers output become shorted to ground, the output current is automatically limited to the value given in the data sheet. While this protects the output against excessive current, the device internal power dissipation increases due to the high current and large voltage drop across the output transistors. Continuous output shorts are not recommended and could damage the device. Additionally, connection of the amplifier output to one of the supply rails (±VCC) can cause failure of the device and is not recommended. The use of Schottky diodes from each amplifier’s output to each power supply voltage rail is recommended. This will limit surges from the transmission line so as to not damage the THS6007. The drivers second built-in protection feature is thermal shutdown. Should the internal junction temperature rise above approximately 180_C, the device automatically shuts down. Such a condition could exist with improper heat sinking or if the output is shorted to ground. When the abnormal condition is fixed and the junction temperature drops below 150°C, the internal thermal shutdown circuit automatically turns the device back on. thermal information The THS6007 is packaged in a thermally-enhanced PWP package, which is a member of the PowerPAD family of packages. This package is constructed using a downset leadframe upon which the die is mounted [see Figure 80(a) and Figure 80(b)]. This arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see Figure 80(c)]. Because this thermal pad has direct thermal contact with the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad. The PowerPAD package allows for both assembly and thermal management in one manufacturing operation. During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be soldered to a copper area underneath the package. Through the use of thermal paths within this copper area, heat can be conducted away from the package into either a ground plane or other heat dissipating device. This is discussed in more detail in the PCB design considerations section of this document. The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of surface mount with the, heretofore, awkward mechanical methods of heatsinking. DIE Side View (a) Thermal Pad DIE End View (b) Bottom View (c) NOTE A: The thermal pad is electrically isolated from all terminals in the package. Figure 80. Views of Thermally Enhanced PWP Package 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION recommended feedback and gain resistor values As with all current-feedback amplifiers, the bandwidth of the THS6007 drivers is an inversely proportional function of the value of the feedback resistor. This can be seen from Figures 18 and 19. For the driver, the recommended resistors for the optimum frequency response for a 25-Ω load system are 680 Ω for a gain = 1 and 620 Ω for a gain = 2 or –1. These should be used as a starting point and once optimum values are found, 1% tolerance resistors should be used to maintain frequency response characteristics. Because there is a finite amount of output resistance of the operational amplifier, load resistance can play a major part in frequency response. This is especially true with the drivers, which tend to drive low-impedance loads. This can be seen in Figure 12, Figure 24, and Figure 25. As the load resistance increases, the output resistance of the amplifier becomes less dominant at high frequencies. To compensate for this, the feedback resistor should change. For 100-Ω loads, it is recommended that the feedback resistor be changed to 820 Ω for a gain of 1 and 560 Ω for a gain of 2 or –1. Although, for most applications, a feedback resistor value of 1 kΩ is recommended, which is a good compromise between bandwidth and phase margin that yields a very stable amplifier. Consistent with current-feedback amplifiers, increasing the gain is best accomplished by changing the gain resistor, not the feedback resistor. This is because the bandwidth of the amplifier is dominated by the feedback resistor value and internal dominant-pole capacitor. The ability to control the amplifier gain independent of the bandwidth constitutes a major advantage of current feedback amplifiers over conventional voltage feedback amplifiers. Therefore, once a frequency response is found suitable to a particular application, adjust the value of the gain resistor to increase or decrease the overall amplifier gain. Finally, it is important to realize the effects of the feedback resistance on distortion. Increasing the resistance decreases the loop gain and increases the distortion. It is also important to know that decreasing load impedance increases total harmonic distortion (THD). Typically, the third order harmonic distortion increases more than the second order harmonic distortion. The receivers of the THS6007 are voltage feedback amplifiers (VFB). Therefore the amplifiers follow the classical amplifier use of a gain-bandwidth-product. As gain increases, the bandwidth (–3 dB) decreases accordingly. There are no limitations on using capacitors within the feedback loop of VFB amplifier circuits. Figures 56 through 67 show the effects of feedback resistance and gain versus frequency. Using these graphs as a reference point is highly recommended. offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF IIB– RG + – VI VO + RS ǒ ǒ ǓǓ ǒ ǒ ǓǓ IIB+ V OO + VIO 1 ) R R F G " IIB) RS 1 ) R R F G " IIB– RF Figure 81. Output Offset Voltage Model POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION noise calculations and noise figure Noise can cause errors on very small signals. This is especially true for the receiver amplifiers which are generally used for amplifying small signals coming over a transmission line. The noise model for current-feedback amplifiers (CFB) is the same as voltage-feedback amplifiers (VFB). The only difference between the two is that the CFB amplifiers generally specify different current noise parameters for each input while VFB amplifiers usually only specify one noise-current parameter. The noise model is shown in Figure 82. This model includes all of the noise sources as follows: • • • • en = Amplifier internal voltage noise (nV/√Hz) IN+ = Noninverting current noise (pA/√Hz) IN– = Inverting current noise (pA/√Hz) eRx = Thermal voltage noise associated with each resistor (eRx = 4 kTRx ) eRs RS en Noiseless + _ eni IN+ eno eRf Rf eRg IN– Rg Ǹǒ Ǔ Figure 82. Noise Model The total equivalent input noise density (eni) is calculated by using the following equation: e + ni Where: en 2 ǒ ) IN ) Ǔ )ǒ ǒ 2 R S IN– R ǓǓ ǒ Ǔ ø RG ) 4 kTRs ) 4 kT RF ø RG F 2 k = Boltzmann’s constant = 1.380658 × 10–23 T = Temperature in degrees Kelvin (273 +°C) RF || RG = Parallel resistance of RF and RG ǒ Ǔ To get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (eni) by the overall amplifier gain (AV). e no 26 + eni AV + e ni 1 ) RR F (Noninverting Case) G POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION noise calculations and noise figure (continued) As the previous equations show, to keep noise at a minimum, small-value resistors should be used. As the closed-loop gain is increased (by reducing Rg), the input noise is reduced considerably because of the parallel resistance term. This leads to the general conclusion that the most dominant noise sources are the source resistor (RS) and the internal amplifier noise voltage (en). Because noise is summed in a root-mean-squares method, noise sources smaller than 25% of the largest noise source can be effectively ignored. This can greatly simplify the formula and make noise calculations much easier to calculate. This brings up another noise measurement usually preferred in RF applications, noise figure (NF). Noise figure is a measure of noise degradation caused by the amplifier. The value of the source resistance must be defined and is typically 50 Ω in RF applications. NF + ȱȧ ȳȧ Ȳ ȴ e 2 10log e ni Rs Because the dominant noise components are generally the source resistance and the internal amplifier noise voltage, we can approximate the noise figure as: ȱȧ ȡȧǒ ȧȧ )Ȣ ȧȲ e NF + 10log Ǔ )ǒ ) 2 n 1 4 kTR Ǔ ȣȧȤȳȧ 2 IN R S S ȧȧ ȧȴ The Figure 83 shows the noise figure graph for the drivers of the THS6007. Figure 84 shows the noise figure graph for the receivers of the THS6007. 20 18 DRIVER NOISE FIGURE vs SOURCE RESISTANCE 40 TA = 25°C 35 Receiver Noise Figure – dB 16 Driver Noise Figure – dB RECEIVER NOISE FIGURE vs SOURCE RESISTANCE 14 12 10 8 6 f = 10 kHz TA = 25°C 30 25 20 15 10 4 5 2 0 10 100 1k Rs – Source Resistance – Ω 10k 0 10 Figure 83 100 1k 10k Source Resistance – RS (Ω) 100k Figure 84 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION PCB design considerations Proper PCB design techniques in two areas are important to assure proper operation of the THS6007. These areas are high-speed layout techniques and thermal-management techniques. Because the THS6007 is a high-speed part, the following guidelines are recommended. D D Ground plane – It is essential that a ground plane be used on the board to provide all components with a low inductive ground connection. Although a ground connection directly to a terminal of the THS6007 is not necessarily required, it is recommended that the thermal pad of the package be tied to ground. This serves two functions. It provides a low inductive ground to the device substrate to minimize internal crosstalk and it provides the path for heat removal. Input stray capacitance – To minimize potential problems with amplifier oscillation, the capacitance at the inverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting input must be as short as possible, the ground plane should be removed under any etch runs connected to the inverting input, and external components should be placed as close as possible to the inverting input. This is especially true in the noninverting configuration. An example of this can be seen in Figure 85, which shows what happens when 1.8 pF is added to the inverting input terminal in the noninverting configuration. The bandwidth increases dramatically at the expense of peaking. This is because some of the error current is flowing through the stray capacitor instead of the inverting node of the amplifier. Although, in the inverting mode, stray capacitance at the inverting input has little effect. This is because the inverting node is at a virtual ground and the voltage does not fluctuate nearly as much as in the noninverting configuration. DRIVER NORMALIZED FREQUENCY RESPONSE vs FREQUENCY Normalized Frequency Response – dB 3 2 1 VCC = ±15 V VI = 200 mV RL = 25 Ω RF = 1 kΩ Gain = 1 0 CI = 0 pF (Stray C Only) –1 –2 CI = 1.8 pF 1 kΩ –3 –4 Cin Vin –5 –6 –7 100 Vout – + 50 Ω RL = 25 Ω 1M 10M 100M 500M f – Frequency – Hz Figure 85. Driver Normalized Frequency Response vs Frequency 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION PCB design considerations (continued) D Proper power supply decoupling – Use a minimum of a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting etch makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminal and the ceramic capacitors. Because of its power dissipation, proper thermal management of the THS6007 is required. Although there are many ways to properly heatsink this device, the following steps illustrate one recommended approach for a multilayer PCB with an internal ground plane. 1. Prepare the PCB with a top side etch pattern as shown in Figure 86. There should be etch for the leads as well as etch for the thermal pad. 2. Place the thermal transfer holes in the area of the thermal pad. These holes should be 13 mils in diameter. They are kept small so that solder wicking through the holes is not a problem during reflow. 3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps dissipate the heat generated by the IC. These additional vias may be larger than the 13-mil diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad area to be soldered so that wicking is not a problem. 4. Connect all holes to the internal ground plane. 5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the IC package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole. 6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its thermal transfer holes exposed. The bottom-side solder mask should cover the thermal transfer holes of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the reflow process. 7. Apply solder paste to the exposed thermal pad area and all of the IC terminals. 8. With these preparatory steps in place, the THS6007 IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 29 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION PCB design considerations (continued) Thermal pad area (0.12 x 0.3) with 10 vias (Via diameter = 13 mils) Figure 86. PowerPAD PCB Etch and Via Pattern The actual thermal performance achieved with the THS6007 in its PowerPAD package depends on the application. In the previous example, if the size of the internal ground plane is approximately 3 inches × 3 inches, then the expected thermal coefficient, θJA, is about 27.9_C/W. For a given θJA, the maximum power dissipation is shown in Figure 87 and is calculated by the following formula: P D + ǒ Ǔ T –T MAX A q JA Where: PD = Maximum power dissipation of THS6007 (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature (°C) θJA = θJC + θCA θJC = Thermal coefficient from junction to case (0.72°C/W) θCA = Thermal coefficient from case to ambient It is recommended to design the system to keep the junction temperature (TJ) at a minimum of 125°C. Junction temperatures higher 125°C than can lead to increased output distortion. Additionally, because the heat of the device is dissipated through the PCB, care must be taken to ensure the PCB does not become thermally saturated. Once this happens, the power dissipation of the system (PCB and active devices) becomes very in-efficient and the performance will suffer. More complete details of the PowerPAD installation process and thermal management techniques can be found in the Texas Instruments Technical Brief, PowerPAD Thermally Enhanced Package. This document can be found at the TI web site (www.ti.com) by searching on the key word PowerPAD. The document can also be ordered through your local TI sales office. Refer to literature number SLMA002 when ordering. 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION PCB design considerations (continued) MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE 8 θJA = 27.9 _C/W 2 oz. Trace and Copper Pad With Solder Maximum Power Dissipation – W 7 6 TJ = 150 _C 5 4 3 2 1 0 –40 θJA = 56.2 _C/W 2 oz. Trace and Copper Pad Without Solder –20 0 20 40 60 80 100 TA – Free-Air Temperature – _C Figure 87. Maximum Power Dissipation vs Free-Air Temperature POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 31 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION general configurations A common error for the first-time CFB user is to create a unity gain buffer amplifier by shorting the output directly to the inverting input. A CFB amplifier in this configuration is now commonly referred to as an oscillator. The THS6007 drivers, like all CFB amplifiers, must have a feedback resistor for stable operation. Additionally, placing capacitors directly from the output to the inverting input is not recommended. This is because, at high frequencies, a capacitor has a very low impedance. This results in an unstable amplifier and should not be considered when using a current-feedback amplifier. Because of this, integrators and simple low-pass filters, which are easily implemented on a VFB amplifier, have to be designed slightly differently. If filtering is required, simply place an RC-filter at the noninverting terminal of the operational-amplifier (see Figure 88). RG RF V O V I – VO + VI R1 f –3dB C1 ǒ Ǔǒ + 1 ) RRF 1 G Ǔ ) sR1C1 1 1 + 2pR1C1 Figure 88. Single-Pole Low-Pass Filter If a multiple pole filter is required, a Sallen-Key filter can work very well with CFB amplifiers. This is because the filtering elements are not in the negative feedback loop and stability is not compromised. Because of their high slew-rates and high bandwidths, CFB amplifiers can create very accurate signals and help minimize distortion. An example is shown in Figure 89. C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RG RF RG = Figure 89. 2-Pole Low-Pass Sallen-Key Filter 32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 –3dB + 2p1RC ( RF 1 2– Q ) THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 APPLICATION INFORMATION general configurations (continued) THS6007 driver amplifiers can also be used as very good video distribution amplifiers. One characteristic of distribution amplifiers is the fact that the differential phase (DP) and the differential gain (DG) are compromised as the number of lines increases and the closed-loop gain increases. Be sure to use termination resistors throughout the distribution system to minimize reflections and capacitive loading. 620 Ω 620 Ω 75 Ω – 75 Ω Transmission Line VO1 + VI 75 Ω 75 Ω THS6007 N Lines 75 Ω VON 75 Ω Figure 90. Video Distribution Amplifier Application driving a capacitive load Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are taken. The first is to realize that the THS6007 has been internally compensated to maximize its bandwidth and slew rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of the amplifier, as shown in Figure 91. A minimum value of 20 Ω should work well for most applications. For example, in 75-Ω transmission systems, setting the series resistor value to 75 Ω both isolates any capacitance loading and provides the proper line impedance matching at the source end. 1.3 kΩ 1.3 kΩ Input _ THS6007 Receiver 20 Ω Output + CLOAD Figure 91. Driving a Capacitive Load POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 33 THS6007 DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS SLOS334– DECEMBER 2000 MECHANICAL INFORMATION PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE 20 PINS SHOWN 0,30 0,19 0,65 20 0,10 M 11 Thermal Pad (See Note D) 4,50 4,30 0,15 NOM 6,60 6,20 Gage Plane 1 10 0,25 A 0°– 8° 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 14 16 20 24 28 A MAX 5,10 5,10 6,60 7,90 9,80 A MIN 4,90 4,90 6,40 7,70 9,60 DIM 4073225/F 10/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusions. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. E. Falls within JEDEC MO-153 PowerPAD is a trademark of Texas Instruments. 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 19-Oct-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing THS6007IPWP ACTIVE HTSSOP PWP Pins Package Eco Plan (2) Qty 28 50 TBD Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-2-220C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. 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