WIRELESS COMMUNICATIONS DIVISION TQ5121 N/C 1 16 Optional GND N/C 2 15 N/C Vdd MXR 3 14 Mixer IF/ Vdd MXR LO 4 13 GND 5 12 MXR RF GND 6 11 GND RF IN 7 10 LNA Out GND 8 9 N/C VDD LNA DATA SHEET 3V Cellular TDMA/AMPS LNA/mixer Receiver IC Features §Pin compatible with TQ9222 (dual-band TDMA receiver) §Single 3V operation §Low-current operation Product Description The TQ5121 is a 3V, RF receiver IC designed specifically for Cellular band TDMA applications. It’s RF performance meets the requirements of products designed to the IS-136 and AMPS standards. The TQ5121 is pin compatible with TQ9222, which enables handset designers to use strategic board platform strategy. The TQ5121 contains LNA+Mixer circuits to handle the 800MHz cellular band. The mixer uses a high-side LO frequency, with the IF covering a range of 70 to 140MHz. Most RF ports are internally matched to 50 Ω, greatly simplifying the design and keeping the number of external components to a minimum. The TQ5121 achieves good RF performance with low current consumption, supporting long standby times in portable applications. Coupled with the very small QSOP-16 package, the part is ideally suited for Cellular band mobile phones. Electrical Specifications1 Min Frequency 869 Typ Max Units 894 MHz 17.5 dB Noise Figure 2.7 dB 3rd -8.5 dBm 10.0 mA Input Order Intercept DC supply Current §QSOP-16 plastic package Applications §IS-136 Mobile Phones §AMPS Mobile Phones §ISM 900MHz Parameter Gain §50 Ω matched inputs Note 1: Test Conditions: Vdd=2.8V, Ta=25C, filter IL=2.5dB, RF=881MHz, LO=991MHz, IF=110MHz, LO input=-7dBm For additional information and latest specifications, see our website: www.triquint.com 1 TQ5121 Data Sheet Electrical Characteristics Parameter Conditions Min. RF Frequency Cellular band LO Frequency IF Frequency Typ/Nom Max. Units 869 894 MHz Cellular band 950 1040 MHz Cellular band 70 140 MHz LO input level -7 -4 0 dBm Supply voltage 2.7 2.8 4.0 V Gain 16.0 17.5 Gain Variation vs. Temp. -40 to 85C -2.0 Noise Figure 2.7 Input 3rd Order Intercept Return Loss Isolation IF Output Impedance -11.0 dB +2.0 dB 3.5 dB -8.5 dBm LNA input – external match 10 dB LNA output 10 dB Mixer RF input 10 dB Mixer LO input 10 dB LO to LNA in 40 dB LO to IF; after IF match 40 dB RF to IF; after IF match 40 dB Vdd = 2.8V; “ON” 500 Ohm Vdd = 0V; “OFF” <50 Ohm Supply Current Temperature -40 10 13 mA 25 85 C Note 1: Test Conditions: Vdd=2.8V, filter IL=2.5dB, RF=881MHz, LO=991MHz, IF=110MHz, LO input=-7dBm, TC = 25°C, unless otherwise specified. Absolute Maximum Ratings Parameter Value Units DC Power Supply 5.0 V Power Dissipation 500 mW Operating Temperature -55 to 100 C Storage Temperature -60 to 150 C Signal level on inputs/outputs +20 dBm Voltage to any non supply pin +.3 V 2 For additional information and latest specifications, see our website: www.triquint.com TQ5121 Data Sheet Typical Performance Test Conditions (Unless Otherwise Specified): Vdd=2.8V, Ta=25C, filter IL=2.5dB, RF=881MHz, LO=991MHz, IF=110MHz, LO input=-7dBm IIP3 vs. Vdd vs. Temp -6 19 18 -7 -8 17 16 IIP3 (dBm) Gain (dB) CG vs. Freq vs. Temp 20 15 14 -40C +25C +85C 13 12 -9 -10 -11 -40C +25C +85C -12 -13 11 10 -14 869 872 875 878 881 884 Freq (MHz) 887 890 893 2.5 2.6 2.8 CG vs. Temp vs. Vdd 3 3.1 3.2 IIP3 vs. Temp vs. Vdd -7 -7.5 Vdd=2.7v Vdd=2.8v Vdd=3.0v -8 IIP3 (dBm) 19 18.5 18 17.5 17 16.5 16 -8.5 -9 -9.5 Vdd=2.7 Vdd=2.8 Vdd=3.0 -10 -10.5 15.5 15 -11 -40 25 85 -40 25 Temp C Temp C CG vs. Vdd vs. Temp 85 Noise Figure vs. Freq vs. Temp 20 4 3.75 18 3.5 -40C +25C +85C 3.25 16 14 +25C 12 +85C NF Gain (dB) 2.9 Vdd (volts) 20 19.5 Gain (dB) 2.7 3 2.75 -40C 2.5 2.25 2 10 2.5 2.6 2.7 2.8 2.9 Vdd (volts) 3 3.1 3.2 869 872 875 878 881 884 887 890 893 Freq (MHz) For additional information and latest specifications, see our website: www.triquint.com 3 TQ5121 Data Sheet Application/Test Circuit N/C 1 16 N/C 2 15 3 14 4 13 5 12 6 11 7 10 8 9 L2 Vdd MXR 800 C3 MXR LO 800 VDD LNA 800 C2 RF IN 800 N/C C4 Mixer IF 800 C6 L3 C5 Vdd MXR Band Pass Filter C1 Lx N/C L1 Bill of Material for TQ5121 Receiver Application/Test Circuit Component Reference Designator Part Number Receiver IC U1 TQ5121 Capacitor C1 1.2pF 0402 Capacitor C2, C3 1000pF 0402 Capacitor C4 10pF 0402 Capacitor C5 .01µF 0402 Capacitor C6 8.2 pF 0402 Inductor L1, L2 10nH 0402 Inductor L3 180nH 0402 Inductor Lx (filter dependent) 10nH 0602 Toyocom (select) 4 F1 T726881A Value 627-881A For additional information and latest specifications, see our website: www.triquint.com Size Manufacturer QSOP-16 TriQuint Semiconductor Toyocom TQ5121 Data Sheet TQ5121 Product Description Fig 2. Suggested LNA Input Match The TQ5121 3V RFIC Downconverter is designed specifically for cellular band TDMA applications. The TQ5121 contains a LNA+Mixer circuit to handle the 800 MHz cellular band. The IF frequency range covers 70 to 140 MHz with most of the ports internally matched to 50 Ω simplifying the design and keeping the number of external components to a minimum. 1.2pF Pin 7 10nH Note: These values assume ideal components and neglect board parasitic. The discrepancy between these values and those of the typical application circuit are the board and component parasitic presented to the input pin. Highest gain and lowest return loss Operation occur when Γs is equal to the complex conjugate of the LNA Please refer to the test circuit above. Low Noise Amplifier (LNA) The LNA section of the TQ5121 consists of a cascaded common source FETs (see Fig 1). The LNA is designed to operate on supply voltages from 3V to 5V. The source terminal has to be grounded very close to the pin, this will avoid a significant gain reduction due to degeneration. The LNA requires a matching circuit on the input to provide superior noise, gain and return loss performance. The output is close to 50 Ω for direct connection to a 50 Ω image stripping filter. Vdd Fig 1. TQ5121 Simplified Schematic of LNA Section LNA in RF IN input impedance. A different source reflection coefficient, Γopt, which is experimentally determined, will provide the lowest possible noise figure, Fmin. The noise resistance, Rn, provides an indication of the sensitivity of the noise performance to changes in Γs as seen by the LNA input. 4 RN Γopt − ΓS ⋅ FLNA = FMIN + Z 0 1 + Γopt 2 ⋅ 1 − Γs 2 2 ( Components such as filters and mixers placed after the LNA degrade the overall system noise figure according to the following equation: LOAD LNA out BIAS BIAS LNA Input Match To obtain the best possible combination of performance and flexibility, the LNA was designed to be used with off-chip impedance matching on the input. Based on the system requirements, the designer can make several performance trade-offs and select the best impedance match for the particular application. The input matching network primarily determines the noise and gain performance. Fig 2 shows a suggested input match using a series 1.2pF capacitor and a shunt 10nH inductor. ) F SYSTEM = F LNA + F2 − 1 GLNA FLNA and GLNA represent the linear noise factor and gain of the LNA and F2 is the noise factor of the next stage. Thus, the system noise figure depends on the highest gain and minimum noise figure of the LNA. Designing the input matching network involves a compromise between optimum noise performance and best input return loss. For example, when the TQ5121 LNA is matched for optimum noise figure (1.35dB @ 880 MHz), the input return loss is approximately 4dB. On the other hand, when the LNA is matched for best return loss, the LNA noise figure is approximately 1.95dB @ 881 MHz. See Table 1 for noise parameters. The LNA gain, noise figure and input return loss are a function of the source impedance (Zs), or reflection coefficient (Γs), For additional information and latest specifications, see our website: www.triquint.com 5 TQ5121 Data Sheet Table 1. TQ5121 Noise Parameters Freq (MHz) 835 850 865 880 895 910 925 |Gopt| <Gopt 0.678 0.655 0.652 0.652 0.649 0.659 0.687 33 34 36 38 38 40 41 Fmin (dB) 1.34 1.38 1.36 1.35 1.36 1.35 1.35 Rn (W) 61.6 61.1 61.2 60.9 61.3 61.2 65.6 The output impedance of the LNA was designed to interface directly with 50Ω terminations. This internal match serves to reduce the number of external components required at this port. An additional benefit accrues as an improvement in IP3 performance, return loss and power gain. The output of the LNA will most often be connected to an image stripping filter. Depending on the filter type, additional components might be needed to present a better match to the LNA output. The TQ5121 general applications circuit (page 4) shows a TOYOCOM (637-881A) saw filter. A series inductor “Lx”of 10nH is added to the filter input to improve the match. This series inductor also smoothes out excessive ripple in the filter passband improving the overall performance of the circuit. Mixer The mixer of the TQ5121 is implemented by a common source depletion FET. The mixer is designed to operate on supply voltages from 3V to 5V. An on-chip buffer amplifier simplifies direct connection of the LO input to a commercial VCO at drive levels down to -7dBm. The common-gate LO buffer provides a good input match, and supplies the voltage gain necessary to drive the mixer FET gate. The "open-drain " IF output allows for Fig 3. Mixer Section Mixer LO Input 6 Mixer: LO Port As mentioned earlier, a common gate buffer amplifier is positioned between the LO port and the mixer FET gate in order to provide a good impedance to the VCO and to allow operation at lower LO drive levels. The buffer amplifier provides the voltage gain needed to drive the gate of the mixer FET while consuming very little current (approximately 1.5mA). Because of the broadband 50Ω input impedance of the buffer amplifier and the internal DC blocking capacitor, the user’s VCO LNA Output Match LO Bias and Tuning flexibility in matching to various IF frequencies and filter impedance’s. See Figure 3. Mixer RF Input Mixer IF Output can be directly connected to the LO input via a 50Ω line with no additional components. Mixer Input Although the mixer input port has been designed with a 50Ω impedance, it has been found that LO leakage out through the pin, can in some cases, reflect off the SAW filter and travel back to the mixer input out of phase, causing some degradation in conversion gain and system noise figure. Sensitivity to the phenomena depends on the particular filter model and SAWmixer transmission line length. LO Buffer Tune While the broadband input match of the LO buffer amplifier makes interfacing easy, the broadband gain means that thermal and induced noise at other frequencies can be amplified and injected directly into the LO port of the mixer. Noise at the IF frequency, and at LO +/- IF will be downconverted and emerge at the IF port, degrading the downconverter noise figure. As indicated on the diagram of Fig 4, in order to test the LO response to these spurious signals, a two-tone signal was injected into the LO port with the RF port terminated in 50Ω. One signal generator is set to the LO frequency at its normal LO drive level usually (-7 dBm). The second signal generator (spurious signal) is set to the LO +/- the IF frequency. The combined input power at mixer LO port has to be less than -50 dBm. The results shown in Table 3 indicate a good suppression of the interfering signals. For additional information and latest specifications, see our website: www.triquint.com TQ5121 Data Sheet Measuring the LO Frequency Response Fig 4. LO Spurious Response Diagram TQ5121 Mixer RF Spectrum Analyzer IF 50 W LO + SIG 1: flo Directional Coupler The frequency response of the LO driver amplifier can be measured using a semi-rigid probe (see Fig. 5) and a network analyzer. Connect port 1 to the LO input (Pin 4) of the TQ5121 with the source power set to deliver -7 dBm. Connect the coaxial probe to Port 2 and place the probe tip approximately 0.1 inch away from either Pin 3 or the inductor. Fig 5. LO Buffer Frequency Response SIG 2: flo +/- IF Network Analyzer Port 1 Port 2 Table 3. LO Spurious Response Data Mixer LO Port C/V (MHz) Input Power (dB) 991/1101 -57 -71.7 991/1101 -58.9 -71.8 Calculation of Nominal L Value The node between the LO buffer amplifier and the mixer FET is brought out to Pin 3 (L_tune) and connected to a shunt inductor to AC ground. This inductor is selected to resonate with internal capacitance at the LO frequency in order to suppress out-ofband gain and improve noise performance. The internal capacitance of the LO amplifier output plus the stray capacitance on the board surrounding Pin 3 is approximately 1.8 pF. The inductor is selected to resonate with the total capacitance at the LO frequency using the following equation: Probe 3 4 TQ5121 -30 -32 S21 (dB) LO/Spurious -34 -36 -38 -40 -42 700 800 900 1000 1100 1200 Frequency (MHz) If the calculated shunt inductor (L2) is not a standard value, the AC ground, implemented with C3, can be slide along the transmission line to adjust for the right inductance (fig 6). Once this is completed, the peak of the response should be centered at the center of the LO frequency band. Fig 6. Adjusting the AC Ground Ground C(2Π f ) 2 , where ⋅C = 1.5 pF TQ5121 L= 1 Must be confirmed with measurements on a board approximating the final layout. 3 Placement of inductor will adjust between standard values For additional information and latest specifications, see our website: www.triquint.com 7 TQ5121 Data Sheet Mixer IF Port The Mixer IF output is an "open-drain" configuration, allowing for flexibility in efficient matching to various filter types and at various IF frequencies. For evaluation of the LNA and mixer, it is usually necessary to impedance match the IF port to the 50Ω test systems. When verifying or adjusting the matching circuit on the prototype circuit board, the LO drive should be injected at pin 4 at the nominal power level of -7 dBm, since the LO level does have an impact on the IF port impedance. There are several networks that can be used to properly match the IF port to the SAW or crystal IF filter. The mixer supply voltage is applied through the IF port, so the matching circuit topology must contain either an RF choke or shunt inductor. An extra DC blocking capacitor is not necessary if the output will be attached directly to a SAW or crystal bandpass filters. Figure 7 shows the IF matching network, A shunt L, series C, shunt C, is the simplest and requires the fewest components. DC current can be easily injected through the shunt inductor and the series C provides a DC block, if needed. The shunt C, is used to reduce the LO leakage. Fig 7. IF Output Match (110MHz) 10pF Pin 14 8.2pF 180nH 0.01uF 10Ω Mx IF out Vdd Note: These values assume ideal components and neglect board parasitics. The discrepancy between these values and those of the typical application circuit are the board and component parasitics 8 For additional information and latest specifications, see our website: www.triquint.com TQ5121 Data Sheet Package Pinout N/C 1 16 Optional GND N/C 2 15 N/C Vdd MXR 3 14 Mixer IF/ Vdd MXR LO 4 13 GND 5 12 MXR RF GND 6 11 GND RF IN 7 10 LNA Out GND 8 9 N/C VDD LNA Pin Descriptions Pin Name Pin # Description and Usage N/C 1 No Connection N/C 2 No Connection VDD_MXR 3 Mixer LO buffer supply voltage. Local bypass capacitor required. MXR_LO 4 Mixer LO input. DC blocked, matched to 50Ω VDD_LNA 5 LNA supply voltage. Local bypass capacitor required. GND 6 Ground LNA_IN 7 LNA input. DC blocked. Requires external matching elements for noise match and match to 50Ω GND_LNA 8 LNA first stage ground connection. Connection to ground. N/C 9 No connection LNA_OUT 10 LNA output. DC blocked. Matched to 50Ω. GND 11 Ground MXR_RF 12 Mixer RF input, DC blocked. Matched to 50Ω. GND 13 Ground MXR_IF 14 Mixer IF output. Open drain output, connection to Vdd required. External matching is required. N/C 15 No connection Optional GND 16 Optional ground For additional information and latest specifications, see our website: www.triquint.com 9 TQ5121 Data Sheet Package Type: Power QSOP-16 Plastic Package D NOTE A E E1 b NOTE B c A e DESIGNATION A A1 b c D e E E1 L θ A1 DESCRIPTION OVERALL HEIGHT STANDOFF LEAD WIDTH LEAD THICKNESS PACKAGE LENGTH LEAD PITCH LEAD TIP SPAN PACKAGE WIDTH FOOT LENGTH FOOT ANGLE L ENGLISH 0.064 +/-.005 in 0.007 +/-.003 in 0.010 +/-.002 in 0.085 +/-.015 in 0.193 +/-.004 in 0.025 BSC 0.236 +/-.008 in 0.154 +/-.003 in 0.033 +/-.017 in 4 +/-4 DEG θ 1.63 0.18 0.25 2.16 4.90 0.635 5.99 3.91 0.84 4 METRIC +/-.13 mm +/-.08 mm +/-.05 mm +/-.38 mm +/-.10 mm BSC +/-.20 mm +/-.08 mm +/-.43 mm +/-4 DEG NOTE C C C C A, C C B, C C NOTES: A. THE D DIMENSION DOES NOT INCLUDE MOLD FLASHING AND MISMATCH. MOLD FLASHING AND MISMATCH SHALL NOT EXCEED .006 in (.15 mm) PER SIDE. B. THE E1 DIMENSION DOES NOT INCLUDE MOLD FLASHING AND MISMATCH. MOLD FLASHING AND MISMATCH SHALL NOT EXCEED .010 in (.25 mm) PER SIDE. C. PRIMARY UNITS ARE ENGLISH INCHES. THE METRIC EQUIVALENTS ARE SUBJECT TO ROUNDING ERROR. Additional Information For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: [email protected] Tel: (503) 615-9000 Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: [email protected] The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright © 1998 TriQuint Semiconductor, Inc. All rights reserved. Revision C, August 6, 1999 10 For additional information and latest specifications, see our website: www.triquint.com