Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS JULY 1994 DS2431-2.1 MV95308 30MHz 8-BIT CMOS VIDEO DAC The MV95308 is a CMOS 8-bit, 30MHz Digital to Analog converter, designed for use in both video graphics and general digital television applications. A very low external component count has been achieved by including the loop amplifier and reference voltage source on chip. The device contains a data input register and registered video controls (BLANK, REFWHITE, OVERBRT and SYNC). These control inputs and associated internal circuitry allows the MV95308 to be used in video graphics systems by providing the necessary video pedestal levels. The STRDAC input allows the video pedestals to be disabled in conventional DAC applications. This device is capable of directly driving 75Ω lines with standard RS-343A or RS-170 video levels, using the appropriate RSET external resistor. Pull up resistors have been added to tie all unused control inputs into their inactive (High) states. FEATURES ■ Low Power Consumption (180mW Typ) ■ 30MHz Pipeline Operation ■ ±1 LSB Differential Linearity Error ■ ±1 LSB Integral Linearity Error ■ RS-343A/RS-170 Compatible Levels ■ On Chip Reference Voltage Source ■ Guaranteed Monotonic ■ Drives 75Ω Loads Directly ■ Single 5V Power Supply ORDERING INFORMATION MV95308 ADG (Military - Ceramic DIL Package) MV95308 CDP (Commercial - Plastic DIL Package) MV95308 CMP (Commercial - Miniature Plastic DIL Package) BLANK 1 20 V DD CLK 2 19 REFWHITE MSB D 7 3 18 0VERBR T D6 4 17 SYNC D5 5 16 STRD AC IOUT D4 6 15 D3 7 14 GND D2 8 13 IOUT D1 9 12 R SET 10 11 V REF LSB D 0 DP20 MP20 Fig.1 Pin connections - top view APPLICATIONS ■ Data Conversion (general) ■ Computer Graphics ■ Waveform Synthesis ■ Consumer TV ■ Instrumentation ABSOLUTE MAXIMUM RATINGS (Reference to GND) DC Supply Voltage, VDD -0.3 to +7V Digital Input Voltage -0.3 to VDD +0.3V Analog Output Short Circuit Duration Indefinite Ambient Operating Temperature A grade -55°C to +125°C C grade 0°C to + 70°C Storage Temperature Range -55°C to +125°C Fig.2 Block diagram of MV95308 MV95308 ELECTRICAL CHARACTERISTICS These characteristics are guaranteed over the following conditions (unless otherwise stated): As specified in recommended operating conditions. Full temperature range: A grade = -55°C to +125°C, C grade = 0 to 70°C DC CHARACTERISTICS Symbol Resolution Integral linearity error INL Differential linearity error DNL Gain error Analog output Grey scale current range Temp (°C) Full 25 Full 25 Full 25 Min. Value Typ. Max. 8 ±0.5 ±0.5 ±1% 25 8.8 255 27 10 276 100 21 7.5 255 92.5 111 40 0 2.58 ±1 ±1 ±5% 28 10% Over Bright level relative to White level White level relative to Blank level 25 26 25 275 Black level relative to Blank level 25 20 White level relative to Black level 25 Blank level 25 107 LSB VOC 25 25 25 -0.3 +1.5 VIH VIL IIH IIL VREF 25 25 25 25 25 Full 3 GND-0.3 VDD+0.3 1.2 +1 -1 1.05 1.10 Sync level LSB size Output compliance Digital inputs High level I/P voltage Low level I/P voltage High level I/P current Low level I/P current Internal voltage reference (VREF) 0.95 0.90 1.0 277 22 115 40 VREF temperature coefficient Units Conditions Bits LSB LSB LSB LSB % mA LSB LSB IRE LSB IRE LSB IRE LSB IRE LSB IRE LSB mV V Of full scale 144424443 Parameter 75Ω singly terminated load RSET = 1.8kΩ (graphics mode) V V µA µA V V ppm/°C AC CHARACTERISTICS (Refer to Fig. 3) Symbol Temp (°C) Min. Max clock rate fMAX Full Clock high time Clock low time tCLKH tCLKL Data and control setup time Data and control hold time Analog output delay Analog output rise/fall time Analog output settling time Glitch energy VDD supply current Parameter Units Conditions 30 MHz maximum guaranteed freq. 25 25 10 10 ns ns tSU tH 25 25 8 2 ns ns tDLY tRF tS 25 25 25 25 25 IDD THERMAL CHARACTERISTICS Thermal Resistance Chip to case θjC Chip to ambient θjA 2 DP 20 75 Value Typ. 10 3 15 100 30 36 Max. 6 ns ns ns pV-sec mA mA fc = 15MHz fc = 30MHz RECOMMENDED OPERATING CONDITIONS MP 30 93 °C/W °C/W RLOAD (IOUT and IOUT) VDD RSET (graphics applications) RSET (straight DAC applications) 75Ω 5.0V ± 0.5V 1.8kΩ 1.2kΩ MV95308 CIRCUIT DESCRIPTION As illustrated in the function block diagram, Fig. 2, the MV95308 contains an 8-bit D-to-A converter, input registers, a loop amplifier and a voltage reference. On the falling edge of each clock cycle, as shown in Fig. 3, eight data bits are latched into the device and passed to the 8-bit D-to-A converter. Also latched on the falling edge of the clock signal, the SYNC and BLANK inputs add the necessary weighted currents to the analog outputs to produce the required output levels for use in video applications. Table 1 details how the SYNC, BLANK, REFWHITE and OVERBRT inputs modify the DAC output levels. To obtain a high data throughput rate, the decoding logic of the MV95308 is fully pipelined. This introduces a one clock cycle delay between the latching of the input data and the resultant DAC output. It also ensures synchronisation of the internal data and a minimal output glitch energy. The DAC employed by the MV95308 eliminates the need for precision component ratios by using segmented architecture in which equal weight bit currents are either routed to IOUT or IOUT. The use of identical current sources and current steering their outputs means that monotonicity is guaranteed. The MV95308 eliminates the need for an external voltage reference by providing a nominally 1.0V reference on chip. An on-chip loop amplifier also provides stability of the full scale output current against power supply and temperature variations. The full scale output current is set by an external resistor RSET. By adjustment of this value it is possible to implement RS-343A or RS-170 video levels as explained in the application notes. Fig.3 Timing diagram Description STRDAC SYNC BLANK REFWHITE OVERBRT OUTPUT DATA IOUT (LSB) REFWHITE + 10% 1 1 1 0 0 X 414 REFWHITE 1 1 1 0 1 X 387 FULL WHITE 1 1 1 1 1 $FF 387 OVERBRIGHT 1 1 1 1 0 DATA DATA + 132 + 27 FULL BLACK 1 1 1 1 1 $00 132 BLANK 1 1 0 X X X 111 DATA-SYNC 1 0 1 1 1 DATA DATA + 21 SYNC 1 0 0 X X X 0 STRDAC MODE 0 X 1 1 X DATA DATA Table 1: Video output truth table 3 MV95308 Pin Name Description 2 CLK 3-10 D7-D0 13,15 IOUT, IOUT 14 GND Analog ground for the DAC. 20 VDD Analog power for the DAC 11 VREF The output of the internal voltage reference generator. This output is nominally 1V, and should be decoupled with a 10nF capacitor. 12 RSET The full scale adjust control. The RSET resistor is connected from this pin to ground. An internal loop amplifier adjusts a reference current flowing through the RSET resistor so that the voltage across the resistor is equal to the VREF voltage. This reference current has a weighting equal to 16 LSB’s. 1 BLANK The composite blank control input. A logical zero on this input removes the Black pedestal from the IOUT output, whilst forcing the internal data to the DAC to $00. This input is latched on the clock falling edge and will override the REFWHITE and OVERBRT inputs. The Black pedestal is 7.5 IRE units (actually 21 LSB’s). If left open circuit this input is internally tied high. 17 SYNC The composite sync control input. A logical zero on this input removes the Blank pedestal from the IOUT output. The Blank pedestal is nominally 40 IRE units (actually 111 LSB’s). The SYNC input does not override any other control lines. This input is latched on the clock falling edge. If left open circuit this input is internally tied high. 19 REFWHITE The reference white level control input. A logical zero on this input overrides the input data, forcing the data to $FF. The BLANK input will override this input. If left open circuit this input is internally tied high. 18 OVERBRT The 10% overbright control input. A logical zero on this input switches the Overbright pedestal into the IOUT output. The Overbright pedestal is 10 IRE units (actually 27 LSB’s). This input does not override any other input. The BLANK input overrides this input. If left open circuit this input is internally tied high. 16 STRDAC The straight DAC control input. A logical zero on this input causes the Black, Blank and Overbright pedestals to be disabled, removing them from both IOUT and IOUT. This allows the DAC contribution to the output to be extended to a full 1 Volt. To obtain this extra DAC range, it is necessary to reduce the RSET resistor value, see application notes. The BLANK the REFWHITE inputs may still be used to force the input data to $00 or $FF respectively. With the STRDAC pin held low the output current can be calculated from: The clock input. The falling edge of the clock latches the DATA, BLANK, SYNC, OVERBRT and REFWHITE inputs into the logic pipeline. The decoded data will be latched into the DAC output 1 clock cycle later. The clock frequency determines the update rate of the DAC output. The data inputs. D0 is the least significant bit (LSB). The coding is in straight binary only. The current output and its complement. These are the high impedance current source outputs of the DAC capable of driving a 75Ω load up to a voltage of 1.5V. Output current = Data x 1 LSB Where 1 LSB= VREF 16 x RSET Full scale = 255 LSB VREF = 1.0V typ. The exact value of 1 LSB must be calculated from the full scale output. If left open circuit this input is internally tied high and the device will be configured for video graphics. In this mode the output current can be calculated from: Output current = (DATA + 21 + 111) x 1 LSB VREF = 1.0V typ. 4 MV95308 APPLICATIONS INFORMATION PCB LAYOUT CONSIDERATIONS RS-343A and RS-170 Video Generation For generation of RS-343A compatible video levels (see Fig.4) it is recommended that a singly terminated 75Ω load be used with an RSET resistor value of approximately 1.82kΩ Similarly for the generation of RS-170 video levels a singly terminated 75Ω load should be used but in association with an RSET value of approximately 1.29kΩ to provide the increased voltage range. The PCB layout should provide low noise on the MV95308 power and ground lines by shielding the digital inputs and providing adequate decoupling. The PCB should utilise both power and ground planes for best performance, connecting both planes to their respective regular PCB planes through a ferrite bead located as close as possible to the device. For best performance, a 100nF capacitor should be used to decouple the reference and supply pins. Decoupling should take place as close to the device as possible to reduce lead inductance. The digital inputs to the device should be isolated as much as possible from the analog outputs and other analog circuitry and should not overlay the analog ground and power planes. To reduce noise pick-up, long clock lines to the device should be avoided. For best performance the analog output should have a 75Ω load connected to analog ground. Non-Video Applications The MV95308 may be used in non-video applications as explained in the pin description for STRDAC mode.The relationship between RSET and the full scale output current has been explained previously and for a singly terminated 75Ω load an RSET resistor value of approximately 1.19kΩ should be used. Fig.4 Composite video output waveform Fig.5 Applications/test board 5 MV95308 HEADQUARTERS OPERATIONS GEC PLESSEY SEMICONDUCTORS Cheney Manor, Swindon, Wiltshire, United Kingdom. SN2 2QW Tel: (01793) 518000 Fax: (01793) 518411 GEC PLESSEY SEMICONDUCTORS P.O. Box 660017, 1500 Green Hills Road, Scotts Valley, California 95067-0017, United States of America. Tel (408) 438 2900 Fax: (408) 438 5576 CUSTOMER SERVICE CENTRES • FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45 Fax: (1) 64 46 06 07 • GERMANY Munich Tel: (089) 3609 06-0 Fax: (089) 3609 06-55 • ITALY Milan Tel: (02) 66040867 Fax: (02)66040993 • JAPAN Tokyo Tel: (03) 5276-5501 Fax: (03) 5276-5510 • NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023 • SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872 • SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36 • TAIWAN, ROC Taipei Tel: 886 2 5461260 Fax: 886 2 7190260 • UK, EIRE, DENMARK, FINLAND & NORWAY Swindon Tel: (01793) 518510 Fax: (01793) 518582 These are supported by Agents and Distributors in major countries world-wide. © GEC Plessey Semiconductors 1994 Publication No.DS2431 Issue No. 2.1 July 1994 TECHNICAL DOCUMENTATION - NOT FOR RESALE. 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