ZL60101/2 12 x 2.7 Gbps Parallel Fiber Optic Link Transmitter and Receiver Data Sheet June 2004 Ordering Information ZL60101/MJD Parallel Fiber Transmitter ZL60102/MJD Parallel Fiber Receiver Heat sink and EMI shield options are available upon request 0°C to +80°C Features • • • • • • • • • • • • Description 12 parallel channels, total 32.6 Gbps capacity Data rate up to 2.72 Gbps per channel 850 nm VCSEL array Data I/O is CML compatible with DC blocking capacitors Link reach 300 m with 50/125 µm 500 MHz.km fiber at 2.5 Gbps Channel BER better than 10-12 Industry standard MPO/MTP ribbon fiber connector interface Pluggable MegArray® ball grid array connector Optionally available with EMI shield and external heat sink Laser class 1M IEC 60825-1:2001 compliant Power supply 3.3 V Compatible with industry MSA The ZL60101 and ZL60102 together make a very high speed transmitter/receiver pair for parallel fiber applications. The ZL60101 transmitter module converts parallel electrical input signals via a laser driver and a VCSEL array into parallel optical output signals at a wavelength of 850 nm. The ZL60102 receiver module converts parallel optical input signals via a PIN photodiode array and a transimpedance and limiting amplifier into electrical output signals. The modules are pluggable each fitted with an industrystandard MegArray® BGA connector. This provides ease of assembly on the host board and enables provisioning of bandwidth on demand. Applications • • • • • High-speed interconnects within and between switches, routers and transport equipment Proprietary backplanes Low cost SONET/SDH VSR (Very Short Reach) OC-192/STM64 connections InfiniBand® connections Interconnects rack-to-rack, shelf-to-shelf, boardto-board, board-to-optical backplane 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003-4, Zarlink Semiconductor Inc. All Rights Reserved. ZL60101/2 Data Sheet Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ZL60101 Transmitter Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Transmitter Control and Status Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Transmitter Control and Status Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Transmitter Pinout Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Transmitter Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ZL60102 Receiver Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Receiver Control and Status Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Receiver Control and Status Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Receiver Pinout Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Receiver Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Regulatory Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Eye Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrostatic Discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrostatic Discharge Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electromagnetic Interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Emission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Handling instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Cleaning the Optical Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ESD Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Link Reach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Link Model Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical Interface - Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet Absolute Maximum Ratings Not necessarily applied together. Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Parameter Symbol Min. Max. Unit VCC -0.3 4.0 V 1.2 V Supply voltage Differential input voltage amplitude ∆V 1 Voltage on any pin VPIN -0.3 VCC + 0.3 V Relative humidity (non-condensing) MOS 5 95 % Storage temperature TSTG -40 100 °C ESD resistance VESD ±1 kV 1. Differential input voltage amplitude is defined as ∆V = DIN+ − DIN-. Recommended Operating Conditions These parameters apply both to the transmitter and the receiver. Parameter Symbol Min. Max. Unit VCC 3.135 3.465 V Operating case temperature TCASE 0 80 °C Signaling rate (per channel)1 fD 1.0 2.72 Gbps LD 2 m CBLK 100 nF Power supply voltage Link distance2 Data I/O DC blocking capacitors 3 Power supply noise4 VNPS 200 mVp-p 1. Data patterns are to have maximum run lengths and DC balance shifts no worse than that of a Pseudo Random Bit Sequence of length 223-1 (PRBS-23). Information on lower bit rates is available on request. 2. For maximum distance, see Table 6. 3. For AC-coupling, DC blocking capacitors external to the module with a minimum value of 100 nF is recommended. 4. Power supply noise is defined at the supply side of the recommended filter for all VCC supplies over the frequency range of 500 Hz to 2720 MHz with the recommended power supply filter in place. L1 1 µH L2 6.8 nH R1 100 Ω R2 1.0 kΩ Host Vcc Module Vcc C1 10 µF C2 10 µF C3 0.1 µF C4 0.1 µF Figure 1 - Recommended Power Supply Filter 3 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet ZL60101 Transmitter Specifications All parameters below require operating conditions according to “Recommended Operating Conditions” on page 3. Parameter Symbol Min. Max. Unit Launch power (50/125 µm MMF)1 POUT -7.5 -2 dBm Extinguished output power POFF -30 dBm Optical Parameters 2 ER 7 dB Optical modulation amplitude3 OMA 0.24 mW λC 830 Extinction ratio 860 nm ∆λ 0.85 nmrms RIN12OMA -116 dB/Hz tRO 150 ps tFO 150 ps Total jitter contributed (peak to peak) TJ 120 ps Deterministic jitter contributed (peak to peak) DJ 50 ps Channel to channel skew6 tSK 100 ps PD 1.5 W ICC 450 mA Center wavelength 4 Relative intensity noise OMA Spectral width Optical output rise time (20 - 80%) Optical output fall time (20 - 80%) 5 Electrical Parameters Power dissipation Supply current ∆VIN 200 800 mVp-p Differential input impedance8 ZIN 80 120 Ω Electrical input rise time (20 - 80%) tRE 160 ps Electrical input fall time (20 - 80%) tFE 160 ps 7 Differential input voltage amplitude (peak to peak) 1. The output optical power is compliant with IEC 60825-1 Amendment 2, Class 1M Accessible Emission Limits. 2. The extinction ratio is measured at 622 Mbps. 3. Informative. Corresponds to POUT = -7.5 dBm and ER = 7 dB. 4. Spectral width is measured as defined in EIA/TIA-455-127 Spectral Characterization of Multimode Laser Diodes. 5. Total jitter equals TP1 to TP2 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet). 6. Channel skew is defined for the condition of equal amplitude, zero ps skew signals applied to the transmitter inputs. 7. Differential input voltage is defined as the peak to peak value of the differential voltage between DIN+ and DIN-. Data inputs are CML compatible. 8. Differential input impedance is measured between DIN+ and DIN-. 4 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet Classified in accordance with IEC 60825-1/A2:2001, IEC 60825-2 : 2000 Class 1M Laser Product Emited wavelength: 840 nm DIN0+ DIN0- VCSEL Driver 0 1 2 3 4 5 6 7 8 9 10 11 VCSEL Array DIN11+ DIN11- VCSEL Driver Controller VCC VEE RESET Tx_DIS Tx_EN FAULT Figure 2 - ZL60101 Transmitter Block Diagram Front view - MTP key up Ch 11 Ch 10 Ch 9 Ch 8 Ch 7 Ch 6 Ch 5 Ch 4 Ch 3 Host circuit board Table 1 - Transmitter Optical Channel Assignment 5 Zarlink Semiconductor Inc. Ch 2 Ch 1 Ch 0 ZL60101/2 DIN+ 50Ω 50Ω DIN- Data Sheet VCC 13kΩ 11kΩ VEE Figure 3 - Differential CML Input Equivalent Circuit Transmitter Control and Status Signals The following table shows the timing relationships of the status and control signals of the pluggable optical transmitter. Parameter Symbol Min. Control input voltage high1 VIH 2.1 Control input voltage low VIL 2 Control pull-up resistor Control pull-down resistor 3 Status output voltage low4, 5 Status pull-down resistor 4 Typ. Max. Unit V 0.62 V RPU 10 kΩ RPD1 10 kΩ VOL 0.4 RPD2 10 V kΩ FAULT assert time TFA 100 µs FAULT lasers off TFD 100 µs RESET duration TTDD RESET assert time TOFF RESET de-assert time µs 10 10 µs TON 100 ms Tx_EN assert time TTEN 1 ms Tx_EN de-assert time TTD 5 10 µs Tx_DIS assert time TTD 5 10 µs Tx_DIS de-assert time TTEN 1 ms 1. Applies to control signals RESET, Tx_DIS and Tx_EN. 2. Applies to control signals RESET and Tx_EN. Internal pull-up resistor. 3. Applies to control signal Tx_DIS. Internal pull-down resistor. 4. Applies to status signal FAULT. Internal pull-down to VEE. 5. With status output sink current max. 2 mA. 6 Zarlink Semiconductor Inc. 5 ZL60101/2 Data Sheet Transmitter Control and Status Timing Diagrams The following figures show the timing relationships of the status and control signals of the pluggable optical transmitter. Vcc TTEN Tx Output [0:11] Data [0:11] Transmitter Not Ready Normal operation RESET: floating or high Figure 4 - Transmitter Power-up Sequence FAULT TFA TFD Data [0:11] Tx Output [0:11] No Fault Fault Figure 5 - Transmitter Fault Signal Timing Diagram 7 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet RESET FAULT TTDD TON Data [0:11] Tx Output [0:11] Transmitter Not Ready Normal operation Figure 6 - Transmitter Reset Signal Timing Diagram Tx_DIS Tx_EN TTD TTD Lasers off Data [0:11] Normal operation Data [0:11] Tx Off Normal operation Lasers off Tx Off Tx_EN TTEN Data [0:11] Transmitter Not Ready Normal operation Figure 7 - Transmitter Enable and Disable Timing Diagram Tx_DIS High Tx_DIS Low Tx_EN High Transmitter disabled Normal operation Tx_EN Low Transmitter disabled Transmitter disabled Table 2 - Truth Table for Transmitter Operation (Pre-condition: RESET floating or HIGH) 8 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet Transmitter Pinout Assignments K J H G F E D C B A 1 NIC NIC NIC VEE VEE VEE VEE VEE VEE NIC 2 NIC NIC NIC VEE VEE DIN5+ VEE VEE DIN8+ VEE 3 NIC VCC VCC VEE DIN4+ DIN5- VEE DIN7+ DIN8- VEE 4 NIC VCC VCC DIN3+ DIN4- VEE DIN6+ DIN7- VEE NIC 5 NIC VCC VCC DIN3- VEE DIN2+ DIN6- VEE DIN9- VEE 6 NIC VCC VCC VEE DIN1+ DIN2- VEE DIN10- DIN9+ VEE 7 NIC NIC NIC DIN0+ DIN1- VEE DIN11- DIN10+ VEE NIC 8 DNC RESET FAULT DIN0- VEE VEE DIN11+ VEE VEE NIC 9 DNC Tx_EN Tx_DIS VEE VEE VEE VEE VEE VEE NIC 10 DNC DNC DNC DNC DNC DNC DNC DNC DNC DNC Table 3 - Transmitter Host Circuit Board Layout (Top view, toward MPO/MTP connector end) (10x10 array, 1.27 mm pitch) Transmitter Pin Description Signal Name Type DIN[0:11] +/- Data input Description Transmitter data in, channel 0 to 11 Comments Internal differential termination at 100 Ω. VCC Transmitter power supply rail VEE Transmitter signal common. All transmitter voltages are referenced to this potential unless otherwise stated. Directly connect these pads to the PC board transmitter signal ground plane. Tx_EN Control input Transmitter enable. HIGH: normal operation LOW: disable transmitter Active high, internal pull-up. See Table 2. Tx_DIS Control input Transmitter disable. HIGH: disable transmitter LOW: normal operation Active high, internal pull-down. See Table 2. FAULT Status output Transmitter fault. HIGH: normal operation LOW: laser fault detected on at least one channel When active, all channels are disabled. Clear by reset signal. Internal pull-up. RESET Control input Transmitter reset. HIGH: normal operation LOW:reset to clear fault signal Internal pull-up. DNC Do not connect to any potential, including ground. NIC No internal connection. 9 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet ZL60102 Receiver Specifications All parameters below require operating conditions according to Table 2 and a termination load of 100 Ω differential at the electrical output. Parameter Symbol Min. Max. Unit Input optical power PIN -16 -2 dBm Center wavelength λC 830 860 nm RL 12 Optical Parameters 1 2 Return loss 3 dB Total jitter contributed (peak to peak) TJ 120 ps Deterministic jitter contributed (peak to peak) DJ 50 ps Stressed receiver sensitivity PSS -11.3 dBm Channel to channel skew5 tSK 100 ps Signal detect assert PSA -17 dBm Signal detect de-assert PSD 4 -27 dBm Electrical Parameters Power dissipation Supply current PD 1.5 W ICC 450 mA ∆VOUT 500 800 mVp-p ZL 80 120 Ω Stressed receiver eye opening8 PSE 0.3 Electrical output rise time (20 - 80 %) tRE 150 ps tFE 150 ps 6 Differential output voltage amplitude (peak to peak) Output differential load impedance7 Electrical output fall time (20 - 80 %) -12 UI 1. Receive power for a channel is measured for a BER of 10 and worst case extinction ratio. PIN (Min) is measured using a fast rise/fall time source with low RIN and adjacent channel(s) operating with incident power of 6 dB above PIN (Min). 2. Return loss is measured as defined in TIA/EIA-455-107A Determination of Component Reflectance or Link/System Return Loss Using a Loss Test Set. 3. Total jitter equals TP3 to TP4 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet). 4. The stressed receiver sensitivity is measured using PRBS 223-1 pattern, 2.7 dB inter-symbol interference, ISI (Min), 30 ps duty cycle dependent deterministic jitter, DCD DJ (Min), and 7 dB extinction ratio, ER (Min) (ER penalty = 1.76 dB). All channels not under test are receiving signals with an average input power of 6 dB above PIN (Min). 5. Channel skew is defined for the condition of equal amplitude, zero ps skew signals applied to the receiver inputs. 6. Differential output voltage is defined as the peak to peak value of the differential voltage between DOUT+ and DOUT- and measured with a 100 Ω differential load connected between DOUT+ and DOUT-. Data outputs are CML compatible. 7. See Figure 14. 8. The stressed receiver eye opening represents the eye at TP4 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet). The stressed receiver eye opening is measured using PRBS 223-1 pattern, 2.7 dB ISI min, 30 ps DCD DJ min, 7 dB ER min and an average input power of -10.8 dBm (0.5 dB above minimum stressed receiver sensitivity as defined in IEEE 802.3 clause 38.6). All channels not under test are receiving signals with an average input power of 6 dB above PIN (Min). 10 Zarlink Semiconductor Inc. ZL60101/2 0 1 2 3 4 5 6 7 8 9 10 11 Data Sheet DOUT0+ DOUT0- TransImpedance and Limiting Amplifier PIN Array DOUT11+ DOUT11- VCC VEE Rx_EN Rx_SD SQ_EN Figure 8 - ZL60102 Receiver Block Diagram Front view - MTP key up Ch 11 Ch 10 Ch 9 Ch 8 Ch 7 Ch 6 Ch 5 Ch 4 Ch 3 Ch 2 Ch 1 Ch 0 Host circuit board Table 4 - Receiver Optical Channel Assignment Receiver Control and Status Signals The following table shows the timing relationships of the status and control signals of the pluggable optical receiver. Parameter Control input voltage high1 Control input voltage low 1 Symbol Min. VIH 2.0 Typ. IIN Control input pull-up current Status output voltage low2, 3 10 VOL 2 Unit V VIL 1 Max. 0.9 V 100 µA 0.4 V RPU 3.25 Receiver signal detect assert time TSD 50 200 µs Receiver signal detect de-assert time TLOS 50 200 µs Receiver enable assert time TRXEN 33 ms Receiver enable de-assert time TRXD 5 µs Status output pull-up resistor 1. Applies to control signals Rx_EN, SQ_EN. 2. Applies to status signal Rx_SD. Internal pull-up to VCC. 3. With status output sink current max 2 mA. 11 Zarlink Semiconductor Inc. kΩ ZL60101/2 Data Sheet Receiver Control and Status Timing Diagrams The following figures show the timing relationships of the status and control signals of the pluggable optical receiver. Rx_EN TRXD ICC Normal Operation Rx Off Figure 9 - Receiver Enable Signal Timing Diagram Rx_SD TLOS Signal No Signal Figure 10 - Receiver Signal Detect Timing Diagram 12 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet Receiver Pinout Assignments K J H G F E D C B A 1 DNC NIC NIC VEE VEE VEE VEE VEE VEE NIC 2 DNC NIC NIC VEE VEE DOUT5- VEE VEE DOUT8- VEE 3 NIC VCC VCC VEE DOUT4- DOUT5+ VEE DOUT7- DOUT8+ VEE 4 NIC VCC VCC DOUT3- DOUT4+ VEE DOUT6- DOUT7+ VEE NIC 5 NIC VCC VCC DOUT3+ VEE DOUT2- DOUT6+ VEE DOUT9+ VEE 6 NIC VCC VCC VEE DOUT1- DOUT2+ VEE DOUT10+ DOUT9- VEE 7 NIC NIC Rx_SD DOUT0- DOUT1+ VEE DOUT11+ DOUT10- VEE NIC 8 DNC NIC NIC DOUT0+ VEE VEE DOUT11- VEE VEE NIC 9 DNC Rx_EN NIC VEE VEE VEE VEE VEE VEE NIC 10 SQ_EN DNC DNC DNC DNC DNC DNC DNC DNC DNC Table 5 - Receiver Pinout Assignments (Top view, toward MPO/MTP connector end) (10x10 array, 1.27 mm pitch) Receiver Pin Description Signal Name Type DOUT[0:11] +/- Data output Description Comments Receiver data out, channel 0 to 11. VCC Receiver power supply rail. VEE Receiver signal common. All receiver voltages are referenced to this potential unless otherwise stated. Directly connect these pads to the PC board transmitter signal ground plane. Rx_EN Control input Receiver enable. HIGH: normal operation LOW: disable receiver Internal pull-up. Rx_SD Status output Receiver signal detect. HIGH: valid optical input on all channels LOW: loss of signal on at least one channel Internal pull-up. SQ_EN Control input Squelch enable. HIGH: squelch function enabled. Data OUT is squelched on any channels that have loss of signal LOW: squelch function disabled Internal pull-up. DNC Do not connect to any potential, including ground. NIC No internal connection. 13 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet Thermal Characteristics There are three options for heat sinks depending on the cooling needs. They are: 1. Direct application without any attached external heat sink 2. Use a generic heat sink specified by Zarlink 3. Use a customer designed external heat sink In Figure 11 and Figure 12, the temperature rise and thermal resistance as a function of air velocity (free air velocity at the top of the module) is shown for option 1 and 2. The thermal resistance is defined as the temperature difference between the case temperature and ambient flowing air divided by the total heat dissipation of the module. Improved thermal properties can be achieved by using a larger heat sink especially if more height is available (option 3). For this option, a more detailed discussion with Zarlink is recommended regarding heat sink design attachment materials. Temperature rise (K) Tem perature rise at 1.5W (Free stream air velocity) 20 16 12 Option ZL6010*/ML 8 Option ZL6010*/MJ 4 0 0 1 2 3 4 Air velocity (m/s) Figure 11 - Temperature Difference Between Ambient Flowing Air and Case at a Heat Dissipation of 1.5 W Therm al resistance to air (Free stream air velocity) Thermal resistance (K/W) 15 10 Option ZL6010*/ML 5 Option ZL6010*/MJ 0 0 1 2 3 4 Air velocity (m/s) Figure 12 - Thermal Resistance, as a Function of Air Velocity (the airflow is along the shortest side of the module) For any other orientation, the thermal resistance is 75-100% of the values shown above. 14 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet Regulatory Compliance Eye Safety The maximum optical output power is specified to comply with Class 1M in accordance with IEC 60825−1:2001. In addition the transmitter complies with FDA performance standards for laser products except for deviations pursuant to Laser Notice No.50, dated July 26, 2001. No maintenance or service of the product may be performed. Electrostatic Discharge The module is classified as Class 1 (> 1000 Volts) according to MIL−STD−883, test method 3015.7, with regards to the electrical pads. Electrostatic Discharge Immunity The part withstand a 15 kV (air discharge) and 8 kV (contact discharge) either indirect or directly to receptacle; tested according to IEC 61000−4−2, while in operation without addition of bit errors. Electromagnetic Interference Emission The electromagnetic emission is tested in front of the module (module fitted with EMI shield), with the module mounted in a frontplate cutout. The part is tested with FCC Part 15, 30 − 1000 MHz and 1 GHz to 5th harmonic of the highest fundamental frequency (6.75 GHz), and is specified to be Class B with > 6 dB margin. Immunity The electromagnetic immunity is tested without a front panel or enclosure. The module specification is maintained with an applied field of 10 V/m for frequencies between 10 kHz and 10 GHz, according to IEC 61000−4−3 and GR−1089−CORE. Handling instructions Cleaning the Optical Interface A protective connector plug is supplied with each module. This plug should remain in place whenever a fiber cable is not inserted. This will keep the optical port free from dust or other contaminants, which may potentially degrade the optical signal. Before reattaching the connector plug to the module, visually inspect the plug and remove any contamination. If the module’s optical port becomes contaminated, it can be cleaned with high-pressure nitrogen (the use of fluids, or physical contact, is not advised due to potential for damage). Before a fiber cable connector is attached to the module, it is recommended to clean the fiber cable connector using an optical connector cleaner, or according to the cable manufacturer's instructions. It is also recommended to clean the optical port of the module with high-pressure nitrogen. Connectors For optimum performance, it is recommended that the number of insertions is limited to 50 for the electrical MegArray connector and 200 for the optical MPO/MTP connector. ESD Handling When handling the modules, precautions for ESD sensitive devices should be taken. These include use of ESD protected work areas with wrist straps, controlled work-benches, floors etc. 15 Zarlink Semiconductor Inc. ZL60101/2 Data Sheet Link Reach The following table lists the minimum reach distance of the 12 channel pluggable optical modules for different multimode fiber (MMF) types and bandwidths assuming worst case parameters. Each case allows for a maximum of 2 dB per channel connection loss for patch cables and other connectors. Fiber Type Modal Bandwidth @ 850 nm [MHz*km] Reach Distance @ 1 Gbps [m] Reach Distance @ 2.5 Gbps [m] Reach Distance @ 2.72 Gbps [m] 62.5/125 MMF 200 350 130 110 62.5/125 or 50/125 MMF 400 650 260 220 50/125 MMF 500 750 300 270 [core / cladding µm] Table 6 - Link Reach for Different Fiber Types and Data Rates Link Model Parameters The link reaches above have been calculated using the following link model parameters and Gigabit Ethernet link model version 2.3.5 (filename: 5pmd047.xls). Parameter Symbol Value k 0.3 Modal noise MN 0.3 dB Dispersion slope parameter SO 0.11 ps/nm2*km Wavelength of zero dispersion UO 1320 nm Attenuation coefficient at 850 nm αdB 3.5 dB/km Conversion factor C1 480 ns.MHz Q-factor [BER 10-12] Q 7.04 Mode partition noise k-factor TP4 eye opening Unit 0.3 UI DCD DJ 0.08 UI RMS baseline wander S.D. σBLW 0.025 RIN coefficient kRIN 0.70 Conversion factor c_rx 329 DCD allocation at TP3 16 Zarlink Semiconductor Inc. ns.MHz ZL60101/2 Data Sheet Electrical Interface - Application Examples Recommended CML output Transmitter CML input Host PCB 100nF ZOUT=100Ω Differential ZIN=100Ω Differential Z0=100Ω Differential 100nF Figure 13 - Recommended Differential CML Input Interface Receiver CML output Recommended CML input Host PCB 100nF Z0=100Ω Differential ZTERM =100Ω Differential 100nF ZL Figure 14 - Recommended Differential CML Output Interface 17 Zarlink Semiconductor Inc. NOTES:1. All dimensions in mm. 2. Tolerancing per ASME Y14.5M-1994. Package code © Zarlink Semiconductor 2002. All rights reserved. ISSUE 1 ACN JS004293R1A DATE 12-JUN-03 APPRD. TD/BE Previous package codes MJD Drawing type Package drawing - module layout Title JS004293 NOTES:1. All dimensions in mm. 2. Tolerancing per ASME Y14.5M-1994. Package code © Zarlink Semiconductor 2002. All rights reserved. ISSUE 1 ACN JS004293R1A DATE 12-JUN-03 APPRD. TD/BE Previous package codes MJD Drawing type Package Drawing, Host circuit board footprint layout Title JS004293 For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. 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