CXD2309AQ 10-bit 85MSPS 3-Channel D/A Converter Description The CXD2309AQ is a 10-bit high-speed D/A converter for video band, featuring RGB 3-channel input/ output. This is ideal for use in high-definition TVs and high-resolution displays. Features • Resolution 10-bit • Maximum conversion speed 85MSPS • RGB 3-channel input/output • Differential linearity error ±0.5LSB • Low power consumption 275mW (200Ω load for 2Vp-p output) • Single +5V power supply • Low glitch • 48-pin QFP package 48 pin QFP (Plastic) Absolute Maximum Ratings (Ta = 25°C) 7 V • Supply voltage AVDD, DVDD • Input voltage (All pins) VIN VDD + 0.5 to VSS – 0.5 V • Output current IOUT 0 to 15 mA • Storage temperature Tstg –55 to +150 °C Structure Silicon gate CMOS IC Recommended Operating Conditions • Supply voltage AVDD, AVSS 4.75 to 5.25 DVDD, DVSS • Reference input voltage VREF • Clock pulse width TPW1, TPW0 • Operating temperature Topr 4.75 to 5.25 V V 1.8 to 2.0 V 5.2 (min.) ns –20 to +85 °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E00739B21-PS CXD2309AQ Block Diagram (LSB) R0 1 R1 2 R2 3 R3 4 R4 5 R5 6 R6 7 R7 8 R8 9 4LSB'S CURRENT CELLS 43 AVSS 42 RO 6LSB'S CURRENT CELLS LATCHES DECODER DECODER CLOCK GENERATOR (MSB) R9 10 RCK 31 (LSB) G0 11 4LSB'S CURRENT CELLS G1 12 45 AVSS 44 GO G2 13 G3 14 G4 15 G5 16 6LSB'S CURRENT CELLS LATCHES DECODER G6 17 G7 18 G8 19 DECODER CLOCK GENERATOR (MSB) G9 20 GCK 32 (LSB) B0 21 4LSB'S CURRENT CELLS B1 22 47 AVSS 46 BO B2 23 B3 24 B4 25 B5 26 6LSB'S CURRENT CELLS LATCHES DECODER B6 27 41 AVDD 40 AVDD 39 AVDD B7 28 B8 29 DECODER CLOCK GENERATOR (MSB) B9 30 38 VG BCK 33 DVDD 48 CURRENT CELLS (FOR FULL SCALE) BIAS VOLTAGE GENERATOR VB 35 DVSS 34 –2– 37 VREF 36 IREF B4 B5 B6 B7 B8 RCK GCK BCK DVSS VB IREF Pin Configuration B9 (MSB) CXD2309AQ 36 35 34 33 32 31 30 29 28 27 26 25 VREF 37 24 B3 VG 38 23 B2 AVDD 39 22 B1 AVDD 40 21 B0 (LSB) AVDD 41 20 G9 (MSB) RO 42 19 G8 AVSS 43 18 G7 GO 44 17 G6 AVSS 45 16 G5 BO 46 15 G4 AVSS 47 14 G3 DVDD 48 13 G2 (LSB) G1 (MSB) G0 10 11 12 R9 9 R8 8 R7 7 R6 6 R5 5 R4 4 R3 3 R2 2 R1 (LSB) R0 1 1 to 35 , 48 Digital system 36 to 47 Analog system Pin Description and Equivalent Circuit Pin No. Symbol I/O Equivalent circuit Description 1 to 10 R0 to R9 11 to 20 G0 to G9 DVDD Digital input. Pin 1 R0 (LSB) to Pin 10 R9 (MSB) Pin 11 G0 (LSB) to Pin 20 G9 (MSB) Pin 21 B0 (LSB) to Pin 30 B9 (MSB) 21 to 30 B0 to B9 I 31 RCLK 32 GCLK 33 BCLK 34 DVSS 1 to 33 DVSS — Clock input. Digital ground. DVDD DVDD 35 VB Connect an approximately 0.1µF capacitor. O 35 DVSS –3– CXD2309AQ Pin No. 36 Symbol I/O IREF O Equivalent circuit Description Reference current output. Connect an "RIR" resistor which are 16 times the output resistance "ROUT". AVDD AVDD 36 AVDD 37 VREF AVDD I AVSS Reference voltage input. Sets an output full-scale value. 37 38 AVSS AVSS 38 VG 39 to 41 AVDD O Connect an approximately 0.1µF capacitor. — Analog power supply. AVDD 42 RO 42 Current output. Output can be obtained by connecting a resistor (200Ω typ.). 44 44 GO O 46 AVSS 46 BO AVSS 43, 45, 47 AVSS 48 DVDD — Analog ground. — Digital power supply. –4– CXD2309AQ Electrical Characteristics (fCLK = 85MHz, AVDD = DVDD = 5V, ROUT = 200Ω, VREF = 2.0V, RIR = 3.3kΩ, Ta = 25°C) Item Symbol Resolution n Conversion speed fCLK EL ED Precision guaranteed output voltage range VOC Output full-scale voltage VFS Output full-scale ratio ∗1 FSR Output full-scale current IFS Output offset voltage VOS Glitch energy GE CT S/N ratio SNR Supply current IDD Analog input resistance Input capacitance Output capacitance RIN CI CO VIH VIL IIH IIL ts th tPD tr tf Setup time Hold time Propagation delay time Rise time Fall time ∗1 Full-scale ratio = Unit 10 bit 0 –2.0 –0.5 1.8 1.92 1.8 1.92 0 9.0 9.6 Endpoint Crosstalk Digital input current Min. Typ. Max. AVDD = DVDD = 4.75 to 5.25V Ta = –20 to +85°C Integral non-linearity error Differential non-linearity error Digital input voltage Measurement conditions When "0000000000" data input ROUT = 100Ω, 1Vp-p output FCLK = 50MHz When 10MHz sin wave input FCLK = 85MHz FCLK = 50MHz When 1MHz sin wave input FCLK = 85MHz FCLK = 50MHz When 10MHz sin wave output FCLK = 85MHz 40 50 MSPS 2.0 0.5 2.0 2.0 3 10 1 LSB LSB V V % mA mV pV·s 36 49 49 63 61 48 55 VREF 85 dB dB 58 1 9 15 AVDD = DVDD = 4.75 to 5.25V Ta = –20 to +75°C 2.15 AVDD = DVDD = 4.75 to 5.25V Ta = –20 to +75°C –5 0.85 5 4 1 6 7 12 Full-scale voltage of channel Average of the full-scale voltage of the channels Electrical Characteristics Measurement Circuit Analog Input Resistance Measurement Circuit Digital Input Current +5.25V AVDD, DVDD A CXD2309AQ V AVSS, DVSS –5– –1 × 100 [%] mA MΩ pF pF V µA ns ns ns ns ns CXD2309AQ Conversion Rate Measurement Circuit R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 10bit COUNTER with LATCH 35 VB 0.1µ 200 AVSS OSCILLOSCOPE 200 AVSS 45 AVSS BO 46 200 DVSS CLK 50MHz SQUARE WAVE 31 RCK AVSS 47 32 GCK VG 38 33 BCK AVSS AVDD VREF 37 2V 0.1µ IREF 36 3.3k Setup Time Hold Time Glitch Energy AVSS Measurement Circuit R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 10bit COUNTER with LATCH 35 VB CLK 50MHz SQUARE WAVE AVSS OSCILLOSCOPE 200 AVSS 45 0.1µ DELAY CONTROLLER 200 AVSS BO 46 200 DVSS DELAY CONTROLLER 31 RCK AVSS 47 32 GCK VG 38 33 BCK VREF 37 2V AVSS AVDD 0.1µ IREF 36 3.3k AVSS Crosstalk Measurement Circuit DVDD R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 DIGITAL WAVEFORM GENERATOR 35 VB 0.1µ 200 AVSS 200 AVSS 45 AVSS BO 46 200 DVSS CLK 50MHz SQUARE WAVE 31 RCK AVSS 47 32 GCK VG 38 33 BCK VREF 37 2V AVSS AVDD 0.1µ IREF 36 3.3k AVSS –6– SPECTRUM ANALYZER CXD2309AQ DC Characteristics Measurement Circuit R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 CONTROLLER 35 VB 200 AVSS DVM 200 AVSS 45 0.1µ AVSS BO 46 200 DVSS CLK 50MHz SQUARE WAVE 31 RCK AVSS 47 32 GCK VG 38 33 BCK AVSS AVDD VREF 37 2V 0.1µ IREF 36 3.3k AVSS Propagation Delay Time Measurement Circuit R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 10bit COUNTER with LATCH 35 VB CLK 50MHz SQUARE WAVE AVSS OSCILLOSCOPE 200 AVSS 45 0.1µ DELAY CONTROLLER 200 AVSS BO 46 200 DVSS DELAY CONTROLLER 31 RCK AVSS 47 32 GCK VG 38 33 BCK AVSS AVDD VREF 37 2V 0.1µ IREF 36 3.3k AVSS SNR Measurement Circuit DIGITAL WAVEFORM GENERATOR R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 ALL "1" ALL "1" 35 VB 0.1µ 200 AVSS 200 AVSS 45 AVSS BO 46 200 DVSS CLK 50MHz SQUARE WAVE 31 RCK AVSS 47 32 GCK VG 38 33 BCK VREF 37 2V AVSS AVDD 0.1µ IREF 36 3.3k AVSS –7– SPECTRUM ANALYZER CXD2309AQ Description of Operation Timing Chart tPW1 tPW0 ;; ; ;; ; ;; ; ; 1.5V CLK tS th tS th tS th DATA 1.5V 100% 90% D/A OUT 50% tPD tr I/O Correspondence Table (output full-scale voltage: 2.00V) Input code MSB LSB 1 1 1 1 1 1 1 1 1 1 : 1 0 0 0 0 0 0 0 0 0 : 0 0 0 0 0 0 0 0 0 0 Output voltage 2.0V 1.0V 0V –8– tf 10% 0% CXD2309AQ Notes on Operation • Selecting the Output Resistance CXD2309AQ is a current output type D/A converter. The output voltage can be obtained by connecting the reslstor ROUT to the current output pins RO, GO and BO. Specifications: Output full-scale voltage VFS = 18 to 2.0 [V] Output full-scale current IFS = 9.0 to 10.0 [mA] Calculate the output resistance from VFS = IFS × ROUT. Connect a resistance sixteen times the output resistance to the reference current output pin IREF. In some cases, as this value may not exist, a similar value can be used instead. Note that the VFS Will be the following. VFS = VREF × 16ROUT/RIR VREF is the voltage set at the reference voltage input pin VREF, ROUT is the resistor to be connected to the current output pins RO, GO, BO and RIR is the resistor to be connected to the IREF. Power consumption can be reduced by increasing the resistance, but this will on the contrary increase the glitch energy and data setting time. Set the best values according to the purpose of use. • Power supply, ground Separate the power supply and ground of the analog and digital signals around the device to reduce noise effects. Bypass the power supply pin to each ground with a 0.1µF ceramics capacitor as near as possible to the pin for both the digital and analog signals. • Latch up Analog and digital power supplies must be able to share the same power supply of the board. This is to prevent latch up caused by potential difference between the two pins when the power is turned on. See "Latch Up Prevention" on Page 11. • IREF The IREF pin is very sensitive to improve the AC characteristics. Pay attention for capacitance component not to attach to this pin because its output may become unstable. • Output full-scale voltage For the applications using the RGB signal, the color balance may be broken up when the RO, GO and BO output full-scale voltages are used with not adjustment. –9– CXD2309AQ Application Circuit C C R2 MSB Clock input 36 35 34 33 32 31 30 29 28 27 26 25 R3 R4 C C C 37 24 38 23 39 22 40 21 LSB 41 20 MSB 42 19 43 18 44 17 45 16 46 15 47 14 48 13 Bch input R1 R1 3 4 • • • • • • 5 6 Rch input AVDD DVDD AVSS DVSS 7 8 9 10 11 LSB 2 LSB 1 MSB R1 Gch input 12 When the power supply (AVDD and DVDD) is 5.0V. R1 = 200Ω R2 = 3.3kΩ R3 = 3.0kΩ R4 = 2.0kΩ C = 1µF Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. – 10 – CXD2309AQ Latch Up Prevention The CXD2309AQ is a CMOS IC which requires latch up precausions. Latch up is mainly generated by the lag in the voltage rising time of AVDD (Pin 39, 40 and 41) and DVDD (Pin 48), when power supply is ON. 1. Correct usage a. When analog and digital supplies are from different sources DVDD AVDD 39 40 41 48 DVDD AVDD +5V +5V CXD2309AQ C C AVSS 43 AVSS 45 DIGITAL IC DVSS 47 34 b. When analog and digital supplies are from a common source (i) DVDD 39 40 41 48 DVDD AVDD +5V CXD2309AQ C AVSS 43 AVSS DIGITAL IC C DIGITAL IC DVSS 47 45 C 34 (ii) DVDD 39 40 41 48 DVDD AVDD +5V CXD2309AQ C AVSS AVSS 43 45 DVSS 47 34 – 11 – CXD2309AQ 2. Example when latch up easily occurs a. When analog and digital supplies are from different sources DVDD AVDD 39 40 41 48 DVDD AVDD +5V +5V CXD2309AQ C AVSS 43 AVSS 45 C DIGITAL IC DVSS 47 34 b. When analog and digital supplies are from common source (i) DVDD AVDD 39 40 41 48 DVDD AVDD +5V CXD2309AQ C AVSS AVSS 43 DIGITAL IC C DIGITAL IC DVSS 47 45 C 34 (ii) DVDD AVDD 39 40 41 48 DVDD AVDD +5V CXD2309AQ AVSS AVSS 43 45 DVSS 47 34 – 12 – CXD2309AQ Example of Representative Characteristics GE – Glitch energy [pV·s] VFS – Output full-scale voltage [V] 2.0 1.0 0 2.0 1.0 100 50 0 VREF – Reference voltage [V] ROUT – Output resistance [Ω] Fig. 1. Reference voltage vs. Output full-scale voltage Fig. 2. Output resistance vs. Glitch energy 1.95 70 IDD – Supply current [mA] VFS – Output full-scale voltage [V] 200 100 1.90 60 sin wave output 50 ∆V = 0.02mV/°C 40 0 –25 0 25 50 75 12 5 Ta – Ambient temperature [°C] 10 20 30 40 42 Fo – Output frequency [MHz] Fig. 3. Ambient temperature vs. Output full-scale voltage Fig. 4. Output frequency vs. Supply current Standard Measurement Conditions • AVDD = DVDD = 5.0V • VREF = 2.0V • FCLK = 85MHz • ROUT = 200Ω • RIR = 3.3kΩ • Ta = 25°C – 13 – CXD2309AQ 60 60 fOUT = 1MHz sin wave IDD – Supply current [mA] IDD – Supply current [mA] 50 IDD 40 IA [Analog] 30 20 ID [Digital] 10 50 20 fOUT = 10MHz sin wave 50 IDD 40 IA [Analog] 30 20 ID [Digital] 10 85 50 20 FCLK – Clock frequency [MHz] 85 FCLK – Clock frequency [MHz] Fig. 5. Clock frequency vs. Supply current Fig. 6. Clock frequency vs. Supply current 70 Output level [dBm] CT – Cross talk [dB] 0 sin wave output 40 –10 20 –20 10 0 2 1 5 10 20 42 1 2 5 10 20 50 Fo – Output frequency [MHz] Fo – Output frequency [MHz] Fig. 7. Output frequency vs. Cross talk Fig. 8. Output frequency vs. Output level (Including primary hold characteristics sinx/x) SNR [dB] 70 40 Standard Measurement Conditions • AVDD = DVDD = 5.0V • VREF = 2.0V • FCLK = 85MHz • ROUT = 200Ω • RIR = 3.3kΩ • Ta = 25°C 10 0 0.1 1 10 40 42 Fo – Output frequency [MHz] Fig. 9. Output frequency vs. SNR – 14 – CXD2309AQ Package Outline Unit: mm 48PIN QFP (PLASTIC) 15.3 ± 0.4 + 0.1 0.15 – 0.05 + 0.4 12.0 – 0.1 36 25 0.15 24 13.5 37 48 + 0.2 0.1 – 0.1 13 12 0.8 + 0.15 0.3 – 0.1 0.24 M 0.9 ± 0.2 1 + 0.35 2.2 – 0.15 PACKAGE STRUCTURE SONY CODE QFP-48P-L04 EIAJ CODE QFP048-P-1212 JEDEC CODE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT PALLADIUM PLATING LEAD MATERIAL COPPER ALLOY PACKAGE MASS 0.7g – 15 – Sony Corporation