SN54AS1032A, SN74AS1032A QUADRUPLE 2-INPUT POSITIVE-OR BUFFERS/DRIVERS SDAS072B – DECEMBER 1982 – REVISED JANUARY 1995 Driver Version of ′AS32 High Capacitive-Drive Capability Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs SN54AS1032A . . . J PACKAGE SN74AS1032A . . . D OR N PACKAGE (TOP VIEW) 1A 1B 1Y 2A 2B 2Y GND description These devices contain four independent 2-input positive-OR buffers/drivers. They perform the Boolean functions Y = A + B or Y = A • B in positive logic. H X H X H H L L L 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B 2Y GND NC 3Y 3A B A 13 1B 1A NC VCC 1Y NC 2A NC 2B FUNCTION TABLE (each gate) OUTPUT Y 14 2 SN54AS1032A . . . FK PACKAGE (TOP VIEW) The SN54AS1032A is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74AS1032A is characterized for operation from 0°C to 70°C. INPUTS 1 4B • • • NC – No internal connection logic symbol† 1A 1B 2A 2B 3A 3B 4A 4B 1 logic diagram (positive logic) ≥1 3 2 1Y 1A 1B 4 5 6 2Y 2B 9 10 8 3Y 3A 3B 12 13 2A 11 4Y 4A 4B 1 2 3 1Y 4 5 6 2Y 9 10 8 3Y 12 13 11 4Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AS1032A, SN74AS1032A QUADRUPLE 2-INPUT POSITIVE-OR BUFFERS/DRIVERS SDAS072B – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54AS1032A . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74AS1032A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions‡ SN54AS1032A VCC VIH Supply voltage VIL IOH Low-level input voltage High-level input voltage SN74AS1032A MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 High-level output current IOL Low-level output current TA Operating free-air temperature – 55 ‡ These high sink- or source-current devices are not recommended for use above 40 MHz. UNIT V V 0.8 0.8 V – 40 – 48 mA 40 48 mA 70 °C 125 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 2 mA VCC = 4.5 V IOH = – 3 mA IOH = – 40 mA VOL VCC = 4 4.5 5V II IIH VCC = 5.5 V, VCC = 5.5 V, IIL IO¶ VCC = 5.5 V, VCC = 5.5 V, ICCH ICCL VCC = 5.5 V, VCC = 5.5 V, SN54AS1032A MIN TYP§ MAX –1.2 VCC – 2 2.4 –1.2 VCC – 2 2.4 3.2 3.2 UNIT V V 2 IOH = – 48 mA IOL = 40 mA 2 0.25 IOL = 48 mA VI = 7 V 0.5 0.35 VI = 2.7 V VI = 0.4 V VO = 2.25 V VI = 4.5 V SN74AS1032A MIN TYP§ MAX – 50 V 0.1 0.1 20 20 µA – 0.5 – 0.5 mA – 200 – 50 mA – 200 mA 7.7 11.5 7.7 11.5 mA 14.7 24 14.7 24 mA § All typical values are at VCC = 5 V, TA = 25°C. ¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 2 VI = 0 0.5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AS1032A, SN74AS1032A QUADRUPLE 2-INPUT POSITIVE-OR BUFFERS/DRIVERS SDAS072B – DECEMBER 1982 – REVISED JANUARY 1995 switching characteristics (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) A or B TO (OUTPUT) Y VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† SN54AS1032A SN74AS1032A MIN MAX MIN MAX 1 7 1 6.3 1 7 1 6.3 UNIT ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54AS1032A, SN74AS1032A QUADRUPLE 2-INPUT POSITIVE-OR BUFFERS/DRIVERS SDAS072B – DECEMBER 1982 – REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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