FUJITSU SEMICONDUCTOR FACT SHEET NP501-00004-0v01-E FRAM MB85R256G MB85R256G is a 256K-bits FRAM LSI using the ferroelectric process and CMOS process technologies for forming the nonvolatile memory cells. Because FRAM is able to write high-speed even though a nonvolatile memory, it is suitable for the log management and the storage of the resume data, etc. MB85R256G uses a pseudo-SRAM interface compatible with conventional asynchronous SRAM. ■ FEATURES Bit configuration ：32,768 words × 8 bits Read/write endurance ：1010 times/bit Peripheral circuit CMOS construction Operating power supply voltage ：2.7 to 3.6V Operating temperature range ：-40℃ to +85℃ Data retention ：10 years (+70℃) Package ：28-pins, SOP flat package ：28-pins, TSOP(1) flat package ■ ORDERING INFORMATION Product name Package Remarks TBD Plastic・SOP,28-pins (FPT-28P-M17) 8.60mm×17.75mm,1.27mm pitch - TBD Plastic・TSOP,28-pins (FPT-28P-M19) 11.80mm×8.00mm,0.55mm pitch - TBD Plastic・SOP,28-pins (FPT-28P-M17) 8.60mm×17.75mm,1.27mm pitch Embossed Carrier tape ■ PACKAGE EXAMPLE OF REFERENCE Plastic ・ TSOP、28-pins (FPT-28P-M19) November, 2010 1/2 Copyright©2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved MB85R256G PRELIMINARY ■ PIN ASSIGNMENT （TOP VIEW） A14 1 28 VCC A12 2 27 WE A7 3 26 A13 A6 4 25 A8 A5 5 24 A9 A4 6 23 A11 A3 7 22 OE A2 8 21 A10 A1 9 20 CE A0 10 19 I/O7 I/O0 11 18 I/O6 I/O1 12 17 I/O5 I/O2 13 16 I/O4 GND 14 15 I/O3 FPT-28P-M17 22 23 24 25 26 27 28 1 2 3 4 5 6 7 OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 FPT-28P-M19 Pin No. Pin name 1 to 10, 21, 23 to 26 A0 to A14 11 to 13, 15 to 19 Description Address input I/O0 to I/O7 Data input/output 20 CE Chip enable input 27 WE Write enable input 22 OE Output enable input 28 VCC Power supply (＋3.3V Typ.) 14 GND Ground ■ BLOCK DIAGRAM A14 to A10 Block decoder A14 to A0 Address latch A7 to A0 Row decoder FRAM array: 32,768 × 8 WE OE Pseudo-SRAM interface logic circuit CE A8, A9 Column decoder Control logic I/O latch bus driver I/O0-I/O7 I/O7 to I/O0 NP501-00004-0v01-E November, 2010 2/2 Copyright©2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved