HAMAMATSU S11155-2048

CCD linear image sensors
S11155-2048
S11156-2048
Back-thinned CCD image sensors with
electronic shutter function
The S11155-2048 and S11156-2048 are back-thinned CCD linear image sensors with an internal electronic shutter for spectrometers. These image sensors use a resistive gate structure that allows high-speed transfer. Each pixel has a lengthwise size
needed by spectrometers but ensures readout with low image lag.
Features
Applications
Built-in electronic shutter
Spectrometers
Minimum integration time: 30 μs
Image readout
High sensitivity from the ultraviolet region
(spectral response range: 200 to 1100 nm)
Readout speed: 10 MHz max.
Image lag: 0.1% typ.
General ratings
Parameter
Pixel size
Number of total pixels
Number of active pixels
Active area
Horizontal clock phase
Output circuit
Package
Window*1
S11155-2048
14 (H) × 500 (V) μm
S11156-2048
14 (H) × 1000 (V) μm
2068 (H) × 1 (V)
2048 (H) × 1 (V)
28.672 (H) × 0.500 (V) mm
28.672 (H) × 1.000 (V) mm
2-phase
Two-stage MOSFET source follower
24-pin ceramic DIP (refer to dimensional outline)
Quartz glass
*1: Temporary window type (ex. S11155-2048N) is available upon request.
Resistive gate structure
In ordinary CCDs, one pixel contains multiple
electrodes and a signal charge is transferred by
applying different clock pulses to those electrodes [Figure 1]. In resistive gate structures,
a single high-resistance electrode is formed in
the active area, and a signal charge is transferred by means of a potential slope that is
created by applying different voltages across
the electrode [Figure 2]. Compared to a CCD
area image sensor which is used as a linear
sensor by line binning, a one-dimensional CCD
having a resistive gate structure in the active
area offers higher speed transfer, allowing
readout with low image lag even if the pixel
height is large.
[Figure 1] Schematic diagram and potential
of ordinary 2-phase CCD
P1V
P2V
P1V
[Figure 2] Schematic diagram and potential
of resistive gate structure
P2V
REGL
REGH STG
TG
Resistive gate
N-
N
N-
N-
N
N
N-
N
P+
P
N-
N
N
P
Potential slope
KMPDC0320EA
www.hamamatsu.com
KMPDC0321EB
1
CCD linear image sensors
S11155-2048, S11156-2048
Absolute maximum ratings (Ta=25 °C)
Parameter
Operating temperature*2 *3
Storage temperature
OD voltage
RD voltage
Vret voltage
ARD voltage
ISH voltage
ARG voltage
STG voltage
IGH voltage
SG voltage
OG voltage
R G voltage
TG voltage
Resistive gate voltage
Symbol
Topr
Tstg
VOD
VRD
Vret
VARD
VISH
VARG
VSTG
VIG1H, VIG2H
VSG
VOG
VRG
VTG
VREGH
VREGL
VP1H, VP2H
High
Low
Horizontal clock voltage
Min.
-50
-50
-0.5
-0.5
-0.5
-0.5
-0.5
-10
-10
-10
-10
-10
-10
-10
Typ.
-
Max.
+50
+70
+25
+18
+18
+18
+18
+15
+15
+15
+15
+15
+15
+15
Unit
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
-10
-
+15
V
-10
-
+15
V
*2: Chip temperature
*3: The chip temperature may increase due to heating in high-speed operation. We recommend taking measures to dissipate heat
as needed. For more details, refer to the technical information.
Operating conditions (Ta=25 °C)
Parameter
Output transistor drain voltage
Reset drain voltage
All reset drain voltage
All reset gate voltage
High*4
Low*5
Output gate voltage
Storage gate voltage
Substrate voltage
Resistive gate high voltage
Resistive gate low voltage
High
Low
High
Low
Output amplifier return voltage
Horizontal input source
Test point
Horizontal input gate
High
Horizontal shift register clock voltage
Low
High
Summing gate voltage
Low
High
Reset gate voltage
Low
High
Transfer gate voltage
Low
External load resistance
Symbol
VOD
VRD
VARD
VARGH
VARGL
VOG
VSTG
VSS
VREGHH
VREGHL
VREGLH
VREGLL
Vret
VISH
VIG1H, VIG2H
VP1HH, VP2HH
VP1HL, VP2HL
VSGH
VSGL
VRGH
VRGL
VTGH
VTGL
RL
Min.
12
14
11
7
-2
4.5
-3.5
-9
-9
-9
5
-6
5
-6
7
-6
8.5
-7.5
2.0
Typ.
15
15
12
8
-1.5
5
0
0
-3
-8
VREGHH - 2.5
-8
1
VRD
-8
6
-5
6
-5
8
-5
9
-7
2.2
Max.
18
16
13
9
-1
5.5
-2.5
-7
-7
2
7
-4
7
-4
9
-4
9.5
-6.5
2.4
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
kΩ
*4: All reset on
*5: All reset off
2
CCD linear image sensors
S11155-2048, S11156-2048
Electrical characteristics (Ta=25 °C)
Parameter
Signal output frequency
Line rate
Horizontal shift register capacitance
All reset gate capacitance
S11155-2048
Resistive gate capacitance
S11156-2048
Summing gate capacitance
Reset gate capacitance
Transfer gate capacitance
Charge transfer efficiency*6
DC output level
Output impedance
Output amplifier return current
S11155-2048
Power consumption
S11156-2048
Resistive gate resistance*9
*6:
*7:
*8:
*9:
S11155-2048
S11156-2048
Symbol
fc
LR
CP1H, CP2H
CARG
Min.
0.99995
7
1.4
0.7
0.5
1
CREG
CSG
CRG
CTG
CTE
Vout
Zo
Iret
PAMP*7
PREG*8
PAMP*7
PREG*8
RREG
Typ.
5
2
200
100
1000
2000
10
10
100
0.99999
8
300
0.4
75
2.5
75
1.3
2.5
5
Max.
10
4
9
12.5
6.3
4.5
9
Unit
MHz
kHz
pF
pF
pF
pF
pF
pF
V
Ω
mA
mW
kΩ
Charge transfer efficiency per pixel of CCD shift register, measured at half of the full well capacity
Power consumption of the on-chip amplifier plus load resistance
Power consumption at REG
Resistance value between REGH and REGL
Electrical and optical characteristics (Ta=25 °C, unless otherwise noted)
Parameter
Symbol
Saturation output voltage
Full well capacity
CCD node sensitivity
Dark current*10
Nr
DR
Min.
7
-
λ
-
PRNU
L
-
Vsat
Fw
Sv
Non-MPP operation
MPP operation
Readout noise*11
Dynamic range*12
Spectral response range
Photo response non-uniformity*
Image lag*13
13, 14
*
DS
S11155-2048
Typ.
Max.
Fw × Sv
200
8
9
50
300
4
16
30
45
6670
200 to
1100
±3
±10
0.1
1
Min.
7
-
S11156-2048
Typ.
Max.
Fw × Sv
200
8
9
100
600
8
32
30
45
6670
200 to
1100
±3
±10
0.1
1
Unit
V
keμV/eke-/pixel/s
e- rms
nm
%
%
Dark current is reduced to half for every 5 to 7 °C decrease in temperature.
Readout frequency is 2 MHz
Dynamic range (DR) = Full well capacity / Readout noise
Measured at one-half of the saturation output (full well capacity) using LED light (peak emission wavelength: 660 nm)
Fixed pattern noise (peak to peak)
× 100 [%]
*14: Photo response non-uniformity =
Signal
*10:
*11:
*12:
*13:
3
CCD linear image sensors
S11155-2048, S11156-2048
Spectral transmittance characteristic of window material
Spectral response (without window)*15
(Typ. Ta=25 °C)
100
(Typ. Ta=25 °C)
100
90
80
70
Transmittance (%)
Quantum efficiency (%)
80
60
40
60
50
40
30
20
20
10
0
200
400
600
800
1000
0
100 200 300 400 500 600 700 800 900 100011001200
1200
Wavelength (nm)
Wavelength (nm)
KMPDB0316EA
KMPDB0303EA
*15: Spectral response with quartz glass is decreased according to the
spectral transmittance characteristic of window material.
Window material
Type No.
S11155-2048
S11156-2048
Window material
Quartz glass*16 (option: window-less)
*16: Resin sealing
Device structure (conceptual drawing of top view in dimensional outline)
Thinning
22
21
20
19
S2045
S2046
S2047
S2048
Thinning
23
Resistive gate D5 D6 D7 D8 D9 D10 S1 S2 S3 S4
18
17
16
D11 D12 D13 D14 D15 D16
Storage section
24
CCD horizontal shift register
D1 D2 D3 D4
D17 D18 D19 D20
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
KMPDC0339EB
4
CCD linear image sensors
S11155-2048, S11156-2048
Timing chart
Non-MPP operation
1 line output period
Tinteg
(electronic shutter: open)
Tpwar
(electronic shutter: closed)
ARG
REGH, REGL (REGH: -3 V, REGL: -5.5 V)
Tpwv
Tovr
TG
Tpwh, Tpws
2
1
P1H
3..2067
2068
P2H
SG
Tpwr
RG
OS
D1
D2
D19
D20
D3..D10, S1...S2048, D11..D18
KMPDC0340EB
ARG
TG
P1H, P2H*17
SG
RG
TG - P1H
Parameter
Pulse width
Rise and fall times
Pulse width
Rise and fall time
Pulse width
Rise and fall time
Duty ratio
Pulse width
Rise and fall time
Duty ratio
Pulse width
Rise and fall time
Overlap time
Integration time
Symbol
Tpwar
Tprar, Tpfar
Tpwv
Tprv, Tpfv
Tpwh
Tprh, Tpfh
Tpws
Tprs, Tpfs
Tpwr
Tprr, Tpfr
Tovr
Tinteg
Min.
1
200
30
20
50
10
40
50
10
40
5
5
1
30
Typ.
100
50
100
50
15
2
-
Max.
60
60
-
Unit
μs
ns
μs
ns
ns
ns
%
ns
ns
%
ns
ns
μs
μs
*17: Symmetrical clock pulses should be overlapped at 50% of maximum amplitude.
5
CCD linear image sensors
S11155-2048, S11156-2048
Timing chart
MPP operation
1 line output period
Tinteg
(electronic shutter: open)
Tpwar
(electronic shutter: closed)
ARG
(REGH=-3 V, REGL=-5.5 V)
Tpwreg
(REGH, REGL=-8 V)
REGH, REGL
Tpwv Tovr
TG
Tpwh, Tpws
P1H
2
1
3..2067
2068
2069
2070...
?
P2H
SG
Tpwr
RG
OS
D2
D19
D20
D1
D3..D10, S1...S2048, D11..D18
Normal readout period
Dummy readout period
KMPDC0347EC
Parameter
Symbol
Pulse width
Tpwar
ARG
Rise and fall times
Tprar, Tpfar
Pulse width
Tpwreg
REGH, REGL
Rise and fall times
Tprreg, Tpfreg
Pulse width
Tpwv
TG
Rise and fall times
Tprv, Tpfv
Pulse width
Tpwh
Rise and fall times
Tprh, Tpfh
P1H, P2H*19
Duty ratio
Pulse width
Tpws
SG
Rise and fall times
Tprs, Tpfs
Duty ratio
Pulse width
Tpwr
RG
Rise and fall times
Tprr, Tpfr
TG - P1H
Overlap time
Tovr
Integration time
Tinteg
*18: The Min. value of Tpwar is equal to the normal readout period.
*19: Symmetrical clock pulses should be overlapped at 50% of maximum amplitude.
Min.
*18
200
100
30
20
50
10
40
50
10
40
5
5
1
30
Typ.
Tinteg - Tpwv
100
50
100
50
15
2
-
Max.
60
60
-
Unit
μs
ns
μs
ns
μs
ns
ns
ns
%
ns
ns
%
ns
ns
μs
μs
6
CCD linear image sensors
S11155-2048, S11156-2048
Dimensional outline (unit: mm)
3.3 ± 0.35
Active area 28.672
10.03 ± 0.3
A
10.41 ± 0.25
13
24
0.25-0.03
+0.05
12
1
Index mark
27.94 ± 0.3
Index mark
1.47
Photosensitive surface
S11155-2048: A=0.500
S11156-2048: A=1.000
0.46 ± 0.05
1.72 ± 0.17
3.0 ± 0.5
1.27 ± 0.25
38.10 ± 0.4
2.54 ± 0.13
1.27 ± 0.2
KMPDA0262EB
Pin connections
Pin no.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
OS
OD
OG
SG
Vret
RD
REGL
REGH
P2H
P1H
IG2H
IG1H
ARG
ARD
ISH
SS
RD
STG
TG
RG
Function
Output transistor source
Output transistor drain
Output gate
Summing gate
Output amplifier return
Reset drain
Resistive gate (low)
Resistive gate (high)
CCD horizontal register clock-2
CCD horizontal register clock-1
Test point (horizontal input gate-2)
Test point (horizontal input gate-1)
All reset gate
All reset drain
Test point (horizontal input source)
Remark (standard operation)
RL=2.2 kΩ
+15 V
+5 V
Same pulse as P2H
+1 V
+15 V
-5.5 V (Non-MPP operation)
-3 V (Non-MPP operation)
Substrate
Reset drain
GND
+15 V
Storage gate
0V
-8 V
-8 V
+12 V
Connect to RD
Transfer gate
Reset gate
7
CCD linear image sensors
S11155-2048, S11156-2048
Related information
http://jp.hamamatsu.com/sp/ssd/CCD_e.html
O
Characteristics and use of resistive gate type CCD linear image sensors with electronic shutter
Driver circuits for CCD linear image sensor (S11155-2048, S11156-2048) C11165 [sold separately]
The C11165 is a driver circuit designed for HAMAMATSU CCD linear image sensors S11155-2048, S11156-2048. The C11165 can be used in
spectrometer when combined with the CCD linear image sensor.
Features
Built-in 16-bit A/D converter
Interface of computer: USB 2.0
Operates by DC+5 V
Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions.
Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein.
Type numbers of products listed in the specification sheets or supplied as samples may have a suffix “(X)” which means tentative specifications or a suffix “(Z)”
which means developmental specifications. ©2010 Hamamatsu Photonics K.K.
www.hamamatsu.com
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8
France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1 int. 6, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741
Cat. No. KMPD1118E03 May 2010 DN
8