CCD area image sensors
S7030/S7031 series
Back-thinned FFT-CCD
The S7030/S7031 series is a family of FFT-CCD image sensors speci¿cally designed for low-light-level detection in scienti¿c applications. By using the binning operation, the S7030/S7031 series can be used as a linear image sensor having a long aperture
in the direction of the device length. This makes the S7030/S7031 series suited for use in spectrophotometry. The binning operation offers signi¿cant improvement in S/N and signal processing speed compared with conventional methods by which signals are
digitally added by an external circuit. The S7030/S7031 series also features low noise and low dark signal (MPP mode operation).
This enables low-light-level detection and long integration time, thus achieving a wide dynamic range.
The S7030/S7031 series has an effective pixel size of 24 × 24 Njm and is available in image areas ranging from 12.288 (H) ×
1.392 (V) mm2 (512 × 58 pixels) up to a large image area of 24.576 (H) × 2.928 (V) mm2 (1024 × 250 pixels).
Features
Applications
Non-cooled type: S7030 series
One-stage TE-cooled type: S7031 series
Fluorescence spectrometer, ICP
Industrial inspection
Pixel size: 24 × 24 Njm
Semiconductor inspection
Line, pixel binning
Greater than 90% quantum ef¿ciency at peak
sensitivity wavelength
DNA sequencer
Low-light-level detection
Raman spectrometer
Wide spectral response range
Low readout noise
Wide dynamic range
MPP operation
High UV sensitivity with good stability
Selection guide
Type No.
S7030-0906
S7030-0907
S7030-1006
S7030-1007
S7031-0906S
S7031-0907S
S7031-1006S
S7031-1007S
Cooling
Non-cooled
One-stage
TE-cooled
Number of total pixels
532 × 64
532 × 128
1044 × 64
1044 × 128
532 × 64
532 × 128
1044 × 64
1044 × 128
Number of active
pixels
512 × 58
512 × 122
1024 × 58
1024 × 122
512 × 58
512 × 122
1024 × 58
1024 × 122
www.hamamatsu.com
Active area
[mm (H) × mm (V)]
12.288 × 1.392
12.288 × 2.928
24.576 × 1.392
24.576 × 2.928
12.288 × 1.392
12.288 × 2.928
24.576 × 1.392
24.576 × 2.928
Suitable multichannel
detector head
C7040
C7041
1
CCD area image sensors
S7030/S7031 series
General ratings
Parameter
Pixel size
Vertical clock phase
Horizontal clock phase
Output circuit
Package
Window*1
S7030 series
S7031 series
24 (H) × 24 (V) m
2 phases
2 phases
One-stage MOSFET source follower
24-pin ceramic DIP (refer to dimensional outlines)
Quartz glass
AR-coated sapphire
*1: Temporary window type (ex. S7030-0906N) is available upon request.
(Temporary window is ¿xed by tape to protect the CCD chip and wire bonding.)
Absolute maximum ratings (Ta=25 °C)
Parameter
Operating temperature*2
Storage temperature
Output transistor drain voltage
Reset drain voltage
Vertical input source voltage
Horizontal input source voltage
Vertical input gate voltage
Horizontal input gate voltage
Summing gate voltage
Output gate voltage
Reset gate voltage
Transfer gate voltage
Vertical shift register clock voltage
Horizontal shift register clock voltage
Symbol
Topr
Tstg
VOD
VRD
VISV
VISH
VIG1V, VIG2V
VIG1H, VIG2H
VSG
VOG
VRG
VTG
VP1V, VP2V
VP1H, VP2H
Min.
-50
-50
-0.5
-0.5
-0.5
-0.5
-10
-10
-10
-10
-10
-10
-10
-10
Typ.
-
Max.
+50
+70
+25
+18
+18
+18
+15
+15
+15
+15
+15
+15
+15
+15
Unit
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
Min.
18
11.5
1
-9
-9
4
-9
4
-9
4
-9
4
-9
4
-9
20
Typ.
20
12
3
0
VRD
VRD
-8
-8
6
-8
6
-8
6
-8
6
-8
6
-8
22
Max.
22
12.5
5
8
-7
8
-7
8
-7
8
-7
8
-7
24
Unit
V
V
V
V
V
V
V
V
*2: Package temperature (S7030 series), chip temperature (S7031 series)
Operating conditions (MPP mode, Ta=25 °C)
Parameter
Output transistor drain voltage
Reset drain voltage
Output gate voltage
Substrate voltage
vertical input source
horizontal input source
Test point
vertical input gate
horizontal input gate
High
Vertical shift register
clock voltage
Low
High
Horizontal shift register
clock voltage
Low
High
Summing gate voltage
Low
High
Reset gate voltage
Low
High
Transfer gate voltage
Low
External load resistance
Symbol
VOD
VRD
VOG
VSS
VISV
VISH
VIG1V, VIG2V
VIG1H, VIG2H
VP1VH, VP2VH
VP1VL, VP2VL
VP1HH, VP2HH
VP1HL, VP2HL
VSGH
VSGL
VRGH
VRGL
VTGH
VTGL
RL
V
V
V
V
V
k:
2
CCD area image sensors
S7030/S7031 series
Electrical characteristics (Ta=25 °C)
Parameter
Symbol
fc
Signal output frequency
Vertical shift register
capacitance
Horizontal shift register
capacitance
Summing gate capacitance
Reset gate capacitance
Transfer gate capacitance
Charge transfer ef¿ciency*
DC output level*4
Output impedance*4
Power consumption*4 *5
3
S703*-0906
S703*-0907/-1006
S703*-1007
S703*-0906/-0907
S703*-1006/-1007
S703*-0906/-0907
S703*-1006/-1007
Min.
-
CP1V, CP2V
CP1H, CP2H
-
CSG
CRG
-
CTG
-
CTE
Vout
Zo
P
0.99995
14
-
Typ.
0.25
750
1500
3000
110
180
30
30
55
75
0.99999
16
3
13
Max.
1
-
Unit
MHz
-
pF
-
pF
pF
-
pF
18
4
14
V
k:
mW
Max.
1000
100
16
±10
0
10
3
0
Unit
V
pF
*3: Charge transfer ef¿ciency per pixel, measured at half of the full well capacity
*4: The values depend on the load resistance. (Typical, VOD=20 V, Load resistance=22 k:)
*5: Power consumption of the on-chip ampli¿er plus load resistance
Electrical and optical characteristics (Ta=25 °C, unless otherwise noted)
Parameter
Saturation output voltage
Vertical
Full well capacity
Horizontal*6
CCD node sensitivity
25 °C
Dark current*7
(MPP mode)
0 °C
Readout noise*8
Line binning
Dynamic range*9
Area scanning
Photo response non-uniformity*10
Spectral response range
White spots
Point defect*11
Black spots
Blemish
Cluster defect*12
Column defect*13
Symbol
Vsat
Fw
Sv
DS
Nr
DR
PRNU
O
-
Min.
240
800
1.8
100000
30000
-
Typ.
Fw × Sv
320
1000
2.2
100
10
8
125000
40000
±3
200 to 1100
-
keV/ee-/pixel/s
e- rms
%
nm
-
*6: The linearity is ±1.5%.
*7: Dark current nearly doubles for every 5 to 7 °C increase in temperature.
*8: Measured with a HAMAMATSU C4880 digital CCD camera with a CDS circuit (sensor temperature: -40 °C, operating frequency:
150 kHz)
*9: Dynamic range = Full well capacity / Readout noise
*10: Measured at one-half of the saturation output (full well capacity) using LED light (peak emission wavelength: 560 nm)
Photo response non-uniformity =
Fixed pattern noise (peak to peak)
Signal
× 100 [%]
*11: White spots
Pixels whose dark current is higher than 1 ke- after one-second integration at 0 °C.
Black spots
Pixels whose sensitivity is lower than one-half of the average pixel output. (measured with uniform light producing one-half of the
saturation charge)
*12: 2 to 9 contiguous defective pixels
*13: 10 or more contiguous defective pixels
3
CCD area image sensors
S7030/S7031 series
Spectral response (without window)*14
(Typ. Ta=25 °C)
100
90
Back-thinned CCD
Quantum efficiency (%)
80
70
60
50
40
30
20
Front-illuminated CCD
(UV coated)
Front-illuminated CCD
10
0
200
400
600
800
1000
1200
Wavelength (nm)
KMPDB0058EB
*14: Spectral response with quartz glass or AR-coated sapphire is decreased according to the spectral transmittance characteristic of window material.
Spectral transmittance characteristics
Dark current vs. temperature
(Typ. Ta=25 °C)
100
(Typ.)
1000
90
100
80
70
Dark current (e-/pixel/s)
Transmittance (%)
Quartz window
AR-coated sapphire
60
50
40
30
10
1
0.1
20
10
0
100 200 300 400 500 600 700 800 900 1000 1100 1200
0.01
-50
-40
-30
-20
-10
0
10
20
30
Temperature (°C)
Wavelength (nm)
KMPDB0110EA
KMPDB0256EA
Window material
Type No.
S7030 series
S7031 series
S7032-1006/-1007
(two-stage TE-cooled types,
made to order)
Window material
Quartz glass*15
(option: window-less)
AR-coated sapphire*16
(option: window-less)
AR-coated sapphire*16
(option: window-less)
*15: Resin sealing
*16: Hermetic sealing
4
CCD area image sensors
S7030/S7031 series
Device structure (conceptual drawing of top view)
Thinning
23
15
20
21
13
14
2-bevel
22
H
1
signal out
n
24
2
5
4
3
2
12345
4-bevel
Thinning
V
12
2
11
3
4
5
4 blank pixels
8
2
6-bevel
n
V=58, 122
H=512, 1024
10
9
4 blank pixels
signal out
6-bevel
KMPDC0016EC
5
CCD area image sensors
S7030/S7031 series
Timing chart
Line binning
Integration period
(Shutter must be open.)
Tpwv
1
Vertical binning period
(Shutter must be closed.)
3.. 62
63
3..126 127
2
P1V
Readout period (Shutter must be closed.)
64← 58 + 6 (bevel): S703*-0906/-1006
128← 122 + 6 (bevel): S703*-0907/-1007
Tovr
P2V, TG
4..530 531
4..1042 1043
Tpwh, Tpws
P1H
1
2
3
532 : S703*-0906/-0907
1044: S703*-1006/-1007
P2H, SG
Tpwr
RG
OS
D1
D1
D2..D10, S1..S512, D11..D19
D2..D10, S1..S1024, D11..D19
D20 : S703*-0906/-0907
D20 : S703*-1006/-1007
KMPDC0017ED
Parameter
P1V, P2V, TG*17
P1H, P2H*17
SG
RG
TG – P1H
S703*-0906
Pulse width S703*-0907/-1006
S703*-1007
Rise and fall time
Pulse width
Rise and fall time
Duty ratio
Pulse width
Rise and fall time
Duty ratio
Pulse width
Rise and fall time
Overlap time
Symbol
Tpwv
Tprv, Tpfv
Tpwh
Tprh, Tpfh
Tpws
Tprs, Tpfs
Tpwr
Tprr, Tpfr
Tovr
Min.
1.5
3
6
10
500
10
500
10
100
5
3
Typ.
2
4
8
2000
50
2000
50
-
Max.
-
Unit
s
ns
ns
ns
%
ns
ns
%
ns
ns
s
*17: The clock pulses should be overlapped at 50% of clock pulse amplitude.
6
CCD area image sensors
S7030/S7031 series
Area scanning: large full well mode
Integration period
(Shutter must be open.)
Tpwv
1
2
Readout period (Shutter must be closed.)
4.. 63
4..127
3
64← 58 + 6 (bevel): S703*-0906/-1006
128←122 + 6 (bevel): S703*-0907/-1007
P1V
P2V, TG
P1H
P2H, SG
RG
OS
Tovr
P2V, TG
Enlarged view
Tpwh, Tpws
P1H
P2H, SG
Tpwr
RG
OS
D1
D2
D3
S1..S512
D4
D18
D5..D10, S1..S1024, D11..D17
D19
D20 : S703*-0906/-0907
: S703*-1006/-1007
KMPDC0127EC
Parameter
P1V, P2V, TG*18
P1H, P2H*18
SG
RG
TG – P1H
S703*-0906
Pulse width S703*-0907/-1006
S703*-1007
Rise and fall time
Pulse width
Rise and fall time
Duty ratio
Pulse width
Rise and fall time
Duty ratio
Pulse width
Rise and fall time
Overlap time
Symbol
Tpwv
Tprv, Tpfv
Tpwh
Tprh, Tpfh
Tpws
Tprs, Tpfs
Tpwr
Tprr, Tpfr
Tovr
Min.
1.5
3
6
10
500
10
500
10
100
5
3
Typ.
2
4
8
2000
50
2000
50
-
Max.
-
Unit
s
ns
ns
ns
%
ns
ns
%
ns
ns
s
*18: The clock pulses should be overlapped at 50% of clock pulse amplitude.
7
CCD area image sensors
S7030/S7031 series
Dimensional outlines (unit: mm)
S7030-0906/-0907
Window 16.3*
Window 28.6*
Active area
12.29
Active area 24.58
22.4 ± 0.30
A
8.2*
22.9 ± 0.30
22.4 ± 0.30
A
1
12
12
2.54 ± 0.13
2.54 ± 0.13
44.0 ± 0.44
3.0
4.8 ± 0.49
4.4 ± 0.44
2.35 ± 0.15
3.75 ± 0.44
3.0
Photosensitive surface
(24 ×) 0.5 ± 0.05
S7030-0906: A=1.392
S7030-0907: A=2.928
* Size of window that guarantees the transmittance in the
“Spectral transmittance characteristics” graph
S7030-1006: A=1.392
S7030-1007: A=2.928
Photosensitive surface
4.4 ± 0.44
1st pin indication pad
1st pin indication pad
4.8 ± 0.49
34.0 ± 0.34
3.75 ± 0.44
1
13
22.9 ± 0.30
24
13
2.35 ± 0.15
24
8.2*
S7030-1006/-1007
(24 ×) 0.5 ± 0.05
* Size of window that guarantees the transmittance in the
“Spectral transmittance characteristics” graph
KMPDA0047EG
KMPDA0046EF
8
CCD area image sensors
S7030/S7031 series
S7031-0906S/-0907S
S7031-1006S/-1007S
Window 16.3*
Window 28.6*
Active area
12.29
Active area 24.58
24
13
1
22.9 ± 0.30
19.0
1
22.4 ± 0.30
4.0
A
8.2*
22.9 ± 0.30
19.0
4.0
22.4 ± 0.30
13
A
12
2.54 ± 0.13
12
44.0 ± 0.44
2.54 ± 0.13
52.0
34.0 ± 0.34
60.0 ± 0.30
42.0
50.0 ± 0.30
1st pin indication pad
Photosensitive surface
Photosensitive surface
1st pin indication pad
(24 ×) 0.5 ± 0.05
* Size of window that guarantees the transmittance in the
“Spectral transmittance characteristics” graph
S7031-1006S: A=1.392
S7031-1007S: A=2.928
7.7 ± 0.68
7.3 ± 0.63
7.7 ± 0.68
7.3 ± 0.63
6.65 ± 0.63
1.0
S7031-0906S: A=1.392
S7031-0907S: A=2.928
4.89 ± 0.15
3.0
TE-cooler
6.65 ± 0.63
3.0
TE-cooler
1.0
4.89 ± 0.15
8.2*
24
(24 ×) 0.5 ± 0.05
* Size of window that guarantees the transmittance in the
“Spectral transmittance characteristics” graph
KMPDA0049EH
KMPDA0048EG
9
CCD area image sensors
S7030/S7031 series
Pin connections
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
RD
OS
OD
OG
SG
P2H
P1H
IG2H
IG1H
ISH
TG*19
P2V
P1V
SS
ISV
IG2V
IG1V
RG
S7030 series
Function
Reset drain
Output transistor source
Output transistor drain
Output gate
Summing gate
CCD horizontal register clock-2
CCD horizontal register clock-1
Test point (horizontal input gate-2)
Test point (horizontal input gate-1)
Test point (horizontal input source)
Transfer gate
CCD vertical register clock-2
CCD vertical register clock-1
Substrate (GND)
Test point (vertical input source)
Test point (vertical input gate-2)
Test point (vertical input gate-1)
Reset gate
Symbol
RD
OS
OD
OG
SG
P2H
P1H
IG2H
IG1H
ISH
TG*19
P2V
P1V
Th1
Th2
PP+
SS
ISV
IG2V
IG1V
RG
S7031 series
Function
Reset drain
Output transistor source
Output transistor drain
Output gate
Summing gate
Remark
(standard operation)
+12 V
RL=22 k:
+20 V
+3 V
Same pulse as P2H
CCD horizontal register clock-2
CCD horizontal register clock-1
Test point (horizontal input gate-2)
Test point (horizontal input gate-1)
Test point (horizontal input source)
Transfer gate
CCD vertical register clock-2
CCD vertical register clock-1
Thermistor
Thermistor
TE-coolerTE-cooler+
Substrate (GND)
Test point (vertical input source)
Test point (vertical input gate-2)
Test point (vertical input gate-1)
Reset gate
-8 V
-8 V
Connect to RD
Same pulse as P2V
GND
Connect to RD
-8 V
-8 V
*19: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse as P2V.
Speci¿cations of built-in TE-cooler (Typ. vacuum condition)
Parameter
Internal resistance
Maximum current*20
Maximum voltage
Maximum heat absorption*23
Maximum temperature
of heat radiating side
Symbol
Condition
Rint Ta=25 °C
Imax Tc*21=Th*22=25 °C
Vmax Tc*21=Th*22=25 °C
Qmax
-
S7031-0906S/-0907S
2.5
1.5
3.8
3.4
S7031-1006S/-1007S
1.2
3.0
3.6
5.1
Unit
:
A
V
W
70
70
°C
*20: If the current greater than this value Àows into the thermoelectric cooler, the heat absorption begins to decrease due to the Joule
heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and maintain stable
operation, the supply current should be less than 60% of this maximum current.
*21: Temperature of the cooling side of thermoelectric cooler
*22: Temperature of the heat radiating side of thermoelectric cooler
*23: This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the maximum
current is supplied to the unit.
10
CCD area image sensors
S7030/S7031 series
6
30
7
20
6
0
3
-10
2
-20
-30
1
-30
-40
2.0
0
0
3
-10
2
-20
1
0.5
1.0
1.5
20
4
4
0
30
10
10
0
(Typ. Ta=25 °C)
Voltage vs. Current
CCD temperature vs. Current
5
5
Voltage (V)
Voltage vs. Current
CCD temperature vs. Current
CCD temperature (°C)
(Typ. Ta=25 °C)
7
Voltage (V)
S7031-1006S/-1007S
0
2
1
3
4
CCD temperature (°C)
S7031-0906S/-0907S
-40
Current (A)
Current (A)
KMPDB0178EA
KMPDB0179EA
Specifications of built-in temperature sensor
A thermistor chip is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation between the
thermistor resistance and absolute temperature is expressed by the following equation.
1 MΩ
The characteristics of the thermistor used are as follows.
R298=10 k:
B298/323=3450 K
Resistance
RT1 = RT2 × exp BT1/T2 (1/T1 - 1/T2)
RT1: Resistance at absolute temperature T1 [K]
RT2: Resistance at absolute temperature T2 [K]
BT1/T2: B constant [K]
100 kΩ
10 kΩ
220
240
260
280
300
Temperature (K)
KMPDB0111EB
11
CCD area image sensors
S7030/S7031 series
Precaution for use (electrostatic countermeasures)
O Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with an earth ring, in
order to prevent electrostatic damage due to electrical charges from friction.
O Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge.
O Provide ground lines or ground connection with the work-Àoor, work-desk and work-bench to allow static electricity to discharge.
O Ground the tools used to handle these sensors, such as tweezers and soldering irons.
It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage
that occurs.
Element cooling/heating temperature incline rate
When cooling the CCD by an externally attached cooler, set the cooler operation so that the temperature gradient (rate of temperature change)
for cooling or allowing the CCD to warm back is less than 5 K/minute.
Multichannel detector heads C7040, C7041
Features
C7040: for S7030 series
C7041: for S7031 series
Area scanning or full line-binnng operation
Readout frequency: 250 kHz
Readout noise: 20 e- rms
'T=50 °C ('T changes by cooling method.)
Input
Master start
Symbol
VD1
VA1+
VA1VA2
VD2
Vp
VF
Ims
Master clock
Imc
Supply voltage
Value
+5 Vdc, 200 mA
+15 Vdc, +100 mA
-15 Vdc, -100 mA
+24 Vdc, 30 mA
+5 Vdc, 30 mA (C7041)
+5 Vdc, 2.5 A (C7041)
+12 Vdc, 100 mA (C7041)
HCMOS logic compatible
HCMOS logic compatible,
1 MHz
Information described in this material is current as of January, 2011. Product specifications are subject to change without prior notice due to improvements or other
reasons. Before assembly into final products, please contact us for the delivery specification sheet to check the latest information.
Type numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or a suffix
"(Z)" which means developmental specifications.
The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that one year
period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use.
Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission.
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France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1 int. 6, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741
Cat. No. KMPD1023E17 Jan. 2011 DN
12