HT8658/HT8659 Voice Recorder (DRAM) Features • • • • • • Single power supply: 4.5V~5.5V ADM coding algorithm DRAM options: – 4×256K bits – 3×1M bits A built-in 2 stage MIC amplifier A built-in low pass filter • • Data rate options (bits per second): – 32K bps – 22K bps – 16K bps – 11K bps A status LED indicator Auto playback • Toys Applications • • Message box Recorder General Description in external DRAMs and played back after the PLYB pin be triggered. Each IC provides four kinds of sampling rate to be selected, namely 32K/22K/16K/11K bps (bits per second). A higher sampling rate results in sounds of better quality but sacrifices the recording time. With such a powerful built-in circuit, only few components are required for normal applications. Each IC can be offered in a dice form or 28 pin dual-in-line package. The HT8658/HT8659 are single chip CMOS LSIs using an ADM coding technology. They are designed for applications on recording sounds. The HT8658 and HT8659 have almost the same functions apart from the reset time. The reset time of the HT8658 has to be over 4 seconds but of the HT8659 over 2 seconds. Blocks within each chip include a DRAM interface circuit, signal amplifier, 8 bit ADC and internal low pass filter. Encoded data are stored Pin Assignment AS4 1 28 AS5 AS4 1 28 AS5 AS3 2 27 AS6 AS3 2 27 AS6 AS2 3 26 AS7 AS2 3 26 AS7 AS1 4 25 AS8 AS1 4 25 AS8 AS0 5 24 AS9 AS0 5 24 AS9 VDD 6 23 OSC1 VDD 6 23 OSC1 AIN 7 22 OSC2 AIN 7 22 OSC2 AO 8 21 DATA AO 8 21 DATA BIAS 9 20 RASB BIAS 9 20 RASB FOUT 10 19 WRB VOUT 10 19 WRB VSS 11 18 RESB VSS 11 18 RESB CAS1B 12 17 RECB CAS1B 12 17 RECB CAS2B 13 16 PLYB CAS2B 13 16 PLYB CAS3B 14 15 LEDB CAS3B 14 15 LEDB HT8658A/8659A – 28 DIP HT8658B/8659B – 28 DIP 1 26th Sep ’96 HT8658/HT8659 Block Diagram Pad Coordinates Unit: mil Pad No. X Y 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 –62.92 –62.92 –62.92 –62.92 –62.92 –62.92 –62.92 –62.92 –62.92 –62.92 –46.43 –38.78 33.55 43.16 52.76 29.69 19.30 8.37 –2.30 –13.22 –23.89 –34.81 –45.48 –56.40 –67.07 –70.76 –70.76 –70.76 –70.76 –70.76 Pad No. X Y 16 17 18 19 20 21 22 23 24 25 26 27 28 29 62.37 62.37 62.71 62.71 62.71 62.71 62.71 62.71 62.71 62.71 50.98 –45.07 –54.93 –62.58 –70.76 –54.61 –44.84 –34.81 –23.04 –13.94 –2.93 8.88 58.69 70.34 70.34 70.51 70.51 70.51 Chip size: 138 ×154 (mil)2 ∗ The IC substrate should be connected to VDD in the PCB layout artwork. 2 26th Sep ’96 HT8658/HT8659 Pad Description Pad Name I/O Internal Connection Description 1 AS9 I/O Pull-High CMOS Input: For IC test only Output: Address output for DRAM of 1Mb and column address strobe for DRAM of 256Kb 2 AS8 I/O Pull-High CMOS Input: For IC test only Output: Address output to DRAM 3 AS7 I/O Pull-High CMOS Input: For IC test only Output: Address output to DRAM I/O Pull-High CMOS Pad No. Input: 4 AS6 For IC test only 1: For IC test only 0: Not applicable Output: Address output to DRAM Input: 5 AS5 I/O Pull-High CMOS DRAM type selection: 1: 256Kb (without external pull-low resistors) 0: 1Mb (with an external pull-low resistor) Output: Address output to DRAM Input: Manual/Auto playback selection: 1: Manual (without external pull-low resistors) 0: Auto (with an external pull-low resistor) Output: Address output to DRAM 6 AS4 I/O Pull-High CMOS 7,8 AS3,AS2 I/O Pull-High CMOS 9,10 AS1,AS0 I/O Pull-High CMOS 11 VDD I — Positive power supply 12 AIN I — Pre-amplifier input pin 13 AO O — Pre-amplifier output pin Amplifier gain should be adjusted between AIN and AO by a resistor. 14 BIAS I — For internal OP bias de-coupling 15 VOUT O — Audio signal output (non-filtered, output directly) 16 FOUT O — Audio signal output through an internal low-pass filter 17 VSS I — Negative power supply (GND) Input: DRAM chip number selection (refer to the functional description) Output: Address output to DRAM Input: Sampling rate selection (refer to the functional description) Output: Address output to DRAM 3 26th Sep ’96 HT8658/HT8659 Pad No. Pad Name I/O Internal Connection Description 18~20 CAS1B~ CAS3B O CMOS 21 LEDB O Open Drain NMOS 22 PLYB I Pull-High Play/Pause trigger input (toggle function) 23 RECB I Pull-High Record/Pause trigger input (toggle function) 24 RESB I Pull-High Reset the system or the play counter 25 WRB O CMOS Write enable signal output for DRAM interface 26 RASB O CMOS Row address strobe output for DRAM interface 27 DATA I/O — Encoded data I/O pin 28 29 OSC2 OSC1 O I — Oscillation external resistor connect pin Column address strobe for DRAM1~DRAM3 Status indicator when LSI is active Absolute Maximum Ratings Supply Voltage .................................. –0.3 to 6V Storage Temperature ............... –50°C to 125°C Input Voltage ............... VSS–0.3 Vto VDD+0.3V Operating Temperature ............. –20°C to 70°C Electrical Characteristics Symbol (Ta=25°C) Test Condition Parameter VDD Condition Min. Typ. Max. Unit VDD Operating Voltage — — 4.5 5.0 5.5 V IDD Operating Current 5V No load, FOSC=384KHz — 0.8 2.0 mA ISTB Stand-By Current 5V — — 40 100 µA IOL LED Sink Current 5V 3.0 5.0 — mA VIH “H” Input Voltage — — 0.7VDD — VDD V VIL “L” Input Voltagse — — 0 — 0.2VDD V FOSC System Frequency 5V ROSC=91K — 384 — KHz VOUT Max. Vout Output Voltage 5V RL>50K 1.5 — — VP-P VOL=0.5V 4 26th Sep ’96 HT8658/HT8659 Functional Description The HT8658/HT8659 are single chip LSIs with an external DRAM (dynamic random access memory). They are designed for applications on recording sounds. The recording length is decided by the data rate along with the size of an external memory. The type as well as amount of DRAM, operation mode and sampling rate are determined by the connection of the AS0~AS6 pins. The HT8658/8659 provide 2 audio outputs. One is filtered by an internal low pass filter for the sake of improving sound quality in addition to minimizing external required components. The other is non-filtered and a voice signal can be filtered with an external circuit to decide the audio cut-off frequency as well as band width. The two chips have the same functions except the reset time as shown: Name Reset Time (Minimum) HT8658 4 seconds HT8659 2 seconds Initial setting of operation mode The HT8658/HT8659 load the statuses of the AS0~AS6 pins into a mode register after power is initially turned on or the system is reset. These pins are internally built with pull-high resistors so that all inputs with “1” are the default value of the mode register. External pull-low resistors which are tied to the AS0~ AS6 pins defines the operation mode of the ICs as shown in the following table: AS0 AS1 AS2 AS3 AS4 AS5 AS6 Function Description 0 1 1 0 0 0 1 1 X X X X X X X X X X X X X X X X X X X X Data rate: 32K bps Data rate: 22K bps Data rate: 16K bps Data rate: 11K bps X X X X X X X X 0 1 0 1 0 0 1 1 X X X X X X X X X X X X DRAM chip number: 4 pcs DRAM chip number: 3 pcs DRAM chip number: 2 pcs DRAM chip number: 1 pcs X X X X X X X X X X X X X X X X 1 0 1 0 X X X X 1 1 0 0 Operation mode: Normal mode Operation mode: Auto play back mode Operation mode: Not applicable Operation mode: Not applicable X X X X X X X X X X 1 0 X X DRAM type: 256Kb DRAM type: 1Mb Notes: 1.“0” connects an external pull-low resistor to ASn, where n=0~6. 2.“1” connects no external pull-low resistor to ASn, where n=0~6. 3.“X” means don’t car. 5 26th Sep ’96 HT8658/HT8659 Recording capacity Record function The HT8658/HT8659 offer 4 kinds of voice sampling rate, namely 32K, 22K, 16K and 11Kbps (based on a system frequency of 384KHz), selectable by the connection of the AS0 and AS1 pins. The voice sampling rate decides the recording capacity of the ICs in addition to the type and amount of DRAM. A higher sampling rate results in sounds of better quality but shortens the recording time. The HT8658/HT8659 enter the recording state from the standby state when the memories are not full and the REC key is triggered as well. In the recording state, sounds input from an external microphone are coded by an internal ADM (adaptive delta modulation) algorithm and saved in an external memory until the memories are all full or the REC key is retriggered. Sampling Rate DRAM Size (Maximum) During recording, recording will pause and the recording counter stop counting by retriggering the REC key. At this time, if the memories are not full and the REC key is triggered again, the ICs will record sounds from the pause position. Once the memories are full, recording will be terminated and any retrigger to the REC key be ignored. Recording Time 32K bps 1Mb×3 94 seconds 22K bps 1Mb×3 136 seconds 16K bps 1Mb×3 188 seconds 11K bps 1Mb×3 272 seconds After recording is stopped, the HT8658/HT8659 will play back the recorded sounds automatically in the AUTO PLAY mode. They, on the other hand, will play back the recorded sounds by manually triggering the PLAY key in the normal mode. Recording Time Memory selection The HT8658/HT8659 provide a DRAM interface circuit. The type as well as amount of DRAM decides the recording length of the ICs at a designated sampling rate. There are 2 kinds of DRAM, namely 256Kb and 1Mb, selectable by the connection of the AS5 pin. The ICs can interface with a maximum of 4 DRAMs for the 256Kb type but 3 DRAMs for the 1Mb type. The amount of DRAMs is decided by the connection of the AS2 and AS3 pins. AS5 AS3 AS2 Memory Size 1 1 1 256Kb×1 1 1 0 256Kb×2 1 0 1 256Kb×3 1 0 0 256Kb×4 0 1 1 1Mb×1 0 1 0 1Mb×2 0 0 1 1Mb×3 0 0 0 1Mb×3 Play function The HT8658/HT8659 provide 2 kinds of playing modes, namely normal mode and AUTO PLAY mode. In the normal mode, the ICs will play back the recorded sounds when recording is terminated and the PLAY key is triggered. In the AUTO PLAY mode, they will play back the recorded sounds automatically without manually triggering the PLAY key once recording is terminated. In the process of playing sounds, triggering the PLAY key will pause the playing back in addition to the playing counter. To resume playing back, simply retrigger the PLAY key. Playing back will start at the pause position. Notes: 1. “0” connects an external pull-low resistor to ASn, where n=2,3, or 5. 2. “1” connects no external pull-low resistors to ASn, where n=2, 3 or 5. 6 26th Sep ’96 HT8658/HT8659 AS4 AS6 1 1 Normal mode Function 0 1 AUTO PLAY mode 1 0 Not applicable 0 0 Not applicable Notes: 1. “0” connects an external pull-low resistor to ASn, where n=4, 6. 2. “1” connects no external pull-low resistor to ASn, where n=4, 6. System reset The reset time of the HT8658 and HT8659 is different. The HT8658 will reset the system if the RES key is pressed more than 4 seconds and reset the playing counter if the RES key is pressed less than 4 seconds. The HT8659, on the other hand, will reset the system if the RES key is pressed over 2 seconds and reset the playing counter if the key is pressed less than 2 seconds. Once the playing counter is reset, the ICs will play back the recorded data from the beginning by triggering the PLAY key. All of the recorded data will be deleted after the system is reset. Indicate function The HT8658/HT8659 provide an LEDB pin to indicate the operation status of the LSI through an external LED display. The LEDB pin is of high impedance and an external LED is switched off in the standby state. LEDB, on the other hand, remains at a low level and LED is turned on in the recording state. In the playback state, LED flashes with the volume of output sounds. When the system is reset, it flashes at a 2Hz rate. 7 26th Sep ’96 HT8658/HT8659 Operation flowchart • HT8658 8 26th Sep ’96 HT8658/HT8659 • HT8659 9 26th Sep ’96 HT8658/HT8659 • Normal mode operation (AS4=1, AS6=1) 10 26th Sep ’96 HT8658/HT8659 • Auto playback mode (AS4=0, AS6=1) Notes: 1. RECC: Recording counter 2. PLAYC: Playing-back counter 3. m,n: DRAM addresses 11 26th Sep ’96 HT8658/HT8659 Application Circuits With a DRAM interface of 1Mb (Chip form) 100K×7 270K 29 28 27 1 17 3 2 18 DI DO RASB WRB VSS CASB3 16 9 CASB2 CASB1 VDD A9 15 A8 14 AS9 A7 13 12 A6 11 A5 10 A4 8 A3 7 A2 6 A1 5 A0 AS7 AS8 AS6 AS5 AS4 AS3 AS2 AS1 AS0 REC 3 4 HT8658/HT8659 9 11 12 10 VSS 300 VDD 100µ 10V 0.1µ 100µ 10V 1N4001 20K 100µ/10V 0.1µ 22µ 10V CAS2B CAS1B FOUT VOUT BIAS MIC AO 4.7K CAS3B 19 18 17 13 14 15 16 7 8 PALY PLYB LEDB 22 21 20 5 6 100 RES RECB 23 AIN 0.1µ 26 25 RESB 24 1 2 VDD DRAM 1Mb×3 WRB RASB DATA OSC2 120K OSC1 20K 3 220µ 10V 6 2 LM386 4 5 0.1µ 10 SPK 8Ω VCC 6V ∗ Τhe IC substrate should be connected to VDD in PCB layout artwork. 12 26th Sep ’96 HT8658/HT8659 With a DRAM interface of 1Mb (Package form) 13 26th Sep ’96 HT8658/HT8659 With a DRAM interface of 256Kb (Chip form) 100K×7 270K 29 28 27 2 14 4 3 16 15 8 DI DO RASB WRB VSS CASB4 CASB3 CASB2 CASB1 VDD AS9 AS8 A8 1 A7 9 A6 13 AS7 AS6 AS5 AS4 A5 10 A4 11 A3 12 6 A2 7 A1 5 A0 AS3 AS2 AS1 AS0 RECB 23 3 4 HT8658/HT8659 9 11 12 10 300 VDD 100µ 10V 1N4001 20K 100µ/10V 0.1µ 22µ 10V VSS FOUT MIC VOUT BIAS 4.7K AO 100 CAS2B CAS1B 0.1µ 100µ 10V REC CAS3B 19 18 17 13 14 15 16 7 8 RES PLAY PLYB LEDB 22 21 20 5 6 AIN 0.1µ 26 25 RESB 24 1 2 VDD DRAM 256Kb×4 WRB RASB DATA OSC2 120K OSC1 20K 3 220µ 10V 6 2 LM386 4 5 0.1µ 10 SPK 8Ω VCC 6V ∗ Τhe IC substrate should be connected to VDD in PCB layout artwork. 14 26th Sep ’96 HT8658/HT8659 With a DRAM interface of 256Kb (Package form) 15 26th Sep ’96