MP1015 Full System Precision CCFL Driver Monolithic Power Systems Features General Description The MP1015 is a Power IC that offers a true complete solution for driving a Cold Cathode Fluorescent Lamps (CCFL). This Power IC converts unregulated DC voltage to a nearly pure sine wave required to ignite and operate the CCFL. Based on proprietary power topology and control techniques (patented), it greatly increases the power conversion efficiency. The MP1015 can be used with analog or burst mode dimming without any additional external components. The MP1015 offers four distinct performance advantages: 1. 2. 3. 4. Built-in Burst Mode Oscillator and Modulator Built-in Analog and Burst Mode Dimming Built-in Current and Voltage Feedback Control Built-in Open/Short Lamp Protection Built-in Dual Mode Fault Timer Built-in Soft-on/Soft-off Burst Mode Automatic Recovery from ESD Event Wide Range 6 to 22V Battery Voltage with Regulated Lamp Current Startup at all voltages and temp without additional components Integrated 0.10Ω Power Switches Output Short Circuit Protected No High Voltage Ballast Capacitor Evaluation Board Available More light for less power Smallest board implementation possible Low EMI emission Low cost off the shelf components Ordering Information Applications Part Number∗ Package Temperature MP1015EM TSSOP20 -20°C to +85°C MP1015EF TSSOP20F -20°C to +85°C EV0001 MP1015EM Evaluation Board LCD Backlight inverter for notebook computers, Web Pads, GPS, or desktop display ∗ For Tape & Reel use suffix - Z (e.g. MP1015EM-Z) Figure 1: Typical Circuit for PWM or Analog Mode Operation (includes all protection requirements) Cisb Risb CbaR Ccomp Cref Cft Cs2 Rs Csfb CbtR Rsfb Cp 2 3 4 PGnd T1 Rdamp 5 6 Cdrv Cbosc Rdbr 7 8 9 10 Lamp BtL PGnd OutL Batt En Drv DBrt Bosc IL ABrt 1 ABrt Cs1 11 12 BtR 13 Batt FT 14 OutR 15 MP 1015 Rbosc DBrt 16 Ref 17 Comp 18 VLFB 19 ISFB AGnd 20 Rlfb CbtL CbaL Rbleed En Cdbr Gnd F1 Cba Batt MP1015 Rev 2.7_03/25/03 www.monolithicpower.com 1 MP1015 Full System Precision CCFL Driver Monolithic Power Systems Absolute Maximum Ratings Recommended Operating Conditions 25V Input Voltage (VBatt) IL, ISFB Input Voltages (VIL, VISFB) +/-6V VLFB Input Voltage (VVLFB) -0.3 to 12V Logic Input Voltages -0.3 to 6.8V Power Dissipation 1.0W Operating Frequency 150KHz Junction Temperature 150°C Lead Temperature (Solder) 260°C Storage Temperature –55°C to 150°C Input Voltage (VBatt) Analog Brightness Voltage (VABrt) Digital Brightness Voltage (VDBrt) Enable (VEn) Operating Frequency (Typical) Ambient Operating Temperature 6 to 22V 0 to 1.9V 0 to 1.8V 0 to 5V 60KHz -20°C to +85°C Thermal Characteristics Thermal resistance θJA (TSSOP) Thermal resistance θJA (TSSOPF) 140°C/W 110°C/W Electrical Characteristics (Unless otherwise specified VBatt=12V, TA=25°C) Parameters Symbol Condition Min Typ Max Units VRef IRef IRef = 3mA 4.75 5.0 5.25 3.0 30 30 V mA mV mV 10 2.5 µA mA 1.3 V µA Reference Voltage Output Voltage Reference Current Line Regulation Load Regulation Battery Supply Supply Current (disabled) Supply Current (enabled) 6.5V < VBatt< 22V 0 < IRef< 3.0mA IBatt IBatt 6.0V < VBatt< 22V 1.6 Shutdown Logic Fault Timer Threshold Fault Timer Sink Current Fault Timer Source Current Open Lamp Secondary Overload Enable Voltage Low Enable Voltage High Output Drivers Switch On Resistance Short Circuit Current Ton(min) Ton(min) Brightness Control Sense full Brightness Sense full Dim Lamp Current regulation Burst Oscillator Sink Current Burst Oscillator Peak Voltage Digital Brightness Offset Voltage V(TH)FT VVLFB>0, VISFB<1.2V 1.1 1.2 1 VVLFB<0, VISFB<1.2V VISFB>1.2V 1 120 V(L)En V(H)En 0.5 2.0 R(ON)OutL,OutR ISC (Note 1) 0.085 VComp=0V, VBatt=22V VComp=0V, VBatt=6V VIL VIL VABrt= 2.0V VABrt= 0V 7V < VBatt< 22V IBosc VBosc V(OS) DBrt 360 105 1.7 -50 0.12 4 435 1750 379 117 2 380 1.8 5 0.15 550 2100 400 130 5 1.9 50 µA µA V V Ω A ns ns mV mV % µA V mV Fault Loop Control Open Lamp Threshold Secondary Current Threshold Fault Mode Comp Current V(TH)VLFB V(TH)ISFB IComp VVLFB<0V, VISFB>1.2V 0 1.2 475 V V µA Note 1: This parameter is guaranteed by design. MP1015 Rev 2.7_03/25/03 www.monolithicpower.com 2 MP1015 Full System Precision CCFL Driver Monolithic Power Systems Pin Description ABrt 1 IL 2 Bosc 3 DBrt 4 En 5 Drv 6 Batt 7 OutL 8 PGnd 9 BtL 10 20 19 18 17 16 15 14 13 12 11 AGnd ISFB VLFB FT Comp Ref Batt OutR PGnd BtR Table 1: Pin Designators Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Name ABrt IL Bosc DBrt En Drv Batt OutL PGnd BtL BtR PGnd OutR Batt Ref Comp FT VLFB ISFB AGnd Pin Function Analog Dimming Lamp Current Feedback Sense Input Burst Oscillator Timing Burst Mode Dimming Chip Enable. Do not float this pin. Internally Generated MOSFET Gate Drive Supply Voltage (6V) Power Supply Input Output to Load (tank circuit) Power Ground Regulated Output Voltage for Bootstrap Capacitor on Phase L Regulated Output Voltage for Bootstrap Capacitor on Phase R Power Ground Output to Load (tank circuit) Power Supply Input Internally Generated Reference Voltage Output (5V) Loop Compensation Capacitor Fault Timer Open Lamp Detect (Lamp Voltage Feedback.) Shorted Lamp Detect (Secondary Current Feedback) Small Signal Ground (Note 1) Note 1: For the MP1015EF, connect the exposed paddle to AGND (Pin 20). MP1015 Rev 2.7_03/25/03 www.monolithicpower.com 3 MP1015 Full System Precision CCFL Driver Monolithic Power Systems Figure 2: Functional Block Diagram Batt Ref 5V Internal Regulators Comp IL OutL Drv 6V OutR Ref 5V ABrt 2.5V + S Q - R Q O O MUX 75mV+ - S Q R Q + FT ISFB En + 1.2V - DBrt + Control Logic & TSD - Q T Q VLFB Bosc + Feature Description Brightness Control Fault Protection The MP1015 can operate in three modes: Analog Mode, Burst Mode with a DC input, or Burst Mode with an external PWM. The three modes are dependent on the pin connections as per Table 1. Choosing the required burst repetition frequency can be achieved by an RC combination, as defined in component selection. The MP1015 has a soft on and soft off feature to reduce noise, when using burst mode dimming. Open Lamp: The VLFB pin (#18) is used to detect whether an open lamp condition has occurred. During normal operation the VLFB pin is typically at 5V DC with an AC swing of +/- 2V. If an open lamp condition exists then the AC voltage on the VLFB line will swing below zero volts. When that occurs, the IC regulates the VLFB voltage to 10V p-p and a 1µA current source will inject into the FT pin. If the voltage at the FT pin exceeds 1.2V, then the chip will shut down. Table 2: Function Mode Function Analog Mode Burst Mode with DC input voltage Burst Mode from external source Pin Connection Pin 1 Pin 4 Pin 3 ABrt DBrt Bosc 0 – 1.9V VRef AGnd Rbosc VRef 0 – 1.8V Cbosc VRef PWM Brightness Polarity: Burst: 100% duty cycle is at 1.8V Analog: 1.9V is maximum brightness MP1015 Rev 2.7_03/25/03 1.5V Excessive Secondary Current (Shorted Lamp and UL safety specs): The ISFB pin (#19) is used to detect whether excessive secondary current has occurred. During normal operation the ISFB voltage is a 1V p-p AC signal centered at zero volts D.C. If a fault condition occurs that increases the secondary current, then the voltage at ISFB will be greater than 1.2V. When that occurs, the IC regulates the ISFB voltage to 2.4V p-p and a 120µA current source will inject into the FT pin. If the voltage at the FT pin exceeds 1.2V, then the chip will shut down. www.monolithicpower.com 4 MP1015 Full System Precision CCFL Driver Monolithic Power Systems Feature Description (continued) Fault Timer: The timing for the fault timer will depend on the sourcing current, as described above, and the capacitor on the FT pin. The user can program the time for the voltage to rise before the chip detects a “real“ fault. When a fault is triggered, then the internal drive voltage (VDrv) will collapse from 6.2V to 0V. The reference voltage will stay high at 5.0V. Lamp Startup The strike voltage of the lamp will always be guaranteed at any temperature because the MP1015 uses a resonant topology for switching the outputs. The device will continue to switch at the resonant frequency of the tank until the strike voltage is achieved. This eliminates the need for external ramp timing circuits to ensure startup. Customer to achieve the required open lamp voltage detection value, typically 4nF. Cs2=Cs1 * V(max)rms/ 3.5Vrms) The value of Rs is typically 300KΩ (not critical). Pin 17 (FT): Cft The Cft cap is used to set the fault timer. This capacitor will determine when the chip will reach the fault threshold value. The user can choose the cap value to set the time out value. Open Lamp Time Cft (nF) = T(open lamp) (1µA)/ 1.2 V For a Cft= 820nF, then the time out for open lamp will be 0.98 sec. The chip has an on / off function, which is controlled by the En pin (#5). The enable signal goes directly to a Schmitt trigger. The chip will turn ON with an En = High and OFF with an En = Low. Secondary Short Turn Off time Because the sourcing current for a secondary short is approx. 120µA, then the off time when a resistive short occurs across the lamp will be approx 100 times faster than the open lamp time. Application Information To reduce the turn off time even further, then by modifying the connection at the FT node to: Chip Enable Pin 19 (ISFB) : Rsfb, Csfb , Risb and Cisb (Secondary Short Protection) The Rsfb and Csfb combination is used for feedback to the IS pin to detect excessive secondary current. These resistors have to be +/5% tolerance components. The value for Rsfb is approximately 1.7KΩ and Csfb is approximately 82nF. This will ensure that the voltage at the ISFB pin is typically 1.0V during steady state operation. The maximum value for Csfb is 93nF to ensure that the chip will meet the UL1950 specification. Risb and Cisb components are used as a high pass filter. Pin 18 (VLFB): Cs1, Cs2 and Rs (Open Lamp protection) The regulated open lamp voltage is proportional to the Cs1 and Cs2 ratio. Cs1 has to be rated at 3KV and is typically between 5 to 22pF. The value of Cs1 is typically 15pF and is chosen for a specified maximum frequency. The value of Cs2 is set by the MP1015 Rev 2.7_03/25/03 100K FT Cft 10nf Figure 3: Turn Off Time Adjustment For a Cap=10nF, then the time out for secondary short will be 0.11ms. The turn off time for the secondary short will be reduced by an additional 100 times. Note: The open lamp time will remain the same value as defined by Cft. Pin 16 (Comp): Ccomp This cap is the system compensation cap that connects between comp and AGnd. A 1.5nf or 2.2nF cap is recommended. This cap should be X7R ceramic with a voltage rating sufficient for 5V biasing. The value of Ccomp affects the soft-on rise time and soft-off fall time. www.monolithicpower.com 5 MP1015 Full System Precision CCFL Driver Monolithic Power Systems Application Information (Continued) Pin 15 (Cref): Cref is the bypass cap for the internal 5.0V supply. This capacitor must be placed as close as possible to the pin. A maximum of 100 mils is recommended between the cap and the IC. The value of the cap is typically 0.47µF Pin 14, Pin 7 & Pin 9 (Batt & PGnd): CbaR/L, Cba These caps are used as the bypass caps for the battery voltage supply line. These capacitors will absorb most of the input switching current of the inverter and will require adequate ripple rating. The typical current rating for Cba is > 500mArms. Typically CbaR and CbaL are 1µF and Cba is equal to 2 caps of 2.2µF. Pin 13 & Pin 8 (OutL & OutR): Cp1, Rdamp, Rbleed The primary transformer current flows through this capacitor. Its value is typically 1µF and its voltage rating is sufficient for a 5V bias. The capacitor should be ceramic and have a ripple current rating greater than the primary current (typically 0.8Arms). It is more optimal to use two parallel 0.47µF ceramic caps for minimal ESR losses. Rdamp and Rbleed are used to ensure that the bridge outputs are at 0V prior to startup. Typically Rbleed = 4.3KΩ and Rdamp = 1KΩ. Pin 11 and Pin 10 (BtL and BtR): Cbtl and Cbtr These are the reservoir caps for the upper switches’ gate drive. They should be 10nF and made of X7R ceramic material and have a voltage rating for 6.6V biasing. Pin 4 (DBrt) : Rdbr, Cdbr This pin is used for burst brightness control. The DC voltage on this pin will control the burst percentage on the output. The signal is filtered for optimal operation. The active range is approximately 0.1V to 1.8V. The value of Rdbr and Cdbr is not critical. Pin 3 (Bosc): Cbosc, Rbosc The Cbosc and Rbosc will set the burst repetition rate and the minimum Ton. Set Tmin to achieve the minimum required system brightness. Ensure that Tmin is long enough that the lamp does not extinguish. These values are determined by the following steps: 1) Select a Minimum Duty Cycle (DMIN). This is the ratio TFALL / (TFALL + TRISE) for the burst oscillator. For example: 10% 2) Determine Rbosc by the formula: Rbosc = 1.68 * [(1 / DMIN) – 1] + 4 0.42 350 * 10-6 3) Select a burst frequency and find TTOTAL where TTOTAL = 1/burst frequency. Then determine Cbosc by the formula: Cbosc = (1-DMIN) 0.42 * Rbosc * fbosc Where: fbosc= burst frequency rate in Hz Tmin= Minimum burst time in sec Pin 6 (Drv): Cdrv This bypasses the 6.2V gate supply for the lower switches. The value should be 100nF ceramic Y5V or X7R material. Pin 5: (En) This pin will enable and disable the chip. Do not float this pin. MP1015 Rev 2.7_03/25/03 www.monolithicpower.com 6 MP1015 Monolithic Power Systems Full System Precision CCFL Driver Figure 4: Open_Lamp Voltage Setup and UL Test Protection Application Information MP1015 Rev 2.7_03/25/03 www.monolithicpower.com 7 MP1015 Full System Precision CCFL Driver Monolithic Power Systems Figure 5: Burst Oscillator Waveform versus Output Lamp Current Packaging Information TSSOP20 or TSSOP20F (Exposed Paddle **) 0.0256(0.650)TYP PIN 1 IDENT. 0.004(0.090) 0.010(0.250) GATE PLANE 0.150(3.80) 0.165(4.19) 0.169 0.177 0.105 (2.67) 0.118 (3.00) 0.004(0.090) 0.244 0.260 0o-8 o (4.300) (6.200) (4.500) (6.600) 0.030(0.750) 0.018(0.450) 0.030(0.750) DETAIL "A" 0.039(1.000)REF SEE DETAIL "B" 0.030(0.750) ** EXPOSED PADDLE VERSION ONLY SEE DETAIL "A" 0.252 (6.400) 0.260 (6.600) 0.075(0.190) 0.012(0.300) 0.032(0.800) 0.041(1.050) 0.033(0.850) 0.047(1.200) 0.007(0.190) 0.012(0.300) NOTE: 1) Control dimension is in inches. SEATING PLANE 0.002(0.050) 0.006(0.150) 0.004(0.090) 0.008(0.200) 0.004(0.090) 0.006(0.160) 0.007(0.190) 0.010(0.250) Dimension in bracket is millimeters. DETAIL "B" NOTICE: MPS believes the information in this document to be accurate and reliable. However, it is subject to change without notice. Please contact the factory for current specifications. No responsibility is assumed by MPS for its use or fit to any application, nor for infringement of patent or other rights of third parties. MP1015 Rev 2.7 03/25/03 © 2003 MPS, Inc. Monolithic Power Systems, Inc. 983 University Ave, Building D, Los Gatos, CA 95032 USA Tel: 408-395-2802 ♦ Fax: 408-395-2812 ♦ Web: www.monolithicpower.com 8