PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS843022 is a Fibre Channel Clock Generator and a member of the HiPerClocksTM family of high HiPerClockS™ performance devices from ICS. The ICS843022 uses a 25MHz crystal to synthesize 125MHz or 62.5MHz. The ICS843022 has excellent phase jitter performance, over the 12KHz – 20MHz integration range. The ICS843022 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. • 1 differential 3.3V LVPECL output ICS • Crystal oscillator interface designed for 25MHz, 18pF parallel resonant crystal • Output frequencies: 125MHz or 62.5MHz (selectable) • RMS phase jitter @ 125MHz, using a 25MHz crystal (12KHz - 20MHz): 0.62ps (typical) • RMS phase noise at 125MHz (typical) Offset Noise Power 100Hz ............... -94.6 dBc/Hz 1KHz .............. -122.8 dBc/Hz 10KHz .............. -132.2 dBc/Hz 100KHz .............. -132.0 dBc/Hz • 3.3V operating supply • 0°C to 70°C ambient operating temperature • Industrial temperature information available upon request FUNCTION TABLE Inputs FREQ_SEL Output Frequencies (with a 25MHz crystal) 0 125MHz 1 62.5MHz BLOCK DIAGRAM PIN ASSIGNMENT XTAL_IN OSC XTAL_OUT Output Divider nQ0 Q0 VCCA VEE XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 VCC Q0 nQ0 FREQ_SEL ICS843022 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View FREQ_SEL The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 843022AG www.icst.com/products/hiperclocks.html REV. A NOVEMBER 30, 2004 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR TABLE 1. PIN DESCRIPTIONS Number Name 1 VCCA Power 2 Power 5 V EE XTAL_OUT, XTAL_IN FREQ_SEL 6, 7 nQ0, Q0 Output Differential clock outputs. LVPECL interface levels. 8 VCC Power Core supply pin. 3, 4 Type Input Input Description Analog supply pin. Negative supply pin. Crystal oscillator interface. XTAL_in is the input, XTAL_OUT is the output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance 4 pF RPULLDOWN Input Pulldown Resistor 51 KΩ 843022AG Test Conditions Minimum www.icst.com/products/hiperclocks.html 2 Typical Maximum Units REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC 4.6V Inputs, VI -0.5V to VCC + 0.5V Outputs, IO Continuous Current Surge Current 50mA 100mA Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VCC Core Supply Voltage 3.135 3.3 3.465 V VCCA Analog Supply Voltage 3.135 3.3 3.465 V I EE Power Supply Current 85 mA Maximum Units VCC + 0.3 V TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C Symbol Parameter VIH Input High Voltage Test Conditions Minimum Typical 2 VIL Input Low Voltage IIH Input High Current FREQ_SEL VCC = VIN = 3.465V IIL Input Low Current FREQ_SEL VCC = 3.465V, VIN = 0V -0.3 0.8 V 150 µA -5 µA TABLE 3C. LVPECL DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VOH Output High Voltage; NOTE 1 VCC - 1.4 VCC - 0.9 V VOL Output Low Voltage; NOTE 1 VCC - 2.0 VCC - 1.7 V VSWING Peak-to-Peak Output Voltage Swing 0.6 1.0 V Maximum Units NOTE 1: Outputs terminated with 50Ω to VCC - 2V. TABLE 4. CRYSTAL CHARACTERISTICS Parameter Test Conditions Minimum Mode of Oscillation Typical Fundamental Frequency 25 MHz Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitance 7 pF 843022AG www.icst.com/products/hiperclocks.html 3 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR TABLE 5. AC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C Symbol fOUT tjit(Ø) tR / tF Parameter Test Conditions Output Frequency RMS Phase Jitter; NOTE 1 Output Rise/Fall Time 125MHz, Integration Range: 12KHz - 20MHz 62.5MHz, Integration Range: 12KHz - 20MHz 20% to 80% odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plot. 843022AG www.icst.com/products/hiperclocks.html 4 Minimum Typical Maximum Units 125 MHz 62.5 MHz 0.62 ps 0.63 ps 400 ps 50 % REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR TYPICAL PHASE NOISE AT 125MHZ ➤ 0 -10 -20 Fibre Channel Filter -30 125MHz -40 RMS Phase Jitter (Random) 12KHz to 20MHz = 0.62ps (typical) -60 -70 -80 -90 -100 Raw Phase Noise Data -110 ➤ NOISE POWER dBc Hz -50 -120 -130 ➤ -140 -150 -160 Phase Noise Result by adding Fibre Channel Filter to raw data -170 -180 -190 100 1k 10k 100k 1M 10M 100M OFFSET FREQUENCY (HZ) 843022AG www.icst.com/products/hiperclocks.html 5 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 2V Phase Noise Plot Qx SCOPE Noise Power VCC LVPECL Phase Noise Mask nQx VEE f1 Offset Frequency f2 -1.3V ± 0.165V RMS Jitter = Area Under the Masked Phase Noise Plot 3.3V OUTPUT LOAD AC TEST CIRCUIT RMS PHASE JITTER nQ0 80% Q0 80% VSW I N G Pulse Width t odc = Clock Outputs PERIOD 20% 20% t PW tR tF t PERIOD OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 843022AG OUTPUT RISE/FALL TIME www.icst.com/products/hiperclocks.html 6 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS843022 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VCC, and VCCA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10Ω resistor along with a 10µF and a .01µF bypass capacitor should be connected to each VCCA pin. 3.3V VCC .01µF V CCA .01µF 10Ω 10 µF FIGURE 1. POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. The ICS843022 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 25MHz, 18pF parallel XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 27p Figure 2. CRYSTAL INPUt INTERFACE 843022AG www.icst.com/products/hiperclocks.html 7 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR APPLICATION SCHEMATIC Figure 3A shows a schematic example of the ICS843022. An example of LVEPCL termination is shown in this schematic. Additional LVPECL termination approaches are shown in the LVPECL Termination Application Note. In this example, an 18pF parallel resonant 25MHz crystal is used for generating 125MHz output frequency. The C1 = 27pF and C2 = 33pF are recommended for frequency accuracy. For different board layout, the C1 and C2 values may be slightly adjusted for optimizing frequency accuracy. VCCA VCC VCC VCC R2 10 C3 10uF C4 0.1u R3 133 R1 1K R5 133 Zo = 50 Ohm U1 Q XTAL2 XTAL_OUT C2 33pF 1 2 3 4 VCCA VEE XTAL_OUT XTAL2 XTAL_IN XTAL1 VCC Q0 nQ0 FREQ_SEL 8 7 6 5 VCC + Zo = 50 Ohm nQ X1 25MHz 18pF XTAL_IN XTAL1 - ICS843022 C5 0.1u C1 27pF R4 82.5 R6 82.5 FIGURE 3A. ICS843022 SCHEMATIC EXAMPLE PC BOARD LAYOUT EXAMPLE Figure 3B shows an example of P.C. board layout. The crystal X1 footprint in this example allows either surface mount (HC49S) or through hole (HC49) package. C3 is 0805. C1 and C2 are 0402. Other resistors and capacitors are 0603. This layout assumes that the board has clean analog power and ground planes. FIGURE 3B. ICS843022 PC BOARD LAYOUT EXAMPLE 843022AG www.icst.com/products/hiperclocks.html 8 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR POWER CONSIDERATIONS This section provides information on power dissipation and junction temperature for the ICS843022. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS843022 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. • • Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 85mA = 294.5mW Power (outputs)MAX = 30mW/Loaded Output pair Total Power_MAX (3.465V, with all outputs switching) = 294.5mW + 30mW = 324.5mW 2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C. The equation for Tj is as follows: Tj = θJA * Pd_total + TA Tj = Junction Temperature θJA = Junction-to-Ambient Thermal Resistance Pd_total = Total Device Power Dissipation (example calculation is in section 1 above) TA = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 6 below. Therefore, Tj for an ambient temperature of 70°C with all outputs switching is: 70°C + 0.325W * 90.5°C/W = 99.4°C. This is well below the limit of 125°C. This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single layer or multi-layer). TABLE 6. THERMAL RESISTANCE θJA FOR 8-PIN TSSOP, FORCED CONVECTION θJA by Velocity (Meters per Second) Multi-Layer PCB, JEDEC Standard Test Boards 843022AG 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W www.icst.com/products/hiperclocks.html 9 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR 3. Calculations and Equations. The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in Figure 4. VCC Q1 VOUT RL 50 VCC - 2V FIGURE 4. LVPECL DRIVER CIRCUIT AND TERMINATION To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination voltage of V - 2V. CC • For logic high, VOUT = V OH_MAX (V CCO_MAX • -V OH_MAX OL_MAX CCO_MAX -V OL_MAX CC_MAX – 0.9V ) = 0.9V For logic low, VOUT = V (V =V =V CC_MAX – 1.7V ) = 1.7V Pd_H is power dissipation when the output drives high. Pd_L is the power dissipation when the output drives low. Pd_H = [(V OH_MAX – (V CC_MAX - 2V))/R ] * (V CC_MAX L -V OH_MAX ) = [(2V - (V CC_MAX -V OH_MAX ))/R ] * (V CC_MAX L -V OH_MAX )= [(2V - 0.9V)/50Ω] * 0.9V = 19.8mW Pd_L = [(V OL_MAX – (V CC_MAX - 2V))/R ] * (V L CC_MAX -V OL_MAX ) = [(2V - (V CC_MAX -V OL_MAX ))/R ] * (V L CC_MAX -V OL_MAX )= [(2V - 1.7V)/50Ω] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW 843022AG www.icst.com/products/hiperclocks.html 10 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR RELIABILITY INFORMATION TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP θJA by Velocity (Meters per Second) Multi-Layer PCB, JEDEC Standard Test Boards 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W TRANSISTOR COUNT The transistor count for ICS843022 is: 1928 843022AG www.icst.com/products/hiperclocks.html 11 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. PACKAGE OUTLINE - G SUFFIX FOR ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR 8 LEAD TSSOP TABLE 8. PACKAGE DIMENSIONS SYMBOL Millimeters Minimum N Maximum 8 A -- 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 E E1 3.10 6.40 BASIC 4.30 e 4.50 0.65 BASIC L 0.45 0.75 α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MO-153 843022AG www.icst.com/products/hiperclocks.html 12 REV. A NOVEMBER 30, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS843022 FEMTOCLOCKS™ CRYSTAL-TO3.3V LVPECL CLOCK GENERATOR TABLE 9. ORDERING INFORMATION Part/Order Number Marking Package Count Temperature ICS843022AG 3022A 8 lead TSSOP 100 per tube 0°C to 70°C ICS843022AGT 3022A 8 lead TSSOP on Tape and Reel 2500 0°C to 70°C The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 843022AG www.icst.com/products/hiperclocks.html 13 REV. A NOVEMBER 30, 2004