ICS ICS843081I-01

ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
GENERAL DESCRIPTION
FEATURES
The ICS843081I-01 is an Ethernet Clock
Multiplier and a member of the HiPerClocksTM
HiPerClockS™
family of high performance devices from ICS. The
ICS843081I-01 accepts a crystal reference of
19.6MHz - 28MHz. The ICS843081I-01 has
excellent 1ps or lower phase jitter performance, over the
1.875MHz - 20MHz integration range. The ICS843081I-01 is
packaged in a small 8-pin TSSOP, making it ideal for use in
systems with limited board space.
• One differential LVPECL output
ICS
• One crystal oscillator interface: 19.6MHz - 28MHz
• Output frequency range: 490MHz - 700MHz
• VCO range: 490MHz - 700MHz
• RMS phase jitter @ 625MHz using a 25MHz reference
(1.875MHz - 20MHz): 0.32ps (typical)
• 3.3V or 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
FREQUENCY EXAMPLE FUNCTION TABLE
Input
M/N (Multiplier)
Output Frequencies (MHz)
20
25
500
25
25
62 5
28
25
700
XTAL (MHz)
BLOCK DIAGRAM
PIN ASSIGNMENT
OE
VCCA
XTAL_OUT
XTAL_IN
VEE
XTAL_IN
Q
Phase
Detector
VCO
490 - 700 MHz
XTAL_OUT
nQ
1
2
3
4
8
7
6
5
VCC
Q
nQ
OE
ICS843081I-01
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
M = ÷25 (fixed)
843081AGI-01
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1
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
2,
3
4
VCCA
XTAL_OUT,
XTAL_IN
VEE
Power
5
OE
Input
6, 7
nQ, Q
Output
Analog supply pin.
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Negative supply pin.
Output enable pin. When HIGH, Q output is enabled.
When LOW, forces Q to HiZ state. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
8
VCC
Power
Core supply pin.
Input
Power
Pullup
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
CIN
Input Capacitance
4
pF
RPULLUP
Input Pullup Resistor
51
kΩ
843081AGI-01
Test Conditions
Minimum
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2
Typical
Maximum
Units
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC
4.6V
Inputs, VI
-0.5V to VCC + 0.5V
Outputs, IO
Continuous Current
Surge Current
50mA
100mA
Package Thermal Impedance, θJA
101.7°C/W (0 mps)
Storage Temperature, TSTG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 3.3V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
VCC
Test Conditions
Minimum
Typical
Maximum
Units
Core Supply Voltage
3.135
3.3
3.465
V
VCCA
Analog Supply Voltage
3.135
3.3
3.465
ICC
Power Supply Current
V
72
mA
ICCA
Analog Supply Current
12
mA
IEE
Power Supply Current
78
mA
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 2.5V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
Minimum
Typical
Maximum
Units
VCC
Core Supply Voltage
Test Conditions
2.375
2.5
2.625
V
VCCA
Analog Supply Voltage
2.375
2.5
2.625
V
ICC
Power Supply Current
60
mA
ICCA
Analog Supply Current
12
mA
IEE
Power Supply Current
73
mA
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = VCCA = 3.3V ± 5% OR 2.5V ± 5%, TA = -40°C TO 85°C
Symbol
VIH
VIL
Parameter
Input High Voltage
Input Low Voltage
Test Conditions
Minimum
Maximum
Units
VCC = 3.3V
2
VCC + 0.3
V
VCC = 2.5V
1.7
VCC + 0.3
V
VCC = 3.3V
-0.3
0.8
V
VCC = 2.5V
-0.3
0.7
V
5
µA
IIH
Input High Current
VCC = VIN = 3.465V or 2.625V
IIL
Input Low Current
VCC = 3.465V or 2.625V, VIN = 0V
843081AGI-01
Typical
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3
-150
µA
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
TABLE 3D. LVPECL DC CHARACTERISTICS, VCC = VCCA = 3.3V ± 5% OR 2.5V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VOH
Output High Voltage; NOTE 1
VCC - 1.4
VCC - 0.9
V
VOL
Output Low Voltage; NOTE 1
VCC - 2.0
VCC - 1.7
V
VSWING
Peak-to-Peak Output Voltage Swing
0.6
1.0
V
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Maximum
Units
28
MHz
Equivalent Series Resistance (ESR)
50
Ω
Shunt Capacitance
7
pF
Drive Level
1
mW
Maximum
Units
700
MHz
Mode of Oscillation
Typical
Fundamental
Frequency
19.6
TABLE 5A. AC CHARACTERISTICS, VCC = VCCA = 3.3V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
fOUT
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
t jit(Ø)
t R / tF
Test Conditions
Minimum
Typical
490
625MHz @ Integration Range:
1.875MHz - 20MHz
20% to 80%
0.32
odc
Output Duty Cycle
XTAL = 25MHz
NOTE 1: Please refer to the Phase Noise Plot following this section.
ps
125
600
ps
45
55
%
Maximum
Units
700
MHz
TABLE 5B. AC CHARACTERISTICS, VCC = VCCA = 2.5V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
fOUT
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
t jit(Ø)
t R / tF
Test Conditions
Minimum
490
625MHz @ Integration Range:
1.875MHz - 20MHz
20% to 80%
odc
Output Duty Cycle
XTAL = 25MHz
NOTE 1: Please refer to the Phase Noise Plot following this section.
843081AGI-01
Typical
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4
0.39
ps
125
650
ps
45
55
%
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
TYPICAL PHASE NOISE
AT
625MHZ @ 3.3V
➤
0
-10
-20
Gb Ethernet Filter
-30
-40
625MHz
-50
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.32ps (typical)
-70
Raw Phase Noise Data
-80
➤
NOISE POWER dBc
Hz
-60
-90
-100
-110
-120
-130
-140
-150
➤
-160
-170
-180
Phase Noise Result by adding
a Gb Ethernet Filter to raw data
-190
200
10
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
TYPICAL PHASE NOISE
AT
625MHZ @ 2.5V
➤
0
-10
-20
-30
Gb Ethernet Filter
-40
-50
625MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.39ps (typical)
-70
Raw Phase Noise Data
-80
➤
NOISE POWER dBc
Hz
-60
-90
-100
-110
-120
-130
-140
-150
➤
-160
-170
-180
Phase Noise Result by adding
a Gb Ethernet Filter to raw data
-190
200
10
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
843081AGI-01
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5
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
PARAMETER MEASUREMENT INFORMATION
2V
2V
VCC ,
VCCA
Qx
SCOPE
VCC,
VCCA
SCOPE
Qx
LVPECL
LVPECL
nQx
nQx
VEE
VEE
-0.5V ± 0.125V
-1.3V ± 0.165V
3.3V OUTPUT LOAD AC TEST CIRCUIT
2.5V OUTPUT LOAD AC TEST CIRCUIT
Noise Power
Phase Noise Plot
80%
80%
VSW I N G
Clock
Outputs
Phase Noise Mask
f1
Offset Frequency
20%
20%
tR
tF
f2
RMS Jitter = Area Under the Masked Phase Noise Plot
OUTPUT RISE/FALL TIME
RMS PHASE JITTER
nQ
Q
t PW
t
odc =
PERIOD
t PW
x 100%
t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
843081AGI-01
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6
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843081I-01 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VCC and VCCA should
be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin. The 10Ω
resistor can also be replaced by a ferrite bead.
3.3V or 2.5V
VCC
.01μF
10Ω
V CCA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
nant crystal and were chosen to minimize the ppm error. The
optimum C1 and C2 values can be slightly adjusted for different
board layouts.
The ICS843081I-01 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using an 18pF parallel reso-
XTAL_OUT
C1
33p
X1
18pF Parallel Crystal
XTAL_IN
C2
22p
ICS843081I-01
Figure 2. CRYSTAL INPUt INTERFACE
843081AGI-01
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7
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
TERMINATION FOR 3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical termination for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
to drive 50Ω transmission lines. Matched impedance techniques should be used to maximize operating frequency and
minimize signal distortion. Figures 3A and 3B show two different layouts which are recommended only as guidelines.
Other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee
compatibility across all printed circuit and clock component
process variations.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed
3.3V
Zo = 50Ω
125Ω
FOUT
FIN
Zo = 50Ω
Zo = 50Ω
FOUT
50Ω
1
RTT =
Z
((VOH + VOL) / (VCC – 2)) – 2 o
FIN
50Ω
Zo = 50Ω
VCC - 2V
RTT
84Ω
FIGURE 3A. LVPECL OUTPUT TERMINATION
843081AGI-01
125Ω
84Ω
FIGURE 3B. LVPECL OUTPUT TERMINATION
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8
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
TERMINATION FOR 2.5V LVPECL OUTPUT
Figure 4A and Figure 4B show examples of termination for 2.5V
LVPECL driver. These terminations are equivalent to terminating 50Ω to VCC - 2V. For VCC = 2.5V, the VCC - 2V is very close to
ground level. The R3 in Figure 4B can be eliminated and the
termination is shown in Figure 4C.
2.5V
VCC=2.5V
2.5V
2.5V
VCC=2.5V
R1
250
Zo = 50 Ohm
R3
250
+
Zo = 50 Ohm
+
Zo = 50 Ohm
-
Zo = 50 Ohm
2,5V LVPECL
Driv er
-
R1
50
2,5V LVPECL
Driv er
R2
62.5
R2
50
R4
62.5
R3
18
FIGURE 4B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 4A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V
VCC=2.5V
Zo = 50 Ohm
+
Zo = 50 Ohm
2,5V LVPECL
Driv er
R1
50
R2
50
FIGURE 4C. 2.5V LVPECL TERMINATION EXAMPLE
843081AGI-01
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9
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843081I-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843081I-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
•
•
Power (core)MAX = VCC_MAX * IEE_TYP = 3.465V * 78mA = 270.27mW
Power (outputs)MAX = 30mW/Loaded Output pair
Total Power_MAX (3.465V, with all outputs switching) = 270.27mW + 30mW = 300.27mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.300W * 90.5°C/W = 112°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θJA FOR 8-PIN TSSOP, FORCED CONVECTION
θJA by Velocity (Meters per Second)
Multi-Layer PCB, JEDEC Standard Test Boards
843081AGI-01
0
1
2.5
101.7°C/W
90.5°C/W
89.8°C/W
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10
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 5.
VCC
Q1
VOUT
RL
50
VCC - 2V
FIGURE 5. LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V - 2V.
CC
•
For logic high, VOUT = V
OH_MAX
(V
CCO_MAX
•
-V
OH_MAX
OL_MAX
CCO_MAX
-V
CC_MAX
– 0.9V
) = 0.9V
For logic low, VOUT = V
(V
=V
=V
CC_MAX
– 1.7V
) = 1.7V
OL_MAX
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R ] * (V
CC_MAX
L
-V
OH_MAX
) = [(2V - (V
CC_MAX
-V
OH_MAX
))/R ] * (V
CC_MAX
L
-V
OH_MAX
)=
[(2V - 0.9V)/50Ω] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R ] * (V
L
CC_MAX
-V
OL_MAX
) = [(2V - (V
CC_MAX
-V
OL_MAX
))/R ] * (V
L
CC_MAX
-V
OL_MAX
)=
[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
843081AGI-01
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11
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
RELIABILITY INFORMATION
TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θJA by Velocity (Meters per Second)
Multi-Layer PCB, JEDEC Standard Test Boards
0
1
2.5
101.7°C/W
90.5°C/W
89.8°C/W
TRANSISTOR COUNT
The transistor count for ICS843081I-01 is: 1697
843081AGI-01
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REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
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Systems, Inc.
PACKAGE OUTLINE - G SUFFIX
FOR
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
8 LEAD TSSOP
TABLE 8. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
N
A
Maximum
8
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
2.90
3.10
E
E1
6.40 BASIC
4.30
e
4.50
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
843081AGI-01
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13
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
TABLE 9. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging
Temperature
ICS843081AGI-01
1AI01
8 lead TSSOP
tube
-40°C to 85°C
ICS843081AGI-01T
1AI01
8 lead TSSOP
2500 tape & reel
-40°C to 85°C
ICS843081AGI-01LF
AI01L
8 lead "Lead-Free" TSSOP
tube
-40°C to 85°C
ICS843081AGI-01LFT
AI01L
8 lead "Lead-Free" TSSOP
2500 tape & reel
-40°C to 85°C
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
843081AGI-01
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14
REV. B JANUARY 23, 2006
ICS843081I-01
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
REVISION HISTORY SHEET
Rev
B
843081AGI-01
Table
T5A
Page
1
4
T5B
4
T9
5
14
Description of Change
Features Section - corrected RMS Phase Jitter value.
3.3V AC Characteristics Table - changed RMS Phase Jitter from 0.26ps typical
to 0.32ps typical.
2.5V AC Characteristics Table - changed RMS Phase Jitter from 0.27ps typical
to 0.39ps typical.
Updated Typical Phase Noise Plots.
Ordering Information Table - added lead-free marking.
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15
Date
1/23/06
REV. B JANUARY 23, 2006