SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 4A 4Y 4Z G 3Z 3Y 3A FK PACKAGE (TOP VIEW) 1A NC VCC 4A 3 2 1 20 19 1Z 4 18 4Y G 5 17 4Z NC 6 16 NC 2Z 7 15 G 2Y 8 10 11 12 13 GND 14 3Z 9 2A The SN55LBC172 is a monolithic quadruple differential line driver with 3-state outputs. This device is designed to meet the requirements of the Electronics Industry Association (EIA) standard RS-485. The SN55LBC172 is optimized for balanced multipoint bus transmission at data rates up to and exceeding 10 million bits per second. The driver features wide positive and negative common-mode output voltage ranges, current limiting, and thermal-shutdown circuitry, making it suitable for party-line applications in noisy environments. The device is designed using the LinBiCMOS process, facilitating ultralow power consumption and inherent robustness. 1Y description 3Y D 1A 1Y 1Z G 2Z 2Y 2A GND 3A D J OR W PACKAGE (TOP VIEW) Meets Standard EIA-485 Designed for High-Speed Multipoint Transmission on Long Bus Lines in Noisy Environments Supports Data Rates up to and Exceeding Ten Million Transfers Per Second Common-Mode Output Voltage Range of – 7 V to 12 V Positive- and Negative-Current Limiting Low Power Consumption . . . 1.5 mA Max (Output Disabled) NC D D NC – No internal connection The SN55LBC172 provides positive- and negative-current limiting and thermal shutdown for protection from line fault conditions on the transmission bus line. This device offers optimum performance when used with the SN55LBC173M quadruple line receiver. The SN55LBC172 is available in the 16-pin CDIP package (J), the 16-pin CPAK package (W), or the 20-pin LCCC package (FK). The SN55LBC172 is characterized for operation over a military temperature range of –55°C to 125°C. FUNCTION TABLE (each driver) INPUT A ENABLES OUTPUTS G G Y H H X H Z L L H X L H H X L H L L X L L H X L H Z Z H = high level, L = low level, X = irrelevant, Z = high impedance (off) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinBiCMOS is a trademark of Texas Instruments Incorporated. Copyright 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 logic symbol† G G 1A 2A 3A 4A 4 logic diagram (positive logic) G ≥1 G EN 12 2 1 3 6 7 5 10 9 11 14 15 13 1A 1Y 4 12 2 1 3 1Z 2Y 2A 2Z 6 7 5 3Y 3Z 3A 4Y 10 9 11 4Z 4A † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the J or W package. 14 15 13 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z schematic diagrams of inputs and outputs ALL INPUTS Y OR Z OUTPUT VCC VCC + 50 µA – 200 Ω Output Input Driver 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 15 V Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited‡ Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature. NOTE 1: All voltage values are with respect to GND. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA=125°C TA = 125°C POWER RATING FK 1375 mW 11.0 mW/°C 275 mW J 1375 mW 11.0 mW/°C 275 mW W 1000 mW 8.0 mW/°C 200 mW recommended operating conditions Supply voltage, VCC High-level input voltage, VIH MIN NOM MAX UNIT 4.75 5 5.25 V 2 Low-level input voltage, VIL V 0.8 Output voltage at any bus terminal (separately or common mode) mode), VO Y or Z High-level output current, IOH Y or Z Low-level output current, IOL Y or Z 12 –7 V V –60 mA 60 mA Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature, TA –55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 °C 3 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VIK Input clamp voltage |VOD| Differential output voltage‡ ∆|VOD| Change in magnitude of differential output voltage§ VOC Common mode output voltage Common-mode ∆|VOC| Change in magnitude of common-mode output voltage§ IO IOZ Output current with power off IIH IIL High-level input current IOS Short-circuit output current ICC Supply current (all drivers) Low-level input current TYP† MAX UNIT – 1.5 V II = – 18 mA RL = 54 Ω, See Figure 1 1.1 1.8 5 RL = 60 Ω, See Figure 2 1.1 1.7 5 V ± 0.2 V 3 –1 V ± 0.2 V VCC = 0, VO = – 7 V to 12 V VO = – 7 V to 12 V ± 100 µA ± 100 µA VI = 2.4 V VI = 0.4 V – 100 µA – 100 µA VO = – 7 V to 12 V Outputs enabled No load Outputs disabled ± 250 mA RL = 54 Ω Ω, High-impedance-state output current MIN See Figure 1 7 1.5 mA † All typical values are at VCC = 5 V and TA = 25°C. ‡ The minimum VOD specification does not fully comply with EIA-485 at operating temperatures below 0°C. The lower output signal should be used to determine the maximum signal transmission distance. § ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. switching characteristics, VCC = 5 V PARAMETER TEST CONDITIONS td(OD) Differential output delay time RL = 54 Ω Ω, See Figure 3 tt(OD) Differential output transition time RL = 54 Ω Ω, See Figure 3 tPZH Output enable time to high level RL = 110 Ω Ω, See Figure 4 tPZL Output enable time to low level RL = 110 Ω Ω, See Figure 5 tPHZ Output disable time from high level RL = 110 Ω Ω, See Figure 4 tPLZ Output Out ut disable time from low level RL = 110 Ω Ω, See Figure 5 4 POST OFFICE BOX 655303 TA 25°C MIN TYP MAX 2 11 20 – 55°C to 125°C 2 25°C 10 – 55°C to 125°C 4 40 15 25 60 25°C 30 – 55°C to 125°C 40 25°C 30 – 55°C to 125°C 40 25°C 60 – 55°C to 125°C 115 25°C 30 – 55°C to 125°C 55 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns ns SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 PARAMETER MEASUREMENT INFORMATION RL 2 VOD2 RL 2 VOC Figure 1. Differential and Common-Mode Output Voltages Vtest R1 = 375 Ω Y 0 V or 3 V A RL = 60 Ω VOD Z G at 5 V or G at 0 V R2 = 375 Ω Vtest – 7 V < Vtest < 12 V Figure 2. Driver VOD Test Circuit 3V Input Input Generator (see Note A) RL = 54 Ω CL = 50 pF (see Note B) 50 Ω 1.5 V 1.5 V 0 Output td(OD) td(OD) Output 50% 90% ≈ 2.5 V 50% 10% 3V tt(OD) ≈ – 2.5 V tt(OD) VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. The input pulses are supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, tr ≤ 5 ns, tf ≤ 5 ns, ZO = 50 Ω. B. CL includes probe and stray capacitance. Figure 3. Driver Differential-Output Test Circuit and Delay and Transition-Time Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 PARAMETER MEASUREMENT INFORMATION 3V Input S1 1.5 V 1.5 V Output 0 V or 3 V 0 Input Generator (see Note A) CL = 50 pF (see Note B) 50 Ω RL = 110 Ω 0.5 V tPZH VOH Output 2.3 V Voff ≈ 0 tPHZ TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, tr ≤ 5 ns, tf ≤ 5 ns, ZO = 50 Ω. B. CL includes probe and stray capacitance. Figure 4. tPZH and tPHZ Test Circuit and Voltage Waveforms 5V 3V RL = 110 Ω S1 Input 50 Ω 1.5 V 0 Output tPZL 0 V or 3 V Generator (see Note A) 1.5 V tPLZ CL = 50 pF (see Note B) Input 2.3 V Output 5V 0.5 V VOL VOLTAGE WAVEFORMS 3V (see Note C) TEST CIRCUIT NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, tr ≤ 5 ns, tf ≤ 5 ns, ZO = 50 Ω. B. CL includes probe and stray capacitance. C. To test the active-low enable G, ground G and apply an inverted waveform to G. Figure 5. tPZL and tPLZ Test Circuit and Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 TYPICAL CHARACTERISTICS OUTPUT CURRENT vs OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 50 5 Output Disabled TA = 25°C I O – Output Current – µA 30 20 10 0 – 10 VCC = 0 V – 20 VCC = 5 V TA = 25°C 4.5 VOL – Low-Level Output Voltage – V 40 – 30 VCC = 5 V – 40 4 3.5 3 2.5 2 1.5 1 0.5 – 50 – 25 – 20 – 15 – 10 – 5 0 5 10 15 20 0 – 20 25 VO – Output Voltage – V 0 20 40 100 60 80 IOL – Low-Level Output Current – mA 120 Figure 7 Figure 6 DRIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 5 RL = 54 Ω VCC = 5 V VOH – High-Level Output Voltage – V VOD – Differential Output Voltage – V 3 2.5 2 1.5 1 0.5 0 – 60 VCC = 5 V TA = 25°C 4.5 4 3.5 3 2.5 2 1.5 – 40 – 20 0 20 40 60 80 100 20 0 – 20 – 40 – 60 – 80 – 100 – 120 TA – Free-Air Temperature – °C IOH – High-Level Output Current – mA Figure 8 Figure 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 TYPICAL CHARACTERISTICS PROPAGATION DELAY TIME, DIFFERENTIAL OUTPUT vs FREE-AIR TEMPERATURE DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT VCC = 5 V TA = 25°C Propagation Delay Time, Differential Output – ns V OD – Differential Output Voltage – V 3 2.5 2 1.5 1 0.5 0 0 10 20 30 40 50 60 70 80 90 100 14 13 12 RL = 54 Ω CL = 50 pF VCC = 5 V 11 10 9 8 7 6 5 4 – 60 – 40 – 20 Figure 10 8 0 20 40 Figure 11 POST OFFICE BOX 655303 60 TA – Free-Air Temperature – °C IO – Output Current – mA • DALLAS, TEXAS 75265 80 100 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 MECHANICAL DATA J (R-GDIP-T**) CERAMIC DUAL-IN-LINE PACKAGE 14 PIN SHOWN PINS ** 14 16 18 20 A MAX 0.310 (7,87) 0.310 (7,87) 0.310 (7,87) 0.310 (7,87) A MIN 0.290 (7,37) 0.290 (7,37) 0.290 (7,37) 0.290 (7,37) B MAX 0.785 (19,94) 0.785 (19,94) 0.910 (23,10) 0.975 (24,77) B MIN 0.755 (19,18) 0.755 (19,18) C MAX 0.300 (7,62) 0.300 (7,62) 0.300 (7,62) 0.300 (7,62) C MIN 0.245 (6,22) 0.245 (6,22) 0.245 (6,22) 0.245 (6,22) DIM B 8 14 C 1 7 0.065 (1,65) 0.045 (1,14) 0.100 (2,54) 0.070 (1,78) 0.020 (0,51) MIN 0.930 (23,62) A 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.100 (2,54) 0°–15° 0.023 (0,58) 0.015 (0,38) 0.014 (0,36) 0.008 (0,20) 4040083/D 08/98 NOTES: A. B. C. D. E. 10 All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SGLS084B – MARCH 1995 – REVISED SEPTEMBER 1999 MECHANICAL DATA W (R-GDFP-F16) CERAMIC DUAL FLATPACK Base and Seating Plane 0.285 (7,24) 0.245 (6,22) 0.006 (0,15) 0.004 (0,10) 0.085 (2,16) 0.045 (1,14) 0.045 (1,14) 0.026 (0,66) 0.305 (7,75) 0.275 (6,99) 0.355 (9,02) 0.235 (5,97) 1 0.355 (9,02) 0.235 (5,97) 16 0.019 (0,48) 0.015 (0,38) 0.050 (1,27) 0.440 (11,18) 0.371 (9,42) 0.025 (0,64) 0.015 (0,38) 8 9 1.025 (26,04) 0.745 (18,92) 4040180-3 / B 03/95 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only. Falls within MIL-STD-1835 GDFP1-F16 and JEDEC MO-092AC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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