SEMICONDUCTOR KMB7D0NP30QA TECHNICAL DATA N and P-Ch Trench MOSFET General Description Switching regulator and DC-DC Converter applications. It’s mainly suitable for Back-light Inverter. FEATURES ・N-Channel : VDSS=30V, ID=7A. : RDS(ON)=23.5mΩ(Max.) @ VGS=10V : RDS(ON)=39mΩ(Max.) @ VGS=4.5V ・P-Channel : VDSS=-30V, ID=-5A. : RDS(ON)=45.5mΩ(Max.) @ VGS=-10V : RDS(ON)=80mΩ(Max.) @ VGS=-4.5V ・Super High Dense Cell Design. ・Reliable and rugged. MAXIMUM RATING (Ta=25℃) CHARACTERISTIC SYMBOL N-Ch P-Ch UNIT Drain-Source Voltage VDSS 30 -30 V Gate-Source Voltage VGSS ±20 ±20 V I D* 7 -5 IDP 29 -20 IS 1.7 -1.7 DC Drain Current Pulsed (note1) Source-Drain Diode Current Drain Power Dissipation Maximum Junction Temperature Storage Temperature Range Thermal Resistance, Junction to Ambient A A PD* 2 W Tj 150 ℃ Tstg -55～150 ℃ RthJA* 62.5 ℃/W Note : *Sorface Mounted on FR4 Board PIN CONNECTION (TOP VIEW) 2011. 3. 18 Revision No : 3 1/9 KMB7D0NP30QA ELECTRICAL CHARACTERISTICS (Ta=25℃) CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage Drain Cut-off Current Gate Leakage Current Gate Threshold Voltage Drain-Source ON Resistance ON State Drain Current Forward Transconductance Source-Drain Diode Forward Voltage 2011. 3. 18 BVDSS IDSS IGSS Vth RDS(ON)* ID(ON)* gfs* VSD* Revision No : 3 ID=250μA, VGS=0V, N-Ch 30 - - ID=-250μA, VGS=0V, P-Ch -30 - - VGS=0V, VDS=24V N-Ch - - 1 VGS=0V, VDS=-24V P-Ch - - -1 N-Ch - - ±100 P-Ch - - ±100 VDS=VGS, ID=250μA N-Ch 1.0 - 3 VDS=VGS, ID=-250μA P-Ch -1.0 - -3 VGS=10V, ID=7A N-Ch - 18 23.5 VGS=-10V, ID=-5A P-Ch - 35 45.5 VGS=4.5V, ID=6A N-Ch - 30 39 VGS=-4.5V, ID=-4A P-Ch - 62 80 VGS=4.5V, VDS=5V N-Ch 20 - - VGS=-10V, VDS=-5V P-Ch -20 - - VDS=5V, ID=6.6A N-Ch - 10 - VDS=-5V, ID=-5A P-Ch - 9 - IS=1.7A, VGS=0V N-Ch - 0.7 1.2 IS=-1.7A, VGS=0V P-Ch - -0.8 -1.2 VGS=±20V, VDS=0V V μA nA V mΩ A S V 2/9 KMB7D0NP30QA ELECTRICAL CHARACTERISTICS (Ta=25℃) CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. N-Ch - 16.4 20.5 P-Ch - 13 16 N-Ch - 7.2 9 UNIT Dynamic N-Ch : VDS=15V, ID=6.6A, VGS=10V (Fig.1) P-Ch : VDS=-15V, ID=-5A, VGS=-10V (Fig.3) Total Gate Charge Qg N-Ch : VDS=15V, ID=6.6A, VGS=4.5V P-Ch : VDS=-15V, ID=-5A, VGS=-4.5V Gate-Source Charge Gate-Drain Charge Turn-on Delay time Turn-on Rise time Turn-off Delay time Turn-off Fall time Input Capacitance Output Capacitance Reverse transfer Capacitance Qgs Qgd (Fig.1) (Fig.3) N-Ch : VDS=15V, ID=6.6A, VGS=10V (Fig.1) P-Ch : VDS=-15V, ID=-5A, VGS=-10V (Fig.3) td(on) tr td(off) N-Ch : VDD=15V, ID=6.6A, VGS=10V, RG=3Ω (Fig.2) P-Ch : VDD=-15V, VGS=-10V, RG=3Ω, RL=2.7Ω (Fig.4) tf nC P-Ch - 6.25 7.8 N-Ch - 4 - P-Ch - 2.6 - N-Ch - 2.6 - P-Ch - 2.9 - N-Ch - 7.4 - P-Ch - 4.7 - N-Ch - 27.7 - P-Ch - 7.8 - N-Ch - 12.2 - P-Ch - 47.2 - N-Ch - 7.6 - P-Ch - 22.6 - N-Ch - 742 - P-Ch - 820 - N-Ch - 126 - P-Ch - 137 - N-Ch - 76 - P-Ch - 89 - ns Ciss Coss N-Ch : VDS=15V, VGS=0V, f=1.0MHz P-Ch : VDS=-15V, VGS=0V, f=1.0MHz pF Crss Note 1>* Pulse test : Pulse width≤300㎲, Duty Cycle≤2%. 2011. 3. 18 Revision No : 3 3/9 KMB7D0NP30QA 2011. 3. 18 Revision No : 3 4/9 KMB7D0NP30QA 2011. 3. 18 Revision No : 3 5/9 KMB7D0NP30QA 2011. 3. 18 Revision No : 3 6/9 KMB7D0NP30QA 2011. 3. 18 Revision No : 3 7/9 KMB7D0NP30QA 2011. 3. 18 Revision No : 3 8/9 KMB7D0NP30QA 2011. 3. 18 Revision No : 3 9/9